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Rename to *Legacy
1 parent a6cdd80 commit ce5cb60

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8 files changed

+25
-25
lines changed

8 files changed

+25
-25
lines changed

‎llvm/include/llvm/CodeGen/LiveRegMatrix.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,7 @@ class TargetRegisterInfo;
3838
class VirtRegMap;
3939

4040
class LiveRegMatrix {
41-
friend class LiveRegMatrixWrapperPass;
41+
friend class LiveRegMatrixWrapperLegacy;
4242
friend class LiveRegMatrixAnalysis;
4343
const TargetRegisterInfo *TRI = nullptr;
4444
LiveIntervals *LIS = nullptr;
@@ -163,13 +163,13 @@ class LiveRegMatrix {
163163
Register getOneVReg(unsigned PhysReg) const;
164164
};
165165

166-
class LiveRegMatrixWrapperPass : public MachineFunctionPass {
166+
class LiveRegMatrixWrapperLegacy : public MachineFunctionPass {
167167
LiveRegMatrix LRM;
168168

169169
public:
170170
static char ID;
171171

172-
LiveRegMatrixWrapperPass() : MachineFunctionPass(ID) {}
172+
LiveRegMatrixWrapperLegacy() : MachineFunctionPass(ID) {}
173173

174174
LiveRegMatrix &getLRM() { return LRM; }
175175
const LiveRegMatrix &getLRM() const { return LRM; }

‎llvm/include/llvm/InitializePasses.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -156,7 +156,7 @@ void initializeLiveDebugValuesPass(PassRegistry &);
156156
void initializeLiveDebugVariablesPass(PassRegistry &);
157157
void initializeLiveIntervalsWrapperPassPass(PassRegistry &);
158158
void initializeLiveRangeShrinkPass(PassRegistry &);
159-
void initializeLiveRegMatrixWrapperPassPass(PassRegistry &);
159+
void initializeLiveRegMatrixWrapperLegacyPass(PassRegistry &);
160160
void initializeLiveStacksPass(PassRegistry &);
161161
void initializeLiveVariablesWrapperPassPass(PassRegistry &);
162162
void initializeLoadStoreOptPass(PassRegistry &);

‎llvm/include/llvm/Passes/MachinePassRegistry.def

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -96,8 +96,8 @@ LOOP_PASS("loop-term-fold", LoopTermFoldPass())
9696
// computed. (We still either need to regenerate kill flags after regalloc, or
9797
// preferably fix the scavenger to not depend on them).
9898
MACHINE_FUNCTION_ANALYSIS("live-intervals", LiveIntervalsAnalysis())
99-
MACHINE_FUNCTION_ANALYSIS("live-vars", LiveVariablesAnalysis())
10099
MACHINE_FUNCTION_ANALYSIS("live-reg-matrix", LiveRegMatrixAnalysis())
100+
MACHINE_FUNCTION_ANALYSIS("live-vars", LiveVariablesAnalysis())
101101
MACHINE_FUNCTION_ANALYSIS("machine-block-freq", MachineBlockFrequencyAnalysis())
102102
MACHINE_FUNCTION_ANALYSIS("machine-branch-prob",
103103
MachineBranchProbabilityAnalysis())

‎llvm/lib/CodeGen/LiveRegMatrix.cpp

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -35,22 +35,22 @@ using namespace llvm;
3535
STATISTIC(NumAssigned , "Number of registers assigned");
3636
STATISTIC(NumUnassigned , "Number of registers unassigned");
3737

38-
char LiveRegMatrixWrapperPass::ID = 0;
39-
INITIALIZE_PASS_BEGIN(LiveRegMatrixWrapperPass, "liveregmatrix",
38+
char LiveRegMatrixWrapperLegacy::ID = 0;
39+
INITIALIZE_PASS_BEGIN(LiveRegMatrixWrapperLegacy, "liveregmatrix",
4040
"Live Register Matrix", false, false)
4141
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
4242
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
43-
INITIALIZE_PASS_END(LiveRegMatrixWrapperPass, "liveregmatrix",
43+
INITIALIZE_PASS_END(LiveRegMatrixWrapperLegacy, "liveregmatrix",
4444
"Live Register Matrix", false, false)
4545

46-
void LiveRegMatrixWrapperPass::getAnalysisUsage(AnalysisUsage &AU) const {
46+
void LiveRegMatrixWrapperLegacy::getAnalysisUsage(AnalysisUsage &AU) const {
4747
AU.setPreservesAll();
4848
AU.addRequiredTransitive<LiveIntervalsWrapperPass>();
4949
AU.addRequiredTransitive<VirtRegMapWrapperLegacy>();
5050
MachineFunctionPass::getAnalysisUsage(AU);
5151
}
5252

53-
bool LiveRegMatrixWrapperPass::runOnMachineFunction(MachineFunction &MF) {
53+
bool LiveRegMatrixWrapperLegacy::runOnMachineFunction(MachineFunction &MF) {
5454
auto &LIS = getAnalysis<LiveIntervalsWrapperPass>().getLIS();
5555
auto &VRM = getAnalysis<VirtRegMapWrapperLegacy>().getVRM();
5656
LRM.init(MF, LIS, VRM);
@@ -72,7 +72,7 @@ void LiveRegMatrix::init(MachineFunction &MF, LiveIntervals &pLIS,
7272
invalidateVirtRegs();
7373
}
7474

75-
void LiveRegMatrixWrapperPass::releaseMemory() { LRM.releaseMemory(); }
75+
void LiveRegMatrixWrapperLegacy::releaseMemory() { LRM.releaseMemory(); }
7676

7777
void LiveRegMatrix::releaseMemory() {
7878
for (unsigned i = 0, e = Matrix.size(); i != e; ++i) {

‎llvm/lib/CodeGen/RegAllocBasic.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -139,7 +139,7 @@ INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
139139
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
140140
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
141141
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
142-
INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperPass)
142+
INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperLegacy)
143143
INITIALIZE_PASS_END(RABasic, "regallocbasic", "Basic Register Allocator", false,
144144
false)
145145

@@ -190,8 +190,8 @@ void RABasic::getAnalysisUsage(AnalysisUsage &AU) const {
190190
AU.addPreserved<MachineLoopInfoWrapperPass>();
191191
AU.addRequired<VirtRegMapWrapperLegacy>();
192192
AU.addPreserved<VirtRegMapWrapperLegacy>();
193-
AU.addRequired<LiveRegMatrixWrapperPass>();
194-
AU.addPreserved<LiveRegMatrixWrapperPass>();
193+
AU.addRequired<LiveRegMatrixWrapperLegacy>();
194+
AU.addPreserved<LiveRegMatrixWrapperLegacy>();
195195
MachineFunctionPass::getAnalysisUsage(AU);
196196
}
197197

@@ -309,7 +309,7 @@ bool RABasic::runOnMachineFunction(MachineFunction &mf) {
309309
MF = &mf;
310310
RegAllocBase::init(getAnalysis<VirtRegMapWrapperLegacy>().getVRM(),
311311
getAnalysis<LiveIntervalsWrapperPass>().getLIS(),
312-
getAnalysis<LiveRegMatrixWrapperPass>().getLRM());
312+
getAnalysis<LiveRegMatrixWrapperLegacy>().getLRM());
313313
VirtRegAuxInfo VRAI(
314314
*MF, *LIS, *VRM, getAnalysis<MachineLoopInfoWrapperPass>().getLI(),
315315
getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI());

‎llvm/lib/CodeGen/RegAllocGreedy.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -163,7 +163,7 @@ INITIALIZE_PASS_DEPENDENCY(LiveStacks)
163163
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
164164
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
165165
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
166-
INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperPass)
166+
INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperLegacy)
167167
INITIALIZE_PASS_DEPENDENCY(EdgeBundles)
168168
INITIALIZE_PASS_DEPENDENCY(SpillPlacement)
169169
INITIALIZE_PASS_DEPENDENCY(MachineOptimizationRemarkEmitterPass)
@@ -217,8 +217,8 @@ void RAGreedy::getAnalysisUsage(AnalysisUsage &AU) const {
217217
AU.addPreserved<MachineLoopInfoWrapperPass>();
218218
AU.addRequired<VirtRegMapWrapperLegacy>();
219219
AU.addPreserved<VirtRegMapWrapperLegacy>();
220-
AU.addRequired<LiveRegMatrixWrapperPass>();
221-
AU.addPreserved<LiveRegMatrixWrapperPass>();
220+
AU.addRequired<LiveRegMatrixWrapperLegacy>();
221+
AU.addPreserved<LiveRegMatrixWrapperLegacy>();
222222
AU.addRequired<EdgeBundles>();
223223
AU.addRequired<SpillPlacement>();
224224
AU.addRequired<MachineOptimizationRemarkEmitterPass>();
@@ -2718,7 +2718,7 @@ bool RAGreedy::runOnMachineFunction(MachineFunction &mf) {
27182718

27192719
RegAllocBase::init(getAnalysis<VirtRegMapWrapperLegacy>().getVRM(),
27202720
getAnalysis<LiveIntervalsWrapperPass>().getLIS(),
2721-
getAnalysis<LiveRegMatrixWrapperPass>().getLRM());
2721+
getAnalysis<LiveRegMatrixWrapperLegacy>().getLRM());
27222722

27232723
// Early return if there is no virtual register to be allocated to a
27242724
// physical register.

‎llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,7 @@ class GCNNSAReassign : public MachineFunctionPass {
5050
void getAnalysisUsage(AnalysisUsage &AU) const override {
5151
AU.addRequired<LiveIntervalsWrapperPass>();
5252
AU.addRequired<VirtRegMapWrapperLegacy>();
53-
AU.addRequired<LiveRegMatrixWrapperPass>();
53+
AU.addRequired<LiveRegMatrixWrapperLegacy>();
5454
AU.setPreservesAll();
5555
MachineFunctionPass::getAnalysisUsage(AU);
5656
}
@@ -96,7 +96,7 @@ INITIALIZE_PASS_BEGIN(GCNNSAReassign, DEBUG_TYPE, "GCN NSA Reassign",
9696
false, false)
9797
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
9898
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
99-
INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperPass)
99+
INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperLegacy)
100100
INITIALIZE_PASS_END(GCNNSAReassign, DEBUG_TYPE, "GCN NSA Reassign",
101101
false, false)
102102

@@ -243,7 +243,7 @@ bool GCNNSAReassign::runOnMachineFunction(MachineFunction &MF) {
243243
MRI = &MF.getRegInfo();
244244
TRI = ST->getRegisterInfo();
245245
VRM = &getAnalysis<VirtRegMapWrapperLegacy>().getVRM();
246-
LRM = &getAnalysis<LiveRegMatrixWrapperPass>().getLRM();
246+
LRM = &getAnalysis<LiveRegMatrixWrapperLegacy>().getLRM();
247247
LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
248248

249249
const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();

‎llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -61,7 +61,7 @@ class SIPreAllocateWWMRegs : public MachineFunctionPass {
6161
void getAnalysisUsage(AnalysisUsage &AU) const override {
6262
AU.addRequired<LiveIntervalsWrapperPass>();
6363
AU.addRequired<VirtRegMapWrapperLegacy>();
64-
AU.addRequired<LiveRegMatrixWrapperPass>();
64+
AU.addRequired<LiveRegMatrixWrapperLegacy>();
6565
AU.setPreservesAll();
6666
MachineFunctionPass::getAnalysisUsage(AU);
6767
}
@@ -77,7 +77,7 @@ INITIALIZE_PASS_BEGIN(SIPreAllocateWWMRegs, DEBUG_TYPE,
7777
"SI Pre-allocate WWM Registers", false, false)
7878
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
7979
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
80-
INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperPass)
80+
INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperLegacy)
8181
INITIALIZE_PASS_END(SIPreAllocateWWMRegs, DEBUG_TYPE,
8282
"SI Pre-allocate WWM Registers", false, false)
8383

@@ -194,7 +194,7 @@ bool SIPreAllocateWWMRegs::runOnMachineFunction(MachineFunction &MF) {
194194
MRI = &MF.getRegInfo();
195195

196196
LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
197-
Matrix = &getAnalysis<LiveRegMatrixWrapperPass>().getLRM();
197+
Matrix = &getAnalysis<LiveRegMatrixWrapperLegacy>().getLRM();
198198
VRM = &getAnalysis<VirtRegMapWrapperLegacy>().getVRM();
199199

200200
RegClassInfo.runOnMachineFunction(MF);

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