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AllowVGPRToVGPRSpill -> CombineVGPRSavings
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-20
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llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp

Lines changed: 22 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1705,14 +1705,16 @@ struct ExcessRP {
17051705
bool HasAGPRs = false;
17061706
/// Whether the subtarget has a unified RF.
17071707
bool UnifiedRF;
1708-
/// Whether we consider that ArchVGPRs can be spilled to AGPRs and the other
1709-
/// way around.
1710-
bool AllowVGPRToVGPRSpill;
1708+
/// Whether we consider that the register allocator will be able to swap
1709+
/// between ArchVGPRs and AGPRs by copying them to a super register class.
1710+
/// Concretely, this allows savings of one kind of VGPR to help toward savings
1711+
/// the other kind of VGPR.
1712+
bool CombineVGPRSavings;
17111713

17121714
/// Constructs the excess RP model; determines the excess pressure w.r.t. a
17131715
/// maximum number of allowed SGPRs/VGPRs.
17141716
ExcessRP(const GCNSubtarget &ST, const GCNRegPressure &RP, unsigned MaxSGPRs,
1715-
unsigned MaxVGPRs, bool AllowVGPRToVGPRSpill);
1717+
unsigned MaxVGPRs, bool CombineVGPRSavings);
17161718

17171719
/// Accounts for \p NumRegs saved SGPRs in the model. Returns whether saving
17181720
/// these SGPRs helped reduce excess pressure.
@@ -1751,9 +1753,8 @@ struct ExcessRP {
17511753

17521754
ExcessRP::ExcessRP(const GCNSubtarget &ST, const GCNRegPressure &RP,
17531755
unsigned MaxSGPRs, unsigned MaxVGPRs,
1754-
bool AllowVGPRToVGPRSpill)
1755-
: UnifiedRF(ST.hasGFX90AInsts()),
1756-
AllowVGPRToVGPRSpill(AllowVGPRToVGPRSpill) {
1756+
bool CombineVGPRSavings)
1757+
: UnifiedRF(ST.hasGFX90AInsts()), CombineVGPRSavings(CombineVGPRSavings) {
17571758
// Compute excess SGPR pressure.
17581759
unsigned NumSGPRs = RP.getSGPRNum();
17591760
if (NumSGPRs > MaxSGPRs)
@@ -1804,9 +1805,9 @@ bool ExcessRP::saveArchVGPRs(unsigned NumRegs) {
18041805
return Progress;
18051806

18061807
if (!UnifiedRF) {
1807-
if (AllowVGPRToVGPRSpill)
1808+
if (CombineVGPRSavings)
18081809
Progress |= saveRegs(AGPRs, NumRegs);
1809-
} else if (HasAGPRs && (VGPRs || (AllowVGPRToVGPRSpill && AGPRs))) {
1810+
} else if (HasAGPRs && (VGPRs || (CombineVGPRSavings && AGPRs))) {
18101811
// There is progress as long as there are VGPRs left to save, even if the
18111812
// save induced by this particular call does not cross an ArchVGPR alignment
18121813
// barrier.
@@ -1830,10 +1831,10 @@ bool ExcessRP::saveArchVGPRs(unsigned NumRegs) {
18301831
ArchVGPRsToAlignment -= NumRegs;
18311832
}
18321833

1833-
// Prioritize saving generic VGPRs, then AGPRs if we allow AGPR-to-ArchVGPR
1834-
// spilling and have some free ArchVGPR slots.
1834+
// Prioritize saving generic VGPRs, then AGPRs if we consider that the
1835+
// register allocator will be able to replace an AGPR with an ArchVGPR.
18351836
saveRegs(VGPRs, NumSavedRegs);
1836-
if (AllowVGPRToVGPRSpill)
1837+
if (CombineVGPRSavings)
18371838
saveRegs(AGPRs, NumSavedRegs);
18381839
} else {
18391840
// No AGPR usage in the region i.e., no allocation granule to worry about.
@@ -1846,7 +1847,7 @@ bool ExcessRP::saveAGPRs(unsigned NumRegs) {
18461847
bool Progress = saveRegs(AGPRs, NumRegs);
18471848
if (UnifiedRF)
18481849
Progress |= saveRegs(VGPRs, NumRegs);
1849-
if (AllowVGPRToVGPRSpill)
1850+
if (CombineVGPRSavings)
18501851
Progress |= saveRegs(ArchVGPRs, NumRegs);
18511852
return Progress;
18521853
}
@@ -1878,13 +1879,14 @@ bool PreRARematStage::canIncreaseOccupancyOrReduceSpill() {
18781879
// one in the whole function.
18791880
for (unsigned I = 0, E = DAG.Regions.size(); I != E; ++I) {
18801881
GCNRegPressure &RP = DAG.Pressure[I];
1881-
// We allow saved VGPRs of one category (ArchVGPR or AGPR) to be considered
1882-
// as free spill slots for the other category only when we are just trying
1883-
// to eliminate spilling. At this point we err on the conservative side and
1884-
// do not increase register-to-register spilling for the sake of increasing
1885-
// occupancy.
1882+
// We allow ArchVGPR or AGPR savings to count as savings of the other kind
1883+
// of VGPR only when trying to eliminate spilling. We cannot do this when
1884+
// trying to increase occupancy since VGPR class swaps only occur later in
1885+
// the register allocator i.e., the scheduler will not be able to reason
1886+
// about these savings and will not report an increase in the achievable
1887+
// occupancy, triggering rollbacks.
18861888
ExcessRP Excess(ST, RP, MaxSGPRsNoSpill, MaxVGPRsNoSpill,
1887-
/*AllowVGPRToVGPRSpill=*/true);
1889+
/*CombineVGPRSavings=*/true);
18881890
if (Excess && IncreaseOccupancy) {
18891891
// There is spilling in the region and we were so far trying to increase
18901892
// occupancy. Strop trying that and focus on reducing spilling.
@@ -1893,7 +1895,7 @@ bool PreRARematStage::canIncreaseOccupancyOrReduceSpill() {
18931895
} else if (IncreaseOccupancy) {
18941896
// There is no spilling in the region, try to increase occupancy.
18951897
Excess = ExcessRP(ST, RP, MaxSGPRsIncOcc, MaxVGPRsIncOcc,
1896-
/*AllowVGPRToVGPRSpill=*/false);
1898+
/*CombineVGPRSavings=*/false);
18971899
}
18981900
if (Excess)
18991901
OptRegions.insert({I, Excess});

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