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[ELF] Pass Ctx & to some free functions
1 parent 35f1966 commit cfd3289

27 files changed

+80
-77
lines changed

‎lld/ELF/ARMErrataFix.cpp

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -70,7 +70,8 @@ using namespace lld::elf;
7070

7171
class elf::Patch657417Section final : public SyntheticSection {
7272
public:
73-
Patch657417Section(InputSection *p, uint64_t off, uint32_t instr, bool isARM);
73+
Patch657417Section(Ctx &, InputSection *p, uint64_t off, uint32_t instr,
74+
bool isARM);
7475

7576
void writeTo(Ctx &, uint8_t *buf) override;
7677

@@ -133,7 +134,7 @@ static bool is32bitBranch(uint32_t instr) {
133134
return isBcc(instr) || isB(instr) || isBL(instr) || isBLX(instr);
134135
}
135136

136-
Patch657417Section::Patch657417Section(InputSection *p, uint64_t off,
137+
Patch657417Section::Patch657417Section(Ctx &ctx, InputSection *p, uint64_t off,
137138
uint32_t instr, bool isARM)
138139
: SyntheticSection(SHF_ALLOC | SHF_EXECINSTR, SHT_PROGBITS, 4,
139140
".text.patch"),
@@ -449,7 +450,7 @@ static void implementPatch(ScanResult sr, InputSection *isec,
449450
: sr.rel->sym->getVA();
450451
destIsARM = (dstSymAddr & 1) == 0;
451452
}
452-
psec = make<Patch657417Section>(isec, sr.off, sr.instr, destIsARM);
453+
psec = make<Patch657417Section>(ctx, isec, sr.off, sr.instr, destIsARM);
453454
if (destIsARM) {
454455
// The patch will be in ARM state. Use an ARM relocation and account for
455456
// the larger ARM PC-bias of 8 rather than Thumb's 4.
@@ -467,7 +468,8 @@ static void implementPatch(ScanResult sr, InputSection *isec,
467468
// appropriate type to the patch at patcheeOffset.
468469

469470
// The destination is ARM if we have a BLX.
470-
psec = make<Patch657417Section>(isec, sr.off, sr.instr, isBLX(sr.instr));
471+
psec =
472+
make<Patch657417Section>(ctx, isec, sr.off, sr.instr, isBLX(sr.instr));
471473
RelType type;
472474
if (isBcc(sr.instr))
473475
type = R_ARM_THM_JUMP19;

‎lld/ELF/Arch/AArch64.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -213,7 +213,7 @@ RelExpr AArch64::getRelExpr(RelType type, const Symbol &s,
213213
case R_AARCH64_NONE:
214214
return R_NONE;
215215
default:
216-
error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) +
216+
error(getErrorLoc(ctx, loc) + "unknown relocation (" + Twine(type) +
217217
") against symbol " + toString(s));
218218
return R_NONE;
219219
}
@@ -348,7 +348,7 @@ int64_t AArch64::getImplicitAddend(const uint8_t *buf, RelType type) const {
348348
return SignExtend64<28>(getBits(read32le(buf), 0, 25) << 2);
349349

350350
default:
351-
internalLinkerError(getErrorLocation(buf),
351+
internalLinkerError(getErrorLoc(ctx, buf),
352352
"cannot read addend for relocation " + toString(type));
353353
return 0;
354354
}

‎lld/ELF/Arch/AMDGPU.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -193,7 +193,7 @@ RelExpr AMDGPU::getRelExpr(RelType type, const Symbol &s,
193193
case R_AMDGPU_GOTPCREL32_HI:
194194
return R_GOT_PC;
195195
default:
196-
error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) +
196+
error(getErrorLoc(ctx, loc) + "unknown relocation (" + Twine(type) +
197197
") against symbol " + toString(s));
198198
return R_NONE;
199199
}
@@ -213,7 +213,7 @@ int64_t AMDGPU::getImplicitAddend(const uint8_t *buf, RelType type) const {
213213
case R_AMDGPU_RELATIVE64:
214214
return read64(buf);
215215
default:
216-
internalLinkerError(getErrorLocation(buf),
216+
internalLinkerError(getErrorLoc(ctx, buf),
217217
"cannot read addend for relocation " + toString(type));
218218
return 0;
219219
}

‎lld/ELF/Arch/ARM.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -191,7 +191,7 @@ RelExpr ARM::getRelExpr(RelType type, const Symbol &s,
191191
// not ARMv4 output, we can just ignore it.
192192
return R_NONE;
193193
default:
194-
error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) +
194+
error(getErrorLoc(ctx, loc) + "unknown relocation (" + Twine(type) +
195195
") against symbol " + toString(s));
196196
return R_NONE;
197197
}
@@ -505,7 +505,7 @@ static void stateChangeWarning(Ctx &ctx, uint8_t *loc, RelType relt,
505505
" ; interworking not performed" + hint);
506506
} else {
507507
// Warn with hint on how to alter the symbol type.
508-
warn(getErrorLocation(loc) + "branch and link relocation: " +
508+
warn(getErrorLoc(ctx, loc) + "branch and link relocation: " +
509509
toString(relt) + " to non STT_FUNC symbol: " + s.getName() +
510510
" interworking not performed; consider using directive '.type " +
511511
s.getName() +
@@ -552,7 +552,7 @@ static void encodeAluGroup(uint8_t *loc, const Relocation &rel, uint64_t val,
552552
rot = (lz + 8) << 7;
553553
}
554554
if (check && imm > 0xff)
555-
error(getErrorLocation(loc) + "unencodeable immediate " + Twine(val).str() +
555+
error(getErrorLoc(ctx, loc) + "unencodeable immediate " + Twine(val).str() +
556556
" for relocation " + toString(rel.type));
557557
write32(loc, (read32(loc) & 0xff3ff000) | opcode | rot | (imm & 0xff));
558558
}
@@ -863,7 +863,7 @@ void ARM::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
863863
int64_t ARM::getImplicitAddend(const uint8_t *buf, RelType type) const {
864864
switch (type) {
865865
default:
866-
internalLinkerError(getErrorLocation(buf),
866+
internalLinkerError(getErrorLoc(ctx, buf),
867867
"cannot read addend for relocation " + toString(type));
868868
return 0;
869869
case R_ARM_ABS32:

‎lld/ELF/Arch/AVR.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -93,7 +93,7 @@ RelExpr AVR::getRelExpr(RelType type, const Symbol &s,
9393
case R_AVR_13_PCREL:
9494
return R_PC;
9595
default:
96-
error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) +
96+
error(getErrorLoc(ctx, loc) + "unknown relocation (" + Twine(type) +
9797
") against symbol " + toString(s));
9898
return R_NONE;
9999
}

‎lld/ELF/Arch/Hexagon.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -153,7 +153,7 @@ RelExpr Hexagon::getRelExpr(RelType type, const Symbol &s,
153153
case R_HEX_TPREL_LO16:
154154
return R_TPREL;
155155
default:
156-
error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) +
156+
error(getErrorLoc(ctx, loc) + "unknown relocation (" + Twine(type) +
157157
") against symbol " + toString(s));
158158
return R_NONE;
159159
}
@@ -398,7 +398,7 @@ int64_t Hexagon::getImplicitAddend(const uint8_t *buf, RelType type) const {
398398
case R_HEX_TPREL_32:
399399
return SignExtend64<32>(read32(buf));
400400
default:
401-
internalLinkerError(getErrorLocation(buf),
401+
internalLinkerError(getErrorLoc(ctx, buf),
402402
"cannot read addend for relocation " + toString(type));
403403
return 0;
404404
}

‎lld/ELF/Arch/LoongArch.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -165,7 +165,7 @@ static void handleUleb128(uint8_t *loc, uint64_t val) {
165165
const char *error = nullptr;
166166
uint64_t orig = decodeULEB128(loc, &count, nullptr, &error);
167167
if (count > maxcount || (count == maxcount && error))
168-
errorOrWarn(getErrorLocation(loc) + "extra space for uleb128");
168+
errorOrWarn(getErrorLoc(ctx, loc) + "extra space for uleb128");
169169
uint64_t mask = count < maxcount ? (1ULL << 7 * count) - 1 : -1ULL;
170170
encodeULEB128((orig + val) & mask, loc, count);
171171
}
@@ -279,7 +279,7 @@ uint32_t LoongArch::calcEFlags() const {
279279
int64_t LoongArch::getImplicitAddend(const uint8_t *buf, RelType type) const {
280280
switch (type) {
281281
default:
282-
internalLinkerError(getErrorLocation(buf),
282+
internalLinkerError(getErrorLoc(ctx, buf),
283283
"cannot read addend for relocation " + toString(type));
284284
return 0;
285285
case R_LARCH_32:
@@ -528,7 +528,7 @@ RelExpr LoongArch::getRelExpr(const RelType type, const Symbol &s,
528528
//
529529
// [1]: https://web.archive.org/web/20230709064026/https://github.com/loongson/LoongArch-Documentation/issues/51
530530
default:
531-
error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) +
531+
error(getErrorLoc(ctx, loc) + "unknown relocation (" + Twine(type) +
532532
") against symbol " + toString(s));
533533
return R_NONE;
534534
}
@@ -774,7 +774,7 @@ static bool relax(InputSection &sec) {
774774
remove = allBytes - curBytes;
775775
// If we can't satisfy this alignment, we've found a bad input.
776776
if (LLVM_UNLIKELY(static_cast<int32_t>(remove) < 0)) {
777-
errorOrWarn(getErrorLocation((const uint8_t *)loc) +
777+
errorOrWarn(getErrorLoc(ctx, (const uint8_t *)loc) +
778778
"insufficient padding bytes for " + lld::toString(r.type) +
779779
": " + Twine(allBytes) + " bytes available for " +
780780
"requested alignment of " + Twine(align) + " bytes");

‎lld/ELF/Arch/MSP430.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -83,7 +83,7 @@ void MSP430::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
8383
break;
8484
}
8585
default:
86-
error(getErrorLocation(loc) + "unrecognized relocation " +
86+
error(getErrorLoc(ctx, loc) + "unrecognized relocation " +
8787
toString(rel.type));
8888
}
8989
}

‎lld/ELF/Arch/Mips.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -87,7 +87,7 @@ RelExpr MIPS<ELFT>::getRelExpr(RelType type, const Symbol &s,
8787
// (e.g. a table of function pointers). When we encounter this, ignore the
8888
// relocation and emit a warning instead.
8989
if (!s.isFunc() && s.type != STT_NOTYPE) {
90-
warn(getErrorLocation(loc) +
90+
warn(getErrorLoc(ctx, loc) +
9191
"found R_MIPS_JALR relocation against non-function symbol " +
9292
toString(s) + ". This is invalid and most likely a compiler bug.");
9393
return R_NONE;
@@ -191,7 +191,7 @@ RelExpr MIPS<ELFT>::getRelExpr(RelType type, const Symbol &s,
191191
case R_MIPS_NONE:
192192
return R_NONE;
193193
default:
194-
error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) +
194+
error(getErrorLoc(ctx, loc) + "unknown relocation (" + Twine(type) +
195195
") against symbol " + toString(s));
196196
return R_NONE;
197197
}
@@ -473,7 +473,7 @@ int64_t MIPS<ELFT>::getImplicitAddend(const uint8_t *buf, RelType type) const {
473473
// These relocations are defined as not having an implicit addend.
474474
return 0;
475475
default:
476-
internalLinkerError(getErrorLocation(buf),
476+
internalLinkerError(getErrorLoc(ctx, buf),
477477
"cannot read addend for relocation " + toString(type));
478478
return 0;
479479
}
@@ -501,7 +501,7 @@ calculateMipsRelChain(uint8_t *loc, RelType type, uint64_t val) {
501501
return std::make_pair(type2, val);
502502
if (type2 == R_MIPS_SUB && (type3 == R_MIPS_HI16 || type3 == R_MIPS_LO16))
503503
return std::make_pair(type3, -val);
504-
error(getErrorLocation(loc) + "unsupported relocations combination " +
504+
error(getErrorLoc(ctx, loc) + "unsupported relocations combination " +
505505
Twine(type));
506506
return std::make_pair(type & 0xff, val);
507507
}
@@ -559,7 +559,7 @@ static uint64_t fixupCrossModeJump(uint8_t *loc, RelType type, uint64_t val) {
559559
llvm_unreachable("unexpected jump/branch relocation");
560560
}
561561

562-
error(getErrorLocation(loc) +
562+
error(getErrorLoc(ctx, loc) +
563563
"unsupported jump/branch instruction between ISA modes referenced by " +
564564
toString(type) + " relocation");
565565
return val;

‎lld/ELF/Arch/PPC.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -265,7 +265,7 @@ RelExpr PPC::getRelExpr(RelType type, const Symbol &s,
265265
case R_PPC_TPREL16_HI:
266266
return R_TPREL;
267267
default:
268-
error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) +
268+
error(getErrorLoc(ctx, loc) + "unknown relocation (" + Twine(type) +
269269
") against symbol " + toString(s));
270270
return R_NONE;
271271
}
@@ -292,7 +292,7 @@ int64_t PPC::getImplicitAddend(const uint8_t *buf, RelType type) const {
292292
case R_PPC_TPREL32:
293293
return SignExtend64<32>(read32(buf));
294294
default:
295-
internalLinkerError(getErrorLocation(buf),
295+
internalLinkerError(getErrorLoc(ctx, buf),
296296
"cannot read addend for relocation " + toString(type));
297297
return 0;
298298
}

‎lld/ELF/Arch/PPC64.cpp

Lines changed: 7 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1097,7 +1097,7 @@ RelExpr PPC64::getRelExpr(RelType type, const Symbol &s,
10971097
case R_PPC64_TLS:
10981098
return R_TLSIE_HINT;
10991099
default:
1100-
error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) +
1100+
error(getErrorLoc(ctx, loc) + "unknown relocation (" + Twine(type) +
11011101
") against symbol " + toString(s));
11021102
return R_NONE;
11031103
}
@@ -1126,7 +1126,7 @@ int64_t PPC64::getImplicitAddend(const uint8_t *buf, RelType type) const {
11261126
case R_PPC64_TPREL64:
11271127
return read64(buf);
11281128
default:
1129-
internalLinkerError(getErrorLocation(buf),
1129+
internalLinkerError(getErrorLoc(ctx, buf),
11301130
"cannot read addend for relocation " + toString(type));
11311131
return 0;
11321132
}
@@ -1332,9 +1332,8 @@ void PPC64::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
13321332
if (ctx.arg.tocOptimize && shouldTocOptimize && ha(val) == 0) {
13331333
uint32_t insn = readFromHalf16(ctx, loc);
13341334
if (isInstructionUpdateForm(insn))
1335-
error(getErrorLocation(loc) +
1336-
"can't toc-optimize an update instruction: 0x" +
1337-
utohexstr(insn));
1335+
error(getErrorLoc(ctx, loc) +
1336+
"can't toc-optimize an update instruction: 0x" + utohexstr(insn));
13381337
writeFromHalf16(ctx, loc, (insn & 0xffe00000) | 0x00020000 | lo(val));
13391338
} else {
13401339
write16(loc, lo(val));
@@ -1352,7 +1351,7 @@ void PPC64::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
13521351
// changed into a nop. The lo part then needs to be updated to use the toc
13531352
// pointer register r2, as the base register.
13541353
if (isInstructionUpdateForm(insn))
1355-
error(getErrorLocation(loc) +
1354+
error(getErrorLoc(ctx, loc) +
13561355
"Can't toc-optimize an update instruction: 0x" +
13571356
Twine::utohexstr(insn));
13581357
insn &= 0xffe00000 | mask;
@@ -1612,7 +1611,7 @@ void PPC64::relocateAlloc(InputSectionBase &sec, uint8_t *buf) const {
16121611
read32(loc + 4) != 0x60000000) &&
16131612
rel.sym->file != sec.file) {
16141613
// Use substr(6) to remove the "__plt_" prefix.
1615-
errorOrWarn(getErrorLocation(loc) + "call to " +
1614+
errorOrWarn(getErrorLoc(ctx, loc) + "call to " +
16161615
lld::toString(*rel.sym).substr(6) +
16171616
" lacks nop, can't restore toc");
16181617
break;
@@ -1725,7 +1724,7 @@ bool PPC64::adjustPrologueForCrossSplitStack(uint8_t *loc, uint8_t *end,
17251724
// Check that the adjusted size doesn't overflow what we can represent with 2
17261725
// instructions.
17271726
if (stackFrameSize < ctx.arg.splitStackAdjustSize + INT32_MIN) {
1728-
error(getErrorLocation(loc) + "split-stack prologue adjustment overflows");
1727+
error(getErrorLoc(ctx, loc) + "split-stack prologue adjustment overflows");
17291728
return false;
17301729
}
17311730

‎lld/ELF/Arch/RISCV.cpp

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -172,7 +172,7 @@ uint32_t RISCV::calcEFlags() const {
172172
int64_t RISCV::getImplicitAddend(const uint8_t *buf, RelType type) const {
173173
switch (type) {
174174
default:
175-
internalLinkerError(getErrorLocation(buf),
175+
internalLinkerError(getErrorLoc(ctx, buf),
176176
"cannot read addend for relocation " + toString(type));
177177
return 0;
178178
case R_RISCV_32:
@@ -325,7 +325,7 @@ RelExpr RISCV::getRelExpr(const RelType type, const Symbol &s,
325325
case R_RISCV_SUB_ULEB128:
326326
return R_RISCV_LEB128;
327327
default:
328-
error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) +
328+
error(getErrorLoc(ctx, loc) + "unknown relocation (" + Twine(type) +
329329
") against symbol " + toString(s));
330330
return R_NONE;
331331
}
@@ -831,10 +831,12 @@ static bool relax(Ctx &ctx, InputSection &sec) {
831831
remove = nextLoc - ((loc + align - 1) & -align);
832832
// If we can't satisfy this alignment, we've found a bad input.
833833
if (LLVM_UNLIKELY(static_cast<int32_t>(remove) < 0)) {
834-
errorOrWarn(getErrorLocation((const uint8_t*)loc) +
834+
errorOrWarn(getErrorLoc(ctx, (const uint8_t *)loc) +
835835
"insufficient padding bytes for " + lld::toString(r.type) +
836-
": " + Twine(r.addend) + " bytes available "
837-
"for requested alignment of " + Twine(align) + " bytes");
836+
": " + Twine(r.addend) +
837+
" bytes available "
838+
"for requested alignment of " +
839+
Twine(align) + " bytes");
838840
remove = 0;
839841
}
840842
break;

‎lld/ELF/Arch/SPARCV9.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -78,7 +78,7 @@ RelExpr SPARCV9::getRelExpr(RelType type, const Symbol &s,
7878
case R_SPARC_TLS_LE_LOX10:
7979
return R_TPREL;
8080
default:
81-
error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) +
81+
error(getErrorLoc(ctx, loc) + "unknown relocation (" + Twine(type) +
8282
") against symbol " + toString(s));
8383
return R_NONE;
8484
}

‎lld/ELF/Arch/SystemZ.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -170,7 +170,7 @@ RelExpr SystemZ::getRelExpr(RelType type, const Symbol &s,
170170
return R_GOT_PC;
171171

172172
default:
173-
error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) +
173+
error(getErrorLoc(ctx, loc) + "unknown relocation (" + Twine(type) +
174174
") against symbol " + toString(s));
175175
return R_NONE;
176176
}
@@ -261,7 +261,7 @@ int64_t SystemZ::getImplicitAddend(const uint8_t *buf, RelType type) const {
261261
// These relocations are defined as not having an implicit addend.
262262
return 0;
263263
default:
264-
internalLinkerError(getErrorLocation(buf),
264+
internalLinkerError(getErrorLoc(ctx, buf),
265265
"cannot read addend for relocation " + toString(type));
266266
return 0;
267267
}

‎lld/ELF/Arch/X86.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -145,7 +145,7 @@ RelExpr X86::getRelExpr(RelType type, const Symbol &s,
145145
case R_386_NONE:
146146
return R_NONE;
147147
default:
148-
error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) +
148+
error(getErrorLoc(ctx, loc) + "unknown relocation (" + Twine(type) +
149149
") against symbol " + toString(s));
150150
return R_NONE;
151151
}
@@ -274,7 +274,7 @@ int64_t X86::getImplicitAddend(const uint8_t *buf, RelType type) const {
274274
// These relocations are defined as not having an implicit addend.
275275
return 0;
276276
default:
277-
internalLinkerError(getErrorLocation(buf),
277+
internalLinkerError(getErrorLoc(ctx, buf),
278278
"cannot read addend for relocation " + toString(type));
279279
return 0;
280280
}
@@ -365,7 +365,7 @@ static void relaxTlsGdToLe(uint8_t *loc, const Relocation &rel, uint64_t val) {
365365
//
366366
// Note: call *x@tlsdesc(%eax) may not immediately follow this instruction.
367367
if (memcmp(loc - 2, "\x8d\x83", 2)) {
368-
error(getErrorLocation(loc - 2) +
368+
error(getErrorLoc(ctx, loc - 2) +
369369
"R_386_TLS_GOTDESC must be used in leal x@tlsdesc(%ebx), %eax");
370370
return;
371371
}
@@ -397,7 +397,7 @@ static void relaxTlsGdToIe(uint8_t *loc, const Relocation &rel, uint64_t val) {
397397
} else if (rel.type == R_386_TLS_GOTDESC) {
398398
// Convert leal x@tlsdesc(%ebx), %eax to movl x@gotntpoff(%ebx), %eax.
399399
if (memcmp(loc - 2, "\x8d\x83", 2)) {
400-
error(getErrorLocation(loc - 2) +
400+
error(getErrorLoc(ctx, loc - 2) +
401401
"R_386_TLS_GOTDESC must be used in leal x@tlsdesc(%ebx), %eax");
402402
return;
403403
}

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