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!fixup adjust BTC check, match sure latch non-null, thanks
1 parent 1e4674e commit cffd7b6

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2 files changed

+101
-39
lines changed

2 files changed

+101
-39
lines changed

‎llvm/lib/Transforms/Utils/LoopPeel.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -336,7 +336,7 @@ bool llvm::canPeelLastIteration(const Loop &L, ScalarEvolution &SE) {
336336
// iteration executes.
337337
// TODO: Add checks during codegen.
338338
if (isa<SCEVCouldNotCompute>(BTC) ||
339-
!SE.isKnownPredicate(CmpInst::ICMP_UGT, BTC, SE.getOne(BTC->getType())))
339+
!SE.isKnownPredicate(CmpInst::ICMP_UGT, BTC, SE.getZero(BTC->getType())))
340340
return false;
341341

342342
// Check if the exit condition of the loop can be adjusted by the peeling
@@ -345,7 +345,7 @@ bool llvm::canPeelLastIteration(const Loop &L, ScalarEvolution &SE) {
345345
// * the exit condition must be a NE/EQ compare of an induction with step
346346
// of 1.
347347
BasicBlock *Latch = L.getLoopLatch();
348-
return Latch == L.getExitingBlock() &&
348+
return Latch && Latch == L.getExitingBlock() &&
349349
match(Latch->getTerminator(),
350350
m_Br(m_ICmp(Pred, m_Value(Inc), m_Value()), m_BasicBlock(Succ1),
351351
m_BasicBlock(Succ2))) &&

‎llvm/test/Transforms/LoopUnroll/peel-last-iteration.ll

Lines changed: 99 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -85,48 +85,28 @@ define i64 @peel_single_block_loop_iv_step_1_eq_pred() {
8585
; CHECK-NEXT: [[ENTRY:.*]]:
8686
; CHECK-NEXT: br label %[[LOOP:.*]]
8787
; CHECK: [[LOOP]]:
88-
<<<<<<< HEAD
89-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
90-
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV]], 63
91-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 10, i32 20
92-
; CHECK-NEXT: call void @foo(i32 [[COND]])
93-
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
94-
; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 64
95-
; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
96-
; CHECK: [[EXIT]]:
97-
||||||| parent of 4da8bc5afc5b (!fixup address latest comments, thanks)
98-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
99-
; CHECK-NEXT: [[CMP18_NOT:%.*]] = icmp eq i64 [[IV]], 63
100-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP18_NOT]], i32 10, i32 20
101-
; CHECK-NEXT: call void @foo(i32 [[COND]])
102-
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
103-
; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 64
104-
; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
105-
; CHECK: [[EXIT]]:
106-
=======
107-
; CHECK-NEXT: [[IV1:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV:%.*]], %[[LOOP]] ]
88+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_LCSSA:%.*]], %[[LOOP]] ]
10889
; CHECK-NEXT: call void @foo(i32 20)
109-
; CHECK-NEXT: [[IV]] = add nuw nsw i64 [[IV1]], 1
110-
; CHECK-NEXT: [[CMP18_NOT:%.*]] = icmp eq i64 [[IV]], 63
111-
; CHECK-NEXT: br i1 [[CMP18_NOT]], label %[[EXIT_PEEL_BEGIN:.*]], label %[[LOOP]], !llvm.loop [[LOOP2:![0-9]+]]
90+
; CHECK-NEXT: [[IV_LCSSA]] = add nuw nsw i64 [[IV]], 1
91+
; CHECK-NEXT: [[CMP_PEEL:%.*]] = icmp eq i64 [[IV_LCSSA]], 63
92+
; CHECK-NEXT: br i1 [[CMP_PEEL]], label %[[EXIT_PEEL_BEGIN:.*]], label %[[LOOP]], !llvm.loop [[LOOP2:![0-9]+]]
11293
; CHECK: [[EXIT_PEEL_BEGIN]]:
113-
>>>>>>> 4da8bc5afc5b (!fixup address latest comments, thanks)
114-
; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i64 [ [[IV]], %[[LOOP]] ]
115-
; CHECK-NEXT: [[IV_LCSSA1:%.*]] = phi i64 [ [[IV1]], %[[LOOP]] ]
94+
; CHECK-NEXT: [[IV_NEXT_LCSSA:%.*]] = phi i64 [ [[IV_LCSSA]], %[[LOOP]] ]
95+
; CHECK-NEXT: [[IV_LCSSA1:%.*]] = phi i64 [ [[IV]], %[[LOOP]] ]
11696
; CHECK-NEXT: br label %[[LOOP_PEEL:.*]]
11797
; CHECK: [[LOOP_PEEL]]:
118-
; CHECK-NEXT: [[CMP_PEEL:%.*]] = icmp eq i64 [[IV_LCSSA]], 63
119-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP_PEEL]], i32 10, i32 20
98+
; CHECK-NEXT: [[CMP_PEEL1:%.*]] = icmp eq i64 [[IV_NEXT_LCSSA]], 63
99+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP_PEEL1]], i32 10, i32 20
120100
; CHECK-NEXT: call void @foo(i32 [[COND]])
121-
; CHECK-NEXT: [[IV_NEXT:%.*]] = add i64 [[IV_LCSSA]], 1
101+
; CHECK-NEXT: [[IV_NEXT:%.*]] = add i64 [[IV_NEXT_LCSSA]], 1
122102
; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 64
123103
; CHECK-NEXT: br i1 [[EC]], label %[[EXIT_PEEL_NEXT:.*]], label %[[EXIT_PEEL_NEXT]]
124104
; CHECK: [[EXIT_PEEL_NEXT]]:
125105
; CHECK-NEXT: br label %[[LOOP_PEEL_NEXT:.*]]
126106
; CHECK: [[LOOP_PEEL_NEXT]]:
127107
; CHECK-NEXT: br label %[[EXIT:.*]]
128108
; CHECK: [[EXIT]]:
129-
; CHECK-NEXT: ret i64 [[IV_LCSSA]]
109+
; CHECK-NEXT: ret i64 [[IV_NEXT_LCSSA]]
130110
;
131111
entry:
132112
br label %loop
@@ -184,7 +164,35 @@ define i64 @peel_single_block_loop_iv_step_1_nested_loop() {
184164
; CHECK-NEXT: [[OUTER_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[OUTER_IV_NEXT:%.*]], %[[OUTER_LATCH:.*]] ]
185165
; CHECK-NEXT: br label %[[LOOP:.*]]
186166
; CHECK: [[LOOP]]:
187-
<<<;
167+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[OUTER_HEADER]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
168+
; CHECK-NEXT: call void @foo(i32 20)
169+
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
170+
; CHECK-NEXT: [[EC:%.*]] = icmp ne i64 [[IV_NEXT]], 63
171+
; CHECK-NEXT: br i1 [[EC]], label %[[LOOP]], label %[[OUTER_LATCH_PEEL_BEGIN:.*]], !llvm.loop [[LOOP3:![0-9]+]]
172+
; CHECK: [[OUTER_LATCH_PEEL_BEGIN]]:
173+
; CHECK-NEXT: [[IV_NEXT_LCSSA:%.*]] = phi i64 [ [[IV_NEXT]], %[[LOOP]] ]
174+
; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i64 [ [[IV]], %[[LOOP]] ]
175+
; CHECK-NEXT: br label %[[LOOP_PEEL:.*]]
176+
; CHECK: [[LOOP_PEEL]]:
177+
; CHECK-NEXT: [[CMP_PEEL:%.*]] = icmp eq i64 [[IV_NEXT_LCSSA]], 63
178+
; CHECK-NEXT: [[COND_PEEL:%.*]] = select i1 [[CMP_PEEL]], i32 10, i32 20
179+
; CHECK-NEXT: call void @foo(i32 [[COND_PEEL]])
180+
; CHECK-NEXT: [[IV_NEXT_PEEL:%.*]] = add i64 [[IV_NEXT_LCSSA]], 1
181+
; CHECK-NEXT: [[EC_PEEL:%.*]] = icmp ne i64 [[IV_NEXT_PEEL]], 64
182+
; CHECK-NEXT: br i1 [[EC_PEEL]], label %[[OUTER_LATCH_PEEL_NEXT:.*]], label %[[OUTER_LATCH_PEEL_NEXT]]
183+
; CHECK: [[OUTER_LATCH_PEEL_NEXT]]:
184+
; CHECK-NEXT: br label %[[LOOP_PEEL_NEXT:.*]]
185+
; CHECK: [[LOOP_PEEL_NEXT]]:
186+
; CHECK-NEXT: br label %[[OUTER_LATCH]]
187+
; CHECK: [[OUTER_LATCH]]:
188+
; CHECK-NEXT: call void @foo(i32 1)
189+
; CHECK-NEXT: [[OUTER_IV_NEXT]] = add i64 [[OUTER_IV]], 1
190+
; CHECK-NEXT: [[OUTER_EC:%.*]] = icmp ne i64 [[OUTER_IV_NEXT]], 100
191+
; CHECK-NEXT: br i1 [[OUTER_EC]], label %[[EXIT:.*]], label %[[OUTER_HEADER]]
192+
; CHECK: [[EXIT]]:
193+
; CHECK-NEXT: [[IV_LCSSA_LCSSA:%.*]] = phi i64 [ [[IV_NEXT_LCSSA]], %[[OUTER_LATCH]] ]
194+
; CHECK-NEXT: ret i64 [[IV_LCSSA_LCSSA]]
195+
;
188196
entry:
189197
br label %outer.header
190198

@@ -216,6 +224,40 @@ define i64 @peel_multi_block_loop_iv_step_1() {
216224
; CHECK-NEXT: [[ENTRY:.*]]:
217225
; CHECK-NEXT: br label %[[LOOP:.*]]
218226
; CHECK: [[LOOP]]:
227+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LATCH:.*]] ]
228+
; CHECK-NEXT: call void @foo(i32 20)
229+
; CHECK-NEXT: [[C:%.*]] = call i1 @cond()
230+
; CHECK-NEXT: br i1 [[C]], label %[[THEN:.*]], label %[[LATCH]]
231+
; CHECK: [[THEN]]:
232+
; CHECK-NEXT: call void @foo(i32 20)
233+
; CHECK-NEXT: br label %[[LATCH]]
234+
; CHECK: [[LATCH]]:
235+
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
236+
; CHECK-NEXT: [[EC:%.*]] = icmp ne i64 [[IV_NEXT]], 63
237+
; CHECK-NEXT: br i1 [[EC]], label %[[LOOP]], label %[[EXIT_PEEL_BEGIN:.*]], !llvm.loop [[LOOP4:![0-9]+]]
238+
; CHECK: [[EXIT_PEEL_BEGIN]]:
239+
; CHECK-NEXT: [[IV_NEXT_LCSSA:%.*]] = phi i64 [ [[IV_NEXT]], %[[LATCH]] ]
240+
; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i64 [ [[IV]], %[[LATCH]] ]
241+
; CHECK-NEXT: br label %[[LOOP_PEEL:.*]]
242+
; CHECK: [[LOOP_PEEL]]:
243+
; CHECK-NEXT: [[CMP_PEEL:%.*]] = icmp eq i64 [[IV_NEXT_LCSSA]], 63
244+
; CHECK-NEXT: [[COND_PEEL:%.*]] = select i1 [[CMP_PEEL]], i32 10, i32 20
245+
; CHECK-NEXT: call void @foo(i32 [[COND_PEEL]])
246+
; CHECK-NEXT: [[C_PEEL:%.*]] = call i1 @cond()
247+
; CHECK-NEXT: br i1 [[C_PEEL]], label %[[THEN_PEEL:.*]], label %[[LATCH_PEEL:.*]]
248+
; CHECK: [[THEN_PEEL]]:
249+
; CHECK-NEXT: call void @foo(i32 [[COND_PEEL]])
250+
; CHECK-NEXT: br label %[[LATCH_PEEL]]
251+
; CHECK: [[LATCH_PEEL]]:
252+
; CHECK-NEXT: [[IV_NEXT_PEEL:%.*]] = add i64 [[IV_NEXT_LCSSA]], 1
253+
; CHECK-NEXT: [[EC_PEEL:%.*]] = icmp ne i64 [[IV_NEXT_PEEL]], 64
254+
; CHECK-NEXT: br i1 [[EC_PEEL]], label %[[EXIT_PEEL_NEXT:.*]], label %[[EXIT_PEEL_NEXT]]
255+
; CHECK: [[EXIT_PEEL_NEXT]]:
256+
; CHECK-NEXT: br label %[[LOOP_PEEL_NEXT:.*]]
257+
; CHECK: [[LOOP_PEEL_NEXT]]:
258+
; CHECK-NEXT: br label %[[EXIT:.*]]
259+
; CHECK: [[EXIT]]:
260+
; CHECK-NEXT: ret i64 [[IV_NEXT_LCSSA]]
219261
;
220262
entry:
221263
br label %loop
@@ -317,16 +359,27 @@ define i64 @peel_single_block_loop_iv_step_1_btc_1() {
317359
; CHECK-NEXT: [[ENTRY:.*]]:
318360
; CHECK-NEXT: br label %[[LOOP:.*]]
319361
; CHECK: [[LOOP]]:
320-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
362+
; CHECK-NEXT: [[IV1:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT1:%.*]], %[[LOOP]] ]
363+
; CHECK-NEXT: call void @foo(i32 20)
364+
; CHECK-NEXT: [[IV_NEXT1]] = add nuw nsw i64 [[IV1]], 1
365+
; CHECK-NEXT: br i1 false, label %[[LOOP]], label %[[EXIT_PEEL_BEGIN:.*]], !llvm.loop [[LOOP5:![0-9]+]]
366+
; CHECK: [[EXIT_PEEL_BEGIN]]:
367+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT1]], %[[LOOP]] ]
368+
; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i64 [ [[IV1]], %[[LOOP]] ]
369+
; CHECK-NEXT: br label %[[LOOP_PEEL:.*]]
370+
; CHECK: [[LOOP_PEEL]]:
321371
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV]], 1
322372
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 10, i32 20
323373
; CHECK-NEXT: call void @foo(i32 [[COND]])
324-
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
374+
; CHECK-NEXT: [[IV_NEXT:%.*]] = add i64 [[IV]], 1
325375
; CHECK-NEXT: [[EC:%.*]] = icmp ne i64 [[IV_NEXT]], 2
326-
; CHECK-NEXT: br i1 [[EC]], label %[[LOOP]], label %[[EXIT:.*]]
376+
; CHECK-NEXT: br i1 [[EC]], label %[[EXIT_PEEL_NEXT:.*]], label %[[EXIT_PEEL_NEXT]]
377+
; CHECK: [[EXIT_PEEL_NEXT]]:
378+
; CHECK-NEXT: br label %[[LOOP_PEEL_NEXT:.*]]
379+
; CHECK: [[LOOP_PEEL_NEXT]]:
380+
; CHECK-NEXT: br label %[[EXIT:.*]]
327381
; CHECK: [[EXIT]]:
328-
; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i64 [ [[IV]], %[[LOOP]] ]
329-
; CHECK-NEXT: ret i64 [[IV_LCSSA]]
382+
; CHECK-NEXT: ret i64 [[IV]]
330383
;
331384
entry:
332385
br label %loop
@@ -467,7 +520,7 @@ define i32 @peel_loop_with_branch_and_phi_uses(ptr %x, i1 %c) {
467520
; CHECK-NEXT: [[ADD1]] = add nsw i32 [[L1]], [[RED1]]
468521
; CHECK-NEXT: [[IV_NEXT1]] = add nuw nsw i32 [[IV1]], 1
469522
; CHECK-NEXT: [[EC1:%.*]] = icmp ne i32 [[IV_NEXT1]], 99
470-
; CHECK-NEXT: br i1 [[EC1]], label %[[LOOP_HEADER]], label %[[LOOPEXIT_PEEL_BEGIN:.*]], !llvm.loop [[LOOP5:![0-9]+]]
523+
; CHECK-NEXT: br i1 [[EC1]], label %[[LOOP_HEADER]], label %[[LOOPEXIT_PEEL_BEGIN:.*]], !llvm.loop [[LOOP6:![0-9]+]]
471524
; CHECK: [[LOOPEXIT_PEEL_BEGIN]]:
472525
; CHECK-NEXT: [[RED:%.*]] = phi i32 [ [[ADD1]], %[[LOOP_LATCH]] ]
473526
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_NEXT1]], %[[LOOP_LATCH]] ]
@@ -584,3 +637,12 @@ exit:
584637

585638
declare void @foo(i32)
586639
declare i1 @cond()
640+
;.
641+
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]]}
642+
; CHECK: [[META1]] = !{!"llvm.loop.peeled.count", i32 1}
643+
; CHECK: [[LOOP2]] = distinct !{[[LOOP2]], [[META1]]}
644+
; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]]}
645+
; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]]}
646+
; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]]}
647+
; CHECK: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]]}
648+
;.

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