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1 parent 670ac23 commit d03d5c1Copy full SHA for d03d5c1
llvm/test/CodeGen/AArch64/GlobalISel/combine-udiv.ll
@@ -243,3 +243,29 @@ define <8 x i16> @pr38477(<8 x i16> %a0) {
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%1 = udiv <8 x i16> %a0, <i16 1, i16 119, i16 73, i16 -111, i16 -3, i16 118, i16 32, i16 31>
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ret <8 x i16> %1
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}
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+
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+define i32 @udiv_div_by_180(i32 %x)
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+; SDAG-LABEL: udiv_div_by_180:
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+; SDAG: // %bb.0:
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+; SDAG-NEXT: mov w8, #5826 // =0x16c2
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+; SDAG-NEXT: and w9, w0, #0xff
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+; SDAG-NEXT: movk w8, #364, lsl #16
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+; SDAG-NEXT: umull x8, w9, w8
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+; SDAG-NEXT: lsr x0, x8, #32
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+; SDAG-NEXT: // kill: def $w0 killed $w0 killed $x0
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+; SDAG-NEXT: ret
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+;
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+; GISEL-LABEL: udiv_div_by_180:
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+; GISEL: // %bb.0:
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+; GISEL-NEXT: ubfx w8, w0, #2, #6
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+; GISEL-NEXT: mov w9, #27671 // =0x6c17
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+; GISEL-NEXT: movk w9, #5825, lsl #16
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+; GISEL-NEXT: umull x8, w8, w9
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+; GISEL-NEXT: lsr x8, x8, #32
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+; GISEL-NEXT: lsr w0, w8, #2
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+; GISEL-NEXT: ret
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+{
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+ %truncate = and i32 %x, 255
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+ %udiv = udiv i32 %truncate, 180
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+ ret i32 %udiv
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+}
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