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[InstCombine] Canonicalize splat shuffles to use poison operand
If the splat shuffle is represented using an undef RHS, replace it with poison.
1 parent 4ef6587 commit d0605e2

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14 files changed

+86
-88
lines changed

14 files changed

+86
-88
lines changed

‎llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1520,7 +1520,7 @@ Value *InstCombinerImpl::SimplifyDemandedVectorElts(Value *V,
15201520
// operand.
15211521
if (all_of(Shuffle->getShuffleMask(), [](int Elt) { return Elt == 0; }) &&
15221522
DemandedElts.isAllOnes()) {
1523-
if (!match(I->getOperand(1), m_Undef())) {
1523+
if (!isa<PoisonValue>(I->getOperand(1))) {
15241524
I->setOperand(1, PoisonValue::get(I->getOperand(1)->getType()));
15251525
MadeChange = true;
15261526
}

‎llvm/test/Transforms/InstCombine/X86/x86-avx2.ll

Lines changed: 23 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -25,17 +25,17 @@ define <8 x float> @identity_test_vpermps(<8 x float> %a0) {
2525

2626
define <8 x i32> @zero_test_vpermd(<8 x i32> %a0) {
2727
; CHECK-LABEL: @zero_test_vpermd(
28-
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[A0:%.*]], <8 x i32> poison, <8 x i32> zeroinitializer
29-
; CHECK-NEXT: ret <8 x i32> [[TMP1]]
28+
; CHECK-NEXT: [[A:%.*]] = shufflevector <8 x i32> [[A0:%.*]], <8 x i32> poison, <8 x i32> zeroinitializer
29+
; CHECK-NEXT: ret <8 x i32> [[A]]
3030
;
3131
%a = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> zeroinitializer)
3232
ret <8 x i32> %a
3333
}
3434

3535
define <8 x float> @zero_test_vpermps(<8 x float> %a0) {
3636
; CHECK-LABEL: @zero_test_vpermps(
37-
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A0:%.*]], <8 x float> poison, <8 x i32> zeroinitializer
38-
; CHECK-NEXT: ret <8 x float> [[TMP1]]
37+
; CHECK-NEXT: [[A:%.*]] = shufflevector <8 x float> [[A0:%.*]], <8 x float> poison, <8 x i32> zeroinitializer
38+
; CHECK-NEXT: ret <8 x float> [[A]]
3939
;
4040
%a = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> zeroinitializer)
4141
ret <8 x float> %a
@@ -45,17 +45,17 @@ define <8 x float> @zero_test_vpermps(<8 x float> %a0) {
4545

4646
define <8 x i32> @shuffle_test_vpermd(<8 x i32> %a0) {
4747
; CHECK-LABEL: @shuffle_test_vpermd(
48-
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[A0:%.*]], <8 x i32> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
49-
; CHECK-NEXT: ret <8 x i32> [[TMP1]]
48+
; CHECK-NEXT: [[A:%.*]] = shufflevector <8 x i32> [[A0:%.*]], <8 x i32> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
49+
; CHECK-NEXT: ret <8 x i32> [[A]]
5050
;
5151
%a = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
5252
ret <8 x i32> %a
5353
}
5454

5555
define <8 x float> @shuffle_test_vpermps(<8 x float> %a0) {
5656
; CHECK-LABEL: @shuffle_test_vpermps(
57-
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A0:%.*]], <8 x float> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
58-
; CHECK-NEXT: ret <8 x float> [[TMP1]]
57+
; CHECK-NEXT: [[A:%.*]] = shufflevector <8 x float> [[A0:%.*]], <8 x float> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
58+
; CHECK-NEXT: ret <8 x float> [[A]]
5959
;
6060
%a = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
6161
ret <8 x float> %a
@@ -65,17 +65,17 @@ define <8 x float> @shuffle_test_vpermps(<8 x float> %a0) {
6565

6666
define <8 x i32> @undef_test_vpermd(<8 x i32> %a0) {
6767
; CHECK-LABEL: @undef_test_vpermd(
68-
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[A0:%.*]], <8 x i32> poison, <8 x i32> <i32 poison, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
69-
; CHECK-NEXT: ret <8 x i32> [[TMP1]]
68+
; CHECK-NEXT: [[A:%.*]] = shufflevector <8 x i32> [[A0:%.*]], <8 x i32> poison, <8 x i32> <i32 poison, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
69+
; CHECK-NEXT: ret <8 x i32> [[A]]
7070
;
7171
%a = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> <i32 undef, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
7272
ret <8 x i32> %a
7373
}
7474

7575
define <8 x float> @undef_test_vpermps(<8 x float> %a0) {
7676
; CHECK-LABEL: @undef_test_vpermps(
77-
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A0:%.*]], <8 x float> poison, <8 x i32> <i32 poison, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
78-
; CHECK-NEXT: ret <8 x float> [[TMP1]]
77+
; CHECK-NEXT: [[A:%.*]] = shufflevector <8 x float> [[A0:%.*]], <8 x float> poison, <8 x i32> <i32 poison, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
78+
; CHECK-NEXT: ret <8 x float> [[A]]
7979
;
8080
%a = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> <i32 undef, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
8181
ret <8 x float> %a
@@ -97,7 +97,7 @@ define <8 x i32> @elts_test_vpermd(<8 x i32> %a0, i32 %a1) {
9797
define <8 x float> @elts_test_vpermps(<8 x float> %a0, <8 x i32> %a1) {
9898
; CHECK-LABEL: @elts_test_vpermps(
9999
; CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> [[A0:%.*]], <8 x i32> [[A1:%.*]])
100-
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x float> [[TMP1]], <8 x float> undef, <8 x i32> zeroinitializer
100+
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x float> [[TMP1]], <8 x float> poison, <8 x i32> zeroinitializer
101101
; CHECK-NEXT: ret <8 x float> [[TMP2]]
102102
;
103103
%1 = insertelement <8 x i32> %a1, i32 0, i32 7
@@ -109,7 +109,7 @@ define <8 x float> @elts_test_vpermps(<8 x float> %a0, <8 x i32> %a1) {
109109
define <2 x i64> @elts_test_vpsllvq(<2 x i64> %a0, <2 x i64> %a1) {
110110
; CHECK-LABEL: @elts_test_vpsllvq(
111111
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.avx2.psllv.q(<2 x i64> [[A0:%.*]], <2 x i64> [[A1:%.*]])
112-
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x i64> [[TMP1]], <2 x i64> undef, <2 x i32> zeroinitializer
112+
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x i64> [[TMP1]], <2 x i64> poison, <2 x i32> zeroinitializer
113113
; CHECK-NEXT: ret <2 x i64> [[TMP2]]
114114
;
115115
%1 = insertelement <2 x i64> %a1, i64 0, i64 1
@@ -121,7 +121,7 @@ define <2 x i64> @elts_test_vpsllvq(<2 x i64> %a0, <2 x i64> %a1) {
121121
define <2 x i64> @elts_test_vpsrlvq(<2 x i64> %a0, <2 x i64> %a1) {
122122
; CHECK-LABEL: @elts_test_vpsrlvq(
123123
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.avx2.psrlv.q(<2 x i64> [[A0:%.*]], <2 x i64> [[A1:%.*]])
124-
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x i64> [[TMP1]], <2 x i64> undef, <2 x i32> zeroinitializer
124+
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x i64> [[TMP1]], <2 x i64> poison, <2 x i32> zeroinitializer
125125
; CHECK-NEXT: ret <2 x i64> [[TMP2]]
126126
;
127127
%1 = insertelement <2 x i64> %a1, i64 0, i64 1
@@ -133,7 +133,7 @@ define <2 x i64> @elts_test_vpsrlvq(<2 x i64> %a0, <2 x i64> %a1) {
133133
define <4 x i64> @elts_test_vpsllvq_256(<4 x i64> %a0, <4 x i64> %a1) {
134134
; CHECK-LABEL: @elts_test_vpsllvq_256(
135135
; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i64> @llvm.x86.avx2.psllv.q.256(<4 x i64> [[A0:%.*]], <4 x i64> [[A1:%.*]])
136-
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i64> [[TMP1]], <4 x i64> undef, <4 x i32> zeroinitializer
136+
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i64> [[TMP1]], <4 x i64> poison, <4 x i32> zeroinitializer
137137
; CHECK-NEXT: ret <4 x i64> [[TMP2]]
138138
;
139139
%1 = insertelement <4 x i64> %a1, i64 0, i64 2
@@ -145,7 +145,7 @@ define <4 x i64> @elts_test_vpsllvq_256(<4 x i64> %a0, <4 x i64> %a1) {
145145
define <4 x i64> @elts_test_vpsrlvq_256(<4 x i64> %a0, <4 x i64> %a1) {
146146
; CHECK-LABEL: @elts_test_vpsrlvq_256(
147147
; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i64> @llvm.x86.avx2.psrlv.q.256(<4 x i64> [[A0:%.*]], <4 x i64> [[A1:%.*]])
148-
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i64> [[TMP1]], <4 x i64> undef, <4 x i32> zeroinitializer
148+
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i64> [[TMP1]], <4 x i64> poison, <4 x i32> zeroinitializer
149149
; CHECK-NEXT: ret <4 x i64> [[TMP2]]
150150
;
151151
%1 = insertelement <4 x i64> %a1, i64 0, i64 3
@@ -157,7 +157,7 @@ define <4 x i64> @elts_test_vpsrlvq_256(<4 x i64> %a0, <4 x i64> %a1) {
157157
define <4 x i32> @elts_test_vpsllvd(<4 x i32> %a0, <4 x i32> %a1) {
158158
; CHECK-LABEL: @elts_test_vpsllvd(
159159
; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.x86.avx2.psllv.d(<4 x i32> [[A0:%.*]], <4 x i32> [[A1:%.*]])
160-
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> undef, <4 x i32> zeroinitializer
160+
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> poison, <4 x i32> zeroinitializer
161161
; CHECK-NEXT: ret <4 x i32> [[TMP2]]
162162
;
163163
%1 = insertelement <4 x i32> %a1, i32 0, i64 3
@@ -169,7 +169,7 @@ define <4 x i32> @elts_test_vpsllvd(<4 x i32> %a0, <4 x i32> %a1) {
169169
define <4 x i32> @elts_test_vpsravd(<4 x i32> %a0, <4 x i32> %a1) {
170170
; CHECK-LABEL: @elts_test_vpsravd(
171171
; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.x86.avx2.psrav.d(<4 x i32> [[A0:%.*]], <4 x i32> [[A1:%.*]])
172-
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> undef, <4 x i32> zeroinitializer
172+
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> poison, <4 x i32> zeroinitializer
173173
; CHECK-NEXT: ret <4 x i32> [[TMP2]]
174174
;
175175
%1 = insertelement <4 x i32> %a1, i32 0, i64 1
@@ -181,7 +181,7 @@ define <4 x i32> @elts_test_vpsravd(<4 x i32> %a0, <4 x i32> %a1) {
181181
define <4 x i32> @elts_test_vpsrlvd(<4 x i32> %a0, <4 x i32> %a1) {
182182
; CHECK-LABEL: @elts_test_vpsrlvd(
183183
; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.x86.avx2.psrlv.d(<4 x i32> [[A0:%.*]], <4 x i32> [[A1:%.*]])
184-
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> undef, <4 x i32> zeroinitializer
184+
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> poison, <4 x i32> zeroinitializer
185185
; CHECK-NEXT: ret <4 x i32> [[TMP2]]
186186
;
187187
%1 = insertelement <4 x i32> %a1, i32 0, i64 2
@@ -193,7 +193,7 @@ define <4 x i32> @elts_test_vpsrlvd(<4 x i32> %a0, <4 x i32> %a1) {
193193
define <8 x i32> @elts_test_vpsllvd_256(<8 x i32> %a0, <8 x i32> %a1) {
194194
; CHECK-LABEL: @elts_test_vpsllvd_256(
195195
; CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i32> @llvm.x86.avx2.psllv.d.256(<8 x i32> [[A0:%.*]], <8 x i32> [[A1:%.*]])
196-
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> undef, <8 x i32> zeroinitializer
196+
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> poison, <8 x i32> zeroinitializer
197197
; CHECK-NEXT: ret <8 x i32> [[TMP2]]
198198
;
199199
%1 = insertelement <8 x i32> %a1, i32 0, i64 3
@@ -205,7 +205,7 @@ define <8 x i32> @elts_test_vpsllvd_256(<8 x i32> %a0, <8 x i32> %a1) {
205205
define <8 x i32> @elts_test_vpsravd_256(<8 x i32> %a0, <8 x i32> %a1) {
206206
; CHECK-LABEL: @elts_test_vpsravd_256(
207207
; CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i32> @llvm.x86.avx2.psrav.d.256(<8 x i32> [[A0:%.*]], <8 x i32> [[A1:%.*]])
208-
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> undef, <8 x i32> zeroinitializer
208+
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> poison, <8 x i32> zeroinitializer
209209
; CHECK-NEXT: ret <8 x i32> [[TMP2]]
210210
;
211211
%1 = insertelement <8 x i32> %a1, i32 0, i64 4
@@ -217,7 +217,7 @@ define <8 x i32> @elts_test_vpsravd_256(<8 x i32> %a0, <8 x i32> %a1) {
217217
define <8 x i32> @elts_test_vpsrlvd_256(<8 x i32> %a0, <8 x i32> %a1) {
218218
; CHECK-LABEL: @elts_test_vpsrlvd_256(
219219
; CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i32> @llvm.x86.avx2.psrlv.d.256(<8 x i32> [[A0:%.*]], <8 x i32> [[A1:%.*]])
220-
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> undef, <8 x i32> zeroinitializer
220+
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> poison, <8 x i32> zeroinitializer
221221
; CHECK-NEXT: ret <8 x i32> [[TMP2]]
222222
;
223223
%1 = insertelement <8 x i32> %a1, i32 0, i64 5

‎llvm/test/Transforms/InstCombine/X86/x86-muldq.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -166,7 +166,7 @@ define <2 x i64> @test_demanded_elts_pmuludq_128(<4 x i32> %a0, <4 x i32> %a1) {
166166
; CHECK-NEXT: [[TMP5:%.*]] = and <2 x i64> [[TMP3]], <i64 4294967295, i64 poison>
167167
; CHECK-NEXT: [[TMP6:%.*]] = and <2 x i64> [[TMP4]], <i64 4294967295, i64 poison>
168168
; CHECK-NEXT: [[TMP7:%.*]] = mul nuw <2 x i64> [[TMP5]], [[TMP6]]
169-
; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <2 x i64> [[TMP7]], <2 x i64> undef, <2 x i32> zeroinitializer
169+
; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <2 x i64> [[TMP7]], <2 x i64> poison, <2 x i32> zeroinitializer
170170
; CHECK-NEXT: ret <2 x i64> [[TMP8]]
171171
;
172172
%1 = shufflevector <4 x i32> %a0, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 2, i32 2>

‎llvm/test/Transforms/InstCombine/X86/x86-pshufb.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -500,7 +500,7 @@ define <64 x i8> @demanded_elts_insertion_avx512(<64 x i8> %InVec, <64 x i8> %Ba
500500
; CHECK-LABEL: @demanded_elts_insertion_avx512(
501501
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <64 x i8> poison, i8 [[M0:%.*]], i64 0
502502
; CHECK-NEXT: [[TMP2:%.*]] = tail call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> [[INVEC:%.*]], <64 x i8> [[TMP1]])
503-
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <64 x i8> [[TMP2]], <64 x i8> undef, <64 x i32> zeroinitializer
503+
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <64 x i8> [[TMP2]], <64 x i8> poison, <64 x i32> zeroinitializer
504504
; CHECK-NEXT: ret <64 x i8> [[TMP3]]
505505
;
506506
%1 = insertelement <64 x i8> %BaseMask, i8 %M0, i32 0

‎llvm/test/Transforms/InstCombine/X86/x86-vpermil.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -283,7 +283,7 @@ define <8 x double> @elts_test_vpermilvar_pd_512(<8 x double> %a0, <8 x i64> %a1
283283
; CHECK-LABEL: @elts_test_vpermilvar_pd_512(
284284
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i64> poison, i64 [[A2:%.*]], i64 0
285285
; CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x double> @llvm.x86.avx512.vpermilvar.pd.512(<8 x double> [[A0:%.*]], <8 x i64> [[TMP1]])
286-
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x double> [[TMP2]], <8 x double> undef, <8 x i32> zeroinitializer
286+
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x double> [[TMP2]], <8 x double> poison, <8 x i32> zeroinitializer
287287
; CHECK-NEXT: ret <8 x double> [[TMP3]]
288288
;
289289
%1 = insertelement <8 x i64> %a1, i64 %a2, i32 0

‎llvm/test/Transforms/InstCombine/icmp-bc-vec.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -89,7 +89,7 @@ define i1 @test_i8_pattern_3(<4 x i8> %invec) {
8989
define i1 @test_i8_nopattern(i8 %val) {
9090
; CHECK-LABEL: @test_i8_nopattern(
9191
; CHECK-NEXT: [[INSVEC:%.*]] = insertelement <4 x i8> undef, i8 [[VAL:%.*]], i64 0
92-
; CHECK-NEXT: [[VEC:%.*]] = shufflevector <4 x i8> [[INSVEC]], <4 x i8> undef, <4 x i32> zeroinitializer
92+
; CHECK-NEXT: [[VEC:%.*]] = shufflevector <4 x i8> [[INSVEC]], <4 x i8> poison, <4 x i32> zeroinitializer
9393
; CHECK-NEXT: [[CAST:%.*]] = bitcast <4 x i8> [[VEC]] to i32
9494
; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[CAST]], 1212696647
9595
; CHECK-NEXT: ret i1 [[COND]]

‎llvm/test/Transforms/InstCombine/icmp-vec.ll

Lines changed: 26 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -276,8 +276,8 @@ define <2 x i1> @same_shuffle_inputs_icmp_extra_use2(<4 x i8> %x, <4 x i8> %y) {
276276

277277
define <2 x i1> @same_shuffle_inputs_icmp_extra_use3(<4 x i8> %x, <4 x i8> %y) {
278278
; CHECK-LABEL: @same_shuffle_inputs_icmp_extra_use3(
279-
; CHECK-NEXT: [[SHUFX:%.*]] = shufflevector <4 x i8> [[X:%.*]], <4 x i8> undef, <2 x i32> zeroinitializer
280-
; CHECK-NEXT: [[SHUFY:%.*]] = shufflevector <4 x i8> [[Y:%.*]], <4 x i8> undef, <2 x i32> zeroinitializer
279+
; CHECK-NEXT: [[SHUFX:%.*]] = shufflevector <4 x i8> [[X:%.*]], <4 x i8> poison, <2 x i32> zeroinitializer
280+
; CHECK-NEXT: [[SHUFY:%.*]] = shufflevector <4 x i8> [[Y:%.*]], <4 x i8> poison, <2 x i32> zeroinitializer
281281
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[SHUFX]], [[SHUFY]]
282282
; CHECK-NEXT: call void @use_v2i8(<2 x i8> [[SHUFX]])
283283
; CHECK-NEXT: call void @use_v2i8(<2 x i8> [[SHUFY]])
@@ -417,9 +417,9 @@ define i1 @eq_cast_eq-1(<2 x i4> %x, <2 x i4> %y) {
417417

418418
define i1 @ne_cast_eq-1(<3 x i7> %x, <3 x i7> %y) {
419419
; CHECK-LABEL: @ne_cast_eq-1(
420-
; CHECK-NEXT: [[IC:%.*]] = icmp eq <3 x i7> [[X:%.*]], [[Y:%.*]]
421-
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <3 x i1> [[IC]] to i3
422-
; CHECK-NEXT: [[R:%.*]] = icmp eq i3 [[TMP1]], 0
420+
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <3 x i7> [[X:%.*]], [[Y:%.*]]
421+
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <3 x i1> [[TMP1]] to i3
422+
; CHECK-NEXT: [[R:%.*]] = icmp eq i3 [[TMP2]], 0
423423
; CHECK-NEXT: ret i1 [[R]]
424424
;
425425
%ic = icmp ne <3 x i7> %x, %y
@@ -430,9 +430,9 @@ define i1 @ne_cast_eq-1(<3 x i7> %x, <3 x i7> %y) {
430430

431431
define i1 @eq_cast_ne-1(<2 x i7> %x, <2 x i7> %y) {
432432
; CHECK-LABEL: @eq_cast_ne-1(
433-
; CHECK-NEXT: [[IC:%.*]] = icmp ne <2 x i7> [[X:%.*]], [[Y:%.*]]
434-
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i1> [[IC]] to i2
435-
; CHECK-NEXT: [[R:%.*]] = icmp ne i2 [[TMP1]], 0
433+
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x i7> [[X:%.*]], [[Y:%.*]]
434+
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i1> [[TMP1]] to i2
435+
; CHECK-NEXT: [[R:%.*]] = icmp ne i2 [[TMP2]], 0
436436
; CHECK-NEXT: ret i1 [[R]]
437437
;
438438
%ic = icmp eq <2 x i7> %x, %y
@@ -456,9 +456,9 @@ define i1 @eq_cast_ne-1-legal-scalar(<2 x i8> %x, <2 x i8> %y) {
456456

457457
define i1 @ne_cast_ne-1(<3 x i5> %x, <3 x i5> %y) {
458458
; CHECK-LABEL: @ne_cast_ne-1(
459-
; CHECK-NEXT: [[IC:%.*]] = icmp eq <3 x i5> [[X:%.*]], [[Y:%.*]]
460-
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <3 x i1> [[IC]] to i3
461-
; CHECK-NEXT: [[R:%.*]] = icmp ne i3 [[TMP1]], 0
459+
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <3 x i5> [[X:%.*]], [[Y:%.*]]
460+
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <3 x i1> [[TMP1]] to i3
461+
; CHECK-NEXT: [[R:%.*]] = icmp ne i3 [[TMP2]], 0
462462
; CHECK-NEXT: ret i1 [[R]]
463463
;
464464
%ic = icmp ne <3 x i5> %x, %y
@@ -469,9 +469,9 @@ define i1 @ne_cast_ne-1(<3 x i5> %x, <3 x i5> %y) {
469469

470470
define i1 @ugt_cast_eq-1(<2 x i4> %x, <2 x i4> %y) {
471471
; CHECK-LABEL: @ugt_cast_eq-1(
472-
; CHECK-NEXT: [[IC:%.*]] = icmp ule <2 x i4> [[X:%.*]], [[Y:%.*]]
473-
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i1> [[IC]] to i2
474-
; CHECK-NEXT: [[R:%.*]] = icmp eq i2 [[TMP1]], 0
472+
; CHECK-NEXT: [[TMP1:%.*]] = icmp ule <2 x i4> [[X:%.*]], [[Y:%.*]]
473+
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i1> [[TMP1]] to i2
474+
; CHECK-NEXT: [[R:%.*]] = icmp eq i2 [[TMP2]], 0
475475
; CHECK-NEXT: ret i1 [[R]]
476476
;
477477
%ic = icmp ugt <2 x i4> %x, %y
@@ -482,9 +482,9 @@ define i1 @ugt_cast_eq-1(<2 x i4> %x, <2 x i4> %y) {
482482

483483
define i1 @slt_cast_ne-1(<2 x i4> %x, <2 x i4> %y) {
484484
; CHECK-LABEL: @slt_cast_ne-1(
485-
; CHECK-NEXT: [[IC:%.*]] = icmp sge <2 x i4> [[X:%.*]], [[Y:%.*]]
486-
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i1> [[IC]] to i2
487-
; CHECK-NEXT: [[R:%.*]] = icmp ne i2 [[TMP1]], 0
485+
; CHECK-NEXT: [[TMP1:%.*]] = icmp sge <2 x i4> [[X:%.*]], [[Y:%.*]]
486+
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i1> [[TMP1]] to i2
487+
; CHECK-NEXT: [[R:%.*]] = icmp ne i2 [[TMP2]], 0
488488
; CHECK-NEXT: ret i1 [[R]]
489489
;
490490
%ic = icmp slt <2 x i4> %x, %y
@@ -495,9 +495,9 @@ define i1 @slt_cast_ne-1(<2 x i4> %x, <2 x i4> %y) {
495495

496496
define i1 @ueq_cast_eq-1(<3 x float> %x, <3 x float> %y) {
497497
; CHECK-LABEL: @ueq_cast_eq-1(
498-
; CHECK-NEXT: [[FC:%.*]] = fcmp one <3 x float> [[X:%.*]], [[Y:%.*]]
499-
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <3 x i1> [[FC]] to i3
500-
; CHECK-NEXT: [[R:%.*]] = icmp eq i3 [[TMP1]], 0
498+
; CHECK-NEXT: [[TMP1:%.*]] = fcmp one <3 x float> [[X:%.*]], [[Y:%.*]]
499+
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <3 x i1> [[TMP1]] to i3
500+
; CHECK-NEXT: [[R:%.*]] = icmp eq i3 [[TMP2]], 0
501501
; CHECK-NEXT: ret i1 [[R]]
502502
;
503503
%fc = fcmp ueq <3 x float> %x, %y
@@ -713,9 +713,9 @@ define i1 @eq_cast_zext_use2(<5 x i3> %b) {
713713

714714
define i1 @eq_cast_eq_ptr-1(<2 x ptr> %x, <2 x ptr> %y) {
715715
; CHECK-LABEL: @eq_cast_eq_ptr-1(
716-
; CHECK-NEXT: [[IC:%.*]] = icmp ne <2 x ptr> [[X:%.*]], [[Y:%.*]]
717-
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i1> [[IC]] to i2
718-
; CHECK-NEXT: [[R:%.*]] = icmp eq i2 [[TMP1]], 0
716+
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x ptr> [[X:%.*]], [[Y:%.*]]
717+
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i1> [[TMP1]] to i2
718+
; CHECK-NEXT: [[R:%.*]] = icmp eq i2 [[TMP2]], 0
719719
; CHECK-NEXT: ret i1 [[R]]
720720
;
721721
%ic = icmp eq <2 x ptr> %x, %y
@@ -726,9 +726,9 @@ define i1 @eq_cast_eq_ptr-1(<2 x ptr> %x, <2 x ptr> %y) {
726726

727727
define i1 @eq_cast_ne_ptr-1(<2 x ptr> %x, <2 x ptr> %y) {
728728
; CHECK-LABEL: @eq_cast_ne_ptr-1(
729-
; CHECK-NEXT: [[IC:%.*]] = icmp ne <2 x ptr> [[X:%.*]], [[Y:%.*]]
730-
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i1> [[IC]] to i2
731-
; CHECK-NEXT: [[R:%.*]] = icmp ne i2 [[TMP1]], 0
729+
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x ptr> [[X:%.*]], [[Y:%.*]]
730+
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i1> [[TMP1]] to i2
731+
; CHECK-NEXT: [[R:%.*]] = icmp ne i2 [[TMP2]], 0
732732
; CHECK-NEXT: ret i1 [[R]]
733733
;
734734
%ic = icmp eq <2 x ptr> %x, %y

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