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[ARM][AArch64] Introduce the Armv9.6-A architecture version (#110825)
This introduces the Armv9.6-A architecture version, including the relevant command-line option for -march. More details about the Armv9.6-A architecture version can be found at: * https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/arm-a-profile-architecture-developments-2024 * https://developer.arm.com/documentation/ddi0602/2024-09/
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‎clang/lib/Basic/Targets/AArch64.cpp

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -373,6 +373,12 @@ void AArch64TargetInfo::getTargetDefinesARMV95A(const LangOptions &Opts,
373373
getTargetDefinesARMV94A(Opts, Builder);
374374
}
375375

376+
void AArch64TargetInfo::getTargetDefinesARMV96A(const LangOptions &Opts,
377+
MacroBuilder &Builder) const {
378+
// Armv9.6-A does not have a v8.* equivalent, but is a superset of v9.5-A.
379+
getTargetDefinesARMV95A(Opts, Builder);
380+
}
381+
376382
void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts,
377383
MacroBuilder &Builder) const {
378384
// Target identification.
@@ -657,6 +663,8 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts,
657663
getTargetDefinesARMV94A(Opts, Builder);
658664
else if (*ArchInfo == llvm::AArch64::ARMV9_5A)
659665
getTargetDefinesARMV95A(Opts, Builder);
666+
else if (*ArchInfo == llvm::AArch64::ARMV9_6A)
667+
getTargetDefinesARMV96A(Opts, Builder);
660668

661669
// All of the __sync_(bool|val)_compare_and_swap_(1|2|4|8|16) builtins work.
662670
Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
@@ -1044,6 +1052,9 @@ bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
10441052
if (Feature == "+v9.5a" &&
10451053
ArchInfo->Version < llvm::AArch64::ARMV9_5A.Version)
10461054
ArchInfo = &llvm::AArch64::ARMV9_5A;
1055+
if (Feature == "+v9.6a" &&
1056+
ArchInfo->Version < llvm::AArch64::ARMV9_6A.Version)
1057+
ArchInfo = &llvm::AArch64::ARMV9_6A;
10471058
if (Feature == "+v8r")
10481059
ArchInfo = &llvm::AArch64::ARMV8R;
10491060
if (Feature == "+fullfp16") {

‎clang/lib/Basic/Targets/AArch64.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -148,6 +148,8 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo {
148148
MacroBuilder &Builder) const;
149149
void getTargetDefinesARMV95A(const LangOptions &Opts,
150150
MacroBuilder &Builder) const;
151+
void getTargetDefinesARMV96A(const LangOptions &Opts,
152+
MacroBuilder &Builder) const;
151153
void getTargetDefines(const LangOptions &Opts,
152154
MacroBuilder &Builder) const override;
153155

‎clang/lib/Basic/Targets/ARM.cpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -228,6 +228,8 @@ StringRef ARMTargetInfo::getCPUAttr() const {
228228
return "9_4A";
229229
case llvm::ARM::ArchKind::ARMV9_5A:
230230
return "9_5A";
231+
case llvm::ARM::ArchKind::ARMV9_6A:
232+
return "9_6A";
231233
case llvm::ARM::ArchKind::ARMV8MBaseline:
232234
return "8M_BASE";
233235
case llvm::ARM::ArchKind::ARMV8MMainline:
@@ -891,6 +893,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
891893
case llvm::ARM::ArchKind::ARMV9_3A:
892894
case llvm::ARM::ArchKind::ARMV9_4A:
893895
case llvm::ARM::ArchKind::ARMV9_5A:
896+
case llvm::ARM::ArchKind::ARMV9_6A:
894897
// Filter __arm_cdp, __arm_ldcl, __arm_stcl in arm_acle.h
895898
FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B3;
896899
break;
@@ -1060,6 +1063,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
10601063
case llvm::ARM::ArchKind::ARMV9_3A:
10611064
case llvm::ARM::ArchKind::ARMV9_4A:
10621065
case llvm::ARM::ArchKind::ARMV9_5A:
1066+
case llvm::ARM::ArchKind::ARMV9_6A:
10631067
getTargetDefinesARMV83A(Opts, Builder);
10641068
break;
10651069
}

‎clang/test/CodeGen/arm-acle-coproc.c

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@@ -25,6 +25,7 @@
2525
// RUN: %clang_cc1 -triple armv9.3a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
2626
// RUN: %clang_cc1 -triple armv9.4a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
2727
// RUN: %clang_cc1 -triple armv9.5a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
28+
// RUN: %clang_cc1 -triple armv9.6a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
2829
// RUN: %clang_cc1 -triple thumbv4 %s -E -dD -o - | FileCheck --check-prefix=CHECK-V4-THUMB %s
2930
// RUN: %clang_cc1 -triple thumbv4t %s -E -dD -o - | FileCheck --check-prefix=CHECK-V4-THUMB %s
3031
// RUN: %clang_cc1 -triple thumbv5 %s -E -dD -o - | FileCheck --check-prefix=CHECK-V5-THUMB %s
@@ -54,6 +55,7 @@
5455
// RUN: %clang_cc1 -triple thumbv9.3a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
5556
// RUN: %clang_cc1 -triple thumbv9.4a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
5657
// RUN: %clang_cc1 -triple thumbv9.5a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
58+
// RUN: %clang_cc1 -triple thumbv9.6a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
5759
// RUN: %clang_cc1 -triple thumbv8m.base %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-BASE %s
5860
// RUN: %clang_cc1 -triple thumbv8m.main %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-MAIN %s
5961
// RUN: %clang_cc1 -triple thumbv8.1m.main %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-MAIN %s

‎clang/test/Driver/aarch64-v96a.c

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,19 @@
1+
// ===== Base v9.6a architecture =====
2+
3+
// RUN: %clang -target aarch64 -march=armv9.6a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A %s
4+
// RUN: %clang -target aarch64 -march=armv9.6-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A %s
5+
// RUN: %clang -target aarch64 -mlittle-endian -march=armv9.6a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A %s
6+
// RUN: %clang -target aarch64 -mlittle-endian -march=armv9.6-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A %s
7+
// RUN: %clang -target aarch64_be -mlittle-endian -march=armv9.6a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A %s
8+
// RUN: %clang -target aarch64_be -mlittle-endian -march=armv9.6-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A %s
9+
// GENERICV96A: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"
10+
11+
// RUN: %clang -target aarch64_be -march=armv9.6a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A-BE %s
12+
// RUN: %clang -target aarch64_be -march=armv9.6-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A-BE %s
13+
// RUN: %clang -target aarch64 -mbig-endian -march=armv9.6a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A-BE %s
14+
// RUN: %clang -target aarch64 -mbig-endian -march=armv9.6-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A-BE %s
15+
// RUN: %clang -target aarch64_be -mbig-endian -march=armv9.6a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A-BE %s
16+
// RUN: %clang -target aarch64_be -mbig-endian -march=armv9.6-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A-BE %s
17+
// GENERICV96A-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"
18+
//
19+
// ===== Features supported on aarch64 =====

‎clang/test/Driver/arm-cortex-cpus-1.c

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@@ -495,3 +495,20 @@
495495
// RUN: %clang -target arm -march=armebv9.5a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
496496
// RUN: %clang -target arm -march=armebv9.5-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
497497
// CHECK-BE-V95A: "-cc1"{{.*}} "-triple" "armebv9.5{{.*}}" "-target-cpu" "generic"
498+
//
499+
// RUN: %clang -target armv9.6a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V96A %s
500+
// RUN: %clang -target arm -march=armv9.6a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V96A %s
501+
// RUN: %clang -target arm -march=armv9.6-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V96A %s
502+
// RUN: %clang -target arm -march=armv9.6a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V96A %s
503+
// RUN: %clang -target armv9.6a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V96A %s
504+
// RUN: %clang -target arm -march=armv9.6a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V96A %s
505+
// RUN: %clang -target arm -mlittle-endian -march=armv9.6-a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V96A %s
506+
// CHECK-V96A: "-cc1"{{.*}} "-triple" "armv9.6{{.*}}" "-target-cpu" "generic"
507+
508+
// RUN: %clang -target armebv9.6a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V96A %s
509+
// RUN: %clang -target armv9.6a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V96A %s
510+
// RUN: %clang -target armeb -march=armebv9.6a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V96A %s
511+
// RUN: %clang -target armeb -march=armebv9.6-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V96A %s
512+
// RUN: %clang -target arm -march=armebv9.6a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V96A %s
513+
// RUN: %clang -target arm -march=armebv9.6-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V96A %s
514+
// CHECK-BE-V96A: "-cc1"{{.*}} "-triple" "armebv9.6{{.*}}" "-target-cpu" "generic"

‎clang/test/Preprocessor/aarch64-target-features.c

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@@ -213,6 +213,7 @@
213213
// RUN: %clang -target aarch64-none-linux-gnu -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s
214214
// RUN: %clang -target aarch64-none-linux-gnu -march=armv9.4-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s
215215
// RUN: %clang -target aarch64-none-linux-gnu -march=armv9.5-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s
216+
// RUN: %clang -target aarch64-none-linux-gnu -march=armv9.6-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s
216217
// RUN: %clang -target aarch64-none-linux-gnu -march=armv9-a+sve2 -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s
217218
// CHECK-SVE2: __ARM_FEATURE_FP16_SCALAR_ARITHMETIC 1
218219
// CHECK-SVE2: __ARM_FEATURE_FP16_VECTOR_ARITHMETIC 1
@@ -671,6 +672,7 @@
671672
// RUN: %clang -target aarch64-none-elf -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER,CHECK-V85-OR-LATER %s
672673
// RUN: %clang -target aarch64-none-elf -march=armv9.4-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER,CHECK-V85-OR-LATER %s
673674
// RUN: %clang -target aarch64-none-elf -march=armv9.5-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER,CHECK-V85-OR-LATER %s
675+
// RUN: %clang -target aarch64-none-elf -march=armv9.6-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER,CHECK-V85-OR-LATER %s
674676
// CHECK-V81-OR-LATER: __ARM_FEATURE_ATOMICS 1
675677
// CHECK-V85-OR-LATER: __ARM_FEATURE_BTI 1
676678
// CHECK-V83-OR-LATER: __ARM_FEATURE_COMPLEX 1

‎clang/test/Preprocessor/arm-target-features.c

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Original file line numberDiff line numberDiff line change
@@ -902,6 +902,11 @@
902902
// CHECK-V95A: #define __ARM_ARCH_9_5A__ 1
903903
// CHECK-V95A: #define __ARM_ARCH_PROFILE 'A'
904904

905+
// RUN: %clang -target armv9.6a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V96A %s
906+
// CHECK-V96A: #define __ARM_ARCH 9
907+
// CHECK-V96A: #define __ARM_ARCH_9_6A__ 1
908+
// CHECK-V96A: #define __ARM_ARCH_PROFILE 'A'
909+
905910
// RUN: %clang -target arm-none-none-eabi -march=armv7-m -mfpu=softvfp -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SOFTVFP %s
906911
// CHECK-SOFTVFP-NOT: #define __ARM_FP 0x
907912

‎llvm/include/llvm/TargetParser/AArch64TargetParser.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -118,9 +118,9 @@ struct ArchInfo {
118118
// Defines the following partial order, indicating when an architecture is
119119
// a superset of another:
120120
//
121-
// v9.5a > v9.4a > v9.3a > v9.2a > v9.1a > v9a;
122-
// v v v v v
123-
// v8.9a > v8.8a > v8.7a > v8.6a > v8.5a > v8.4a > ... > v8a;
121+
// v9.6a > v9.5a > v9.4a > v9.3a > v9.2a > v9.1a > v9a;
122+
// v v v v v
123+
// v8.9a > v8.8a > v8.7a > v8.6a > v8.5a > v8.4a > ... > v8a;
124124
//
125125
// v8r has no relation to anything. This is used to determine which
126126
// features to enable for a given architecture. See

‎llvm/include/llvm/TargetParser/ARMTargetParser.def

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -182,6 +182,11 @@ ARM_ARCH("armv9.5-a", ARMV9_5A, "9.5-A", "+v9.5a", ARMBuildAttrs::CPUArch::v9_A,
182182
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
183183
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
184184
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
185+
ARM_ARCH("armv9.6-a", ARMV9_6A, "9.6-A", "+v9.6a", ARMBuildAttrs::CPUArch::v9_A,
186+
FK_NEON_FP_ARMV8,
187+
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
188+
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
189+
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
185190
ARM_ARCH("armv8-r", ARMV8R, "8-R", "+v8r", ARMBuildAttrs::CPUArch::v8_R,
186191
FK_FPV5_SP_D16,
187192
(ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |

‎llvm/include/llvm/TargetParser/Triple.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -110,6 +110,7 @@ class Triple {
110110
enum SubArchType {
111111
NoSubArch,
112112

113+
ARMSubArch_v9_6a,
113114
ARMSubArch_v9_5a,
114115
ARMSubArch_v9_4a,
115116
ARMSubArch_v9_3a,

‎llvm/lib/Target/AArch64/AArch64Features.td

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -518,6 +518,11 @@ def FeaturePAuthLR : ExtensionWithMArch<"pauth-lr", "PAuthLR", "FEAT_PAuth_LR",
518518
def FeatureTLBIW : ExtensionWithMArch<"tlbiw", "TLBIW", "FEAT_TLBIW",
519519
"Enable Armv9.5-A TLBI VMALL for Dirty State">;
520520

521+
//===----------------------------------------------------------------------===//
522+
// Armv9.6 Architecture Extensions
523+
//===----------------------------------------------------------------------===//
524+
525+
521526
//===----------------------------------------------------------------------===//
522527
// Other Features
523528
//===----------------------------------------------------------------------===//
@@ -827,6 +832,9 @@ def HasV9_4aOps : Architecture64<9, 4, "a", "v9.4a",
827832
def HasV9_5aOps : Architecture64<9, 5, "a", "v9.5a",
828833
[HasV9_4aOps, FeatureCPA],
829834
!listconcat(HasV9_4aOps.DefaultExts, [FeatureCPA, FeatureLUT, FeatureFAMINMAX])>;
835+
def HasV9_6aOps : Architecture64<9, 6, "a", "v9.6a",
836+
[HasV9_5aOps],
837+
!listconcat(HasV9_5aOps.DefaultExts, [])>;
830838
def HasV8_0rOps : Architecture64<8, 0, "r", "v8r",
831839
[ //v8.1
832840
FeatureCRC, FeaturePAN, FeatureLSE, FeatureCONTEXTIDREL2,

‎llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

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Original file line numberDiff line numberDiff line change
@@ -3771,6 +3771,8 @@ static void setRequiredFeatureString(FeatureBitset FBS, std::string &Str) {
37713771
Str += "ARMv9.4a";
37723772
else if (FBS[AArch64::HasV9_5aOps])
37733773
Str += "ARMv9.5a";
3774+
else if (FBS[AArch64::HasV9_6aOps])
3775+
Str += "ARMv9.6a";
37743776
else if (FBS[AArch64::HasV8_0rOps])
37753777
Str += "ARMv8r";
37763778
else {

‎llvm/lib/Target/ARM/ARMArchitectures.td

Lines changed: 12 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -285,7 +285,18 @@ def ARMv95a : Architecture<"armv9.5-a", "ARMv95a", [HasV9_5aOps,
285285
FeatureCRC,
286286
FeatureRAS,
287287
FeatureDotProd]>;
288-
288+
def ARMv96a : Architecture<"armv9.6-a", "ARMv96a", [HasV9_6aOps,
289+
FeatureAClass,
290+
FeatureDB,
291+
FeatureFPARMv8,
292+
FeatureNEON,
293+
FeatureDSP,
294+
FeatureTrustZone,
295+
FeatureMP,
296+
FeatureVirtualization,
297+
FeatureCRC,
298+
FeatureRAS,
299+
FeatureDotProd]>;
289300
def ARMv8r : Architecture<"armv8-r", "ARMv8r", [HasV8Ops,
290301
FeatureRClass,
291302
FeatureDB,

‎llvm/lib/Target/ARM/ARMFeatures.td

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -706,6 +706,11 @@ def HasV9_5aOps : SubtargetFeature<"v9.5a", "HasV9_5aOps", "true",
706706
"Support ARM v9.5a instructions",
707707
[HasV9_4aOps]>;
708708

709+
// Armv9.6-A is a v9-only architecture.
710+
def HasV9_6aOps : SubtargetFeature<"v9.6a", "HasV9_6aOps", "true",
711+
"Support ARM v9.6a instructions",
712+
[HasV9_5aOps]>;
713+
709714
def HasV8_1MMainlineOps : SubtargetFeature<
710715
"v8.1m.main", "HasV8_1MMainlineOps", "true",
711716
"Support ARM v8-1M Mainline instructions",

‎llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -894,6 +894,7 @@ void ARMTargetELFStreamer::emitArchDefaultAttributes() {
894894
case ARM::ArchKind::ARMV9_3A:
895895
case ARM::ArchKind::ARMV9_4A:
896896
case ARM::ArchKind::ARMV9_5A:
897+
case ARM::ArchKind::ARMV9_6A:
897898
S.setAttributeItem(CPU_arch_profile, ApplicationProfile, false);
898899
S.setAttributeItem(ARM_ISA_use, Allowed, false);
899900
S.setAttributeItem(THUMB_ISA_use, AllowThumb32, false);

‎llvm/lib/TargetParser/ARMTargetParser.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -87,6 +87,7 @@ unsigned ARM::parseArchVersion(StringRef Arch) {
8787
case ArchKind::ARMV9_3A:
8888
case ArchKind::ARMV9_4A:
8989
case ArchKind::ARMV9_5A:
90+
case ArchKind::ARMV9_6A:
9091
return 9;
9192
case ArchKind::INVALID:
9293
return 0;
@@ -125,6 +126,7 @@ static ARM::ProfileKind getProfileKind(ARM::ArchKind AK) {
125126
case ARM::ArchKind::ARMV9_3A:
126127
case ARM::ArchKind::ARMV9_4A:
127128
case ARM::ArchKind::ARMV9_5A:
129+
case ARM::ArchKind::ARMV9_6A:
128130
return ARM::ProfileKind::A;
129131
case ARM::ArchKind::ARMV4:
130132
case ARM::ArchKind::ARMV4T:

‎llvm/lib/TargetParser/ARMTargetParserCommon.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,7 @@ StringRef ARM::getArchSynonym(StringRef Arch) {
4545
.Case("v9.3a", "v9.3-a")
4646
.Case("v9.4a", "v9.4-a")
4747
.Case("v9.5a", "v9.5-a")
48+
.Case("v9.6a", "v9.6-a")
4849
.Case("v8m.base", "v8-m.base")
4950
.Case("v8m.main", "v8-m.main")
5051
.Case("v8.1m.main", "v8.1-m.main")

‎llvm/lib/TargetParser/Triple.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -867,6 +867,8 @@ static Triple::SubArchType parseSubArch(StringRef SubArchName) {
867867
return Triple::ARMSubArch_v9_4a;
868868
case ARM::ArchKind::ARMV9_5A:
869869
return Triple::ARMSubArch_v9_5a;
870+
case ARM::ArchKind::ARMV9_6A:
871+
return Triple::ARMSubArch_v9_6a;
870872
case ARM::ArchKind::ARMV8R:
871873
return Triple::ARMSubArch_v8r;
872874
case ARM::ArchKind::ARMV8MBaseline:

‎llvm/unittests/TargetParser/TargetParserTest.cpp

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -45,7 +45,7 @@ const char *ARMArch[] = {
4545
"armv8m.main", "iwmmxt", "iwmmxt2", "xscale", "armv8.1-m.main",
4646
"armv9-a", "armv9", "armv9a", "armv9.1-a", "armv9.1a",
4747
"armv9.2-a", "armv9.2a", "armv9.3-a", "armv9.3a", "armv9.4-a",
48-
"armv9.4a", "armv9.5-a", "armv9.5a",
48+
"armv9.4a", "armv9.5-a", "armv9.5a", "armv9.6a", "armv9.6-a",
4949
};
5050

5151
std::string FormatExtensionFlags(int64_t Flags) {
@@ -611,6 +611,8 @@ TEST(TargetParserTest, testARMArch) {
611611
ARMBuildAttrs::CPUArch::v9_A));
612612
EXPECT_TRUE(testARMArch("armv9.5-a", "generic", "v9.5a",
613613
ARMBuildAttrs::CPUArch::v9_A));
614+
EXPECT_TRUE(testARMArch("armv9.6-a", "generic", "v9.6a",
615+
ARMBuildAttrs::CPUArch::v9_A));
614616
EXPECT_TRUE(
615617
testARMArch("armv8-r", "generic", "v8r", ARMBuildAttrs::CPUArch::v8_R));
616618
EXPECT_TRUE(testARMArch("armv8-m.base", "generic", "v8m.base",
@@ -925,6 +927,7 @@ TEST(TargetParserTest, ARMparseArchProfile) {
925927
case ARM::ArchKind::ARMV9_3A:
926928
case ARM::ArchKind::ARMV9_4A:
927929
case ARM::ArchKind::ARMV9_5A:
930+
case ARM::ArchKind::ARMV9_6A:
928931
EXPECT_EQ(ARM::ProfileKind::A, ARM::parseArchProfile(ARMArch[i]));
929932
break;
930933
default:
@@ -1186,6 +1189,7 @@ TEST(TargetParserTest, testAArch64Arch) {
11861189
EXPECT_TRUE(testAArch64Arch("armv9.3-a"));
11871190
EXPECT_TRUE(testAArch64Arch("armv9.4-a"));
11881191
EXPECT_TRUE(testAArch64Arch("armv9.5-a"));
1192+
EXPECT_TRUE(testAArch64Arch("armv9.6-a"));
11891193
}
11901194

11911195
bool testAArch64Extension(StringRef CPUName, StringRef ArchExt) {
@@ -1434,6 +1438,7 @@ TEST(TargetParserTest, AArch64ArchFeatures) {
14341438
EXPECT_EQ(AArch64::ARMV9_3A.ArchFeature, "+v9.3a");
14351439
EXPECT_EQ(AArch64::ARMV9_4A.ArchFeature, "+v9.4a");
14361440
EXPECT_EQ(AArch64::ARMV9_5A.ArchFeature, "+v9.5a");
1441+
EXPECT_EQ(AArch64::ARMV9_6A.ArchFeature, "+v9.6a");
14371442
EXPECT_EQ(AArch64::ARMV8R.ArchFeature, "+v8r");
14381443
}
14391444

@@ -1463,7 +1468,7 @@ TEST(TargetParserTest, AArch64ArchPartialOrder) {
14631468

14641469
for (const auto *A :
14651470
{&AArch64::ARMV9_1A, &AArch64::ARMV9_2A, &AArch64::ARMV9_3A,
1466-
&AArch64::ARMV9_4A, &AArch64::ARMV9_5A})
1471+
&AArch64::ARMV9_4A, &AArch64::ARMV9_5A, &AArch64::ARMV9_6A})
14671472
EXPECT_TRUE(A->implies(AArch64::ARMV9A));
14681473

14691474
EXPECT_TRUE(AArch64::ARMV8_1A.implies(AArch64::ARMV8A));
@@ -1481,6 +1486,7 @@ TEST(TargetParserTest, AArch64ArchPartialOrder) {
14811486
EXPECT_TRUE(AArch64::ARMV9_3A.implies(AArch64::ARMV9_2A));
14821487
EXPECT_TRUE(AArch64::ARMV9_4A.implies(AArch64::ARMV9_3A));
14831488
EXPECT_TRUE(AArch64::ARMV9_5A.implies(AArch64::ARMV9_4A));
1489+
EXPECT_TRUE(AArch64::ARMV9_6A.implies(AArch64::ARMV9_5A));
14841490

14851491
EXPECT_TRUE(AArch64::ARMV9A.implies(AArch64::ARMV8_5A));
14861492
EXPECT_TRUE(AArch64::ARMV9_1A.implies(AArch64::ARMV8_6A));

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