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darkbuckdarkbuck
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[GISel][TableGen] Enhance default ops support (#75689)
- Instead of checking the default ops directly, this change queries DAG default operands collected during patterns reading. It does not only simplify the code but also handle few cases where integer values are converted from convertible types, such as 'bits'. - A test case is added GlobalISelEmitter.td as the regression test of default 'bits' values.
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2 files changed

+72
-48
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‎llvm/test/TableGen/GlobalISelEmitter.td

Lines changed: 60 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -59,6 +59,7 @@ def gi_cimm9 : GICustomOperandRenderer<"renderImm">;
5959
def m1 : OperandWithDefaultOps <i32, (ops (i32 -1))>;
6060
def Z : OperandWithDefaultOps <i32, (ops R0)>;
6161
def m1Z : OperandWithDefaultOps <i32, (ops (i32 -1), R0)>;
62+
def mb : OperandWithDefaultOps <i32, (ops (i32 0b1101))>;
6263

6364
def HasA : Predicate<"Subtarget->hasA()">;
6465
def HasB : Predicate<"Subtarget->hasB()">;
@@ -297,7 +298,7 @@ def HasC : Predicate<"Subtarget->hasC()"> { let RecomputePerFunction = 1; }
297298
// R19C-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
298299
// R19C-NEXT: GIR_EraseFromParent, /*InsnID*/0,
299300
// R19C-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
300-
// R19C-NEXT: // GIR_Coverage, 19,
301+
// R19C-NEXT: // GIR_Coverage, 20,
301302
// R19C-NEXT: GIR_Done,
302303
// R19C-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
303304
//
@@ -330,12 +331,12 @@ def : Pat<(select GPR32:$src1, (complex_rr GPR32:$src2a, GPR32:$src2b),
330331
// R21O-NEXT: GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
331332
// R21O-NEXT: GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
332333
//
333-
// R21C-NEXT: GIM_Try, /*On fail goto*//*Label [[PREV_NUM:[0-9]+]]*/ GIMT_Encode4([[PREV:[0-9]+]]), // Rule ID 19 //
334+
// R21C-NEXT: GIM_Try, /*On fail goto*//*Label [[PREV_NUM:[0-9]+]]*/ GIMT_Encode4([[PREV:[0-9]+]]), // Rule ID 20 //
334335
// R21C-NOT: GIR_Done,
335-
// R21C: // GIR_Coverage, 19,
336+
// R21C: // GIR_Coverage, 20,
336337
// R21C-NEXT: GIR_Done,
337338
// R21C-NEXT: // Label [[PREV_NUM]]: @[[PREV]]
338-
// R21C-NEXT: GIM_Try, /*On fail goto*//*Label [[LABEL_NUM:[0-9]+]]*/ GIMT_Encode4([[LABEL:[0-9]+]]), // Rule ID 21 //
339+
// R21C-NEXT: GIM_Try, /*On fail goto*//*Label [[LABEL_NUM:[0-9]+]]*/ GIMT_Encode4([[LABEL:[0-9]+]]), // Rule ID 22 //
339340
//
340341
// R21O-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
341342
// R21O-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
@@ -366,7 +367,7 @@ def : Pat<(select GPR32:$src1, (complex_rr GPR32:$src2a, GPR32:$src2b),
366367
// R21C-NEXT: GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0
367368
// R21C-NEXT: GIR_EraseFromParent, /*InsnID*/0,
368369
// R21C-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
369-
// R21C-NEXT: // GIR_Coverage, 21,
370+
// R21C-NEXT: // GIR_Coverage, 22,
370371
// R21C-NEXT: GIR_Done,
371372
// R21C-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
372373
//
@@ -390,10 +391,10 @@ def : Pat<(select GPR32:$src1, (complex_rr GPR32:$src2a, GPR32:$src2b),
390391
// R20O-NEXT: GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
391392
// R20O-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
392393
//
393-
// R20N: GIM_Try, /*On fail goto*//*Label [[PREV_NUM:[0-9]+]]*/ GIMT_Encode4([[PREV:[0-9]+]]), // Rule ID 21 //
394+
// R20N: GIM_Try, /*On fail goto*//*Label [[PREV_NUM:[0-9]+]]*/ GIMT_Encode4([[PREV:[0-9]+]]), // Rule ID 22 //
394395
// R20N: // Label [[PREV_NUM]]: @[[PREV]]
395396
//
396-
// R20C-NEXT: GIM_Try, /*On fail goto*//*Label [[LABEL_NUM:[0-9]+]]*/ GIMT_Encode4([[LABEL:[0-9]+]]), // Rule ID 20 //
397+
// R20C-NEXT: GIM_Try, /*On fail goto*//*Label [[LABEL_NUM:[0-9]+]]*/ GIMT_Encode4([[LABEL:[0-9]+]]), // Rule ID 21 //
397398
//
398399
// R20N-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
399400
// R20N-NEXT: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_SUB),
@@ -415,7 +416,7 @@ def : Pat<(select GPR32:$src1, (complex_rr GPR32:$src2a, GPR32:$src2b),
415416
// R20C-NEXT: GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0),
416417
// R20C-NEXT: GIR_EraseFromParent, /*InsnID*/0,
417418
// R20C-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
418-
// R20C-NEXT: // GIR_Coverage, 20,
419+
// R20C-NEXT: // GIR_Coverage, 21,
419420
// R20C-NEXT: GIR_Done,
420421
// R20C-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
421422
//
@@ -455,7 +456,7 @@ def : Pat<(frag GPR32:$src1, complex:$src2, complex:$src3),
455456
// R00O-NEXT: GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
456457
// R00O-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
457458
//
458-
// R00C: GIM_Try, /*On fail goto*//*Label [[PREV_NUM:[0-9]+]]*/ GIMT_Encode4([[PREV:[0-9]+]]), // Rule ID 20 //
459+
// R00C: GIM_Try, /*On fail goto*//*Label [[PREV_NUM:[0-9]+]]*/ GIMT_Encode4([[PREV:[0-9]+]]), // Rule ID 21 //
459460
// R00C: // Label [[PREV_NUM]]: @[[PREV]]
460461
//
461462
// R00C-NEXT: GIM_Try, /*On fail goto*//*Label [[LABEL_NUM:[0-9]+]]*/ GIMT_Encode4([[LABEL:[0-9]+]]), // Rule ID 0 //
@@ -517,7 +518,7 @@ def : Pat<(frag GPR32:$src1, complex:$src2, complex:$src3),
517518
// R00O-NEXT: GIM_Reject,
518519
// R00O: // Label [[DEFAULT_NUM]]: @[[DEFAULT]]
519520
// R00O-NEXT: GIM_Reject,
520-
// R00O-NEXT: }; // Size: 1978 bytes
521+
// R00O-NEXT: }; // Size: 2007 bytes
521522

522523
def INSNBOB : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2, GPR32:$src3, GPR32:$src4),
523524
[(set GPR32:$dst,
@@ -709,6 +710,35 @@ def XORlike : I<(outs GPR32:$dst), (ins m1Z:$src2, GPR32:$src1),
709710
def XORManyDefaults : I<(outs GPR32:$dst), (ins m1Z:$src3, Z:$src2, GPR32:$src1),
710711
[(set GPR32:$dst, (xor GPR32:$src1, -5))]>;
711712

713+
//===- Test a simple pattern with a default bits operand. -----------------===//
714+
//
715+
// NOOPT-NEXT: GIM_Try, /*On fail goto*//*Label [[LABEL_NUM:[0-9]+]]*/ GIMT_Encode4([[LABEL:[0-9]+]]),
716+
// NOOPT-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
717+
// NOOPT-NEXT: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_XOR),
718+
// NOOPT-NEXT: // MIs[0] DstI[dst]
719+
// NOOPT-NEXT: GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
720+
// NOOPT-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
721+
// NOOPT-NEXT: // MIs[0] src1
722+
// NOOPT-NEXT: GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
723+
// NOOPT-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
724+
// NOOPT-NEXT: // MIs[0] Operand 2
725+
// NOOPT-NEXT: GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
726+
// NOOPT-NEXT: GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-6)
727+
// NOOPT-NEXT: // (xor:{ *:[i32] } GPR32:{ *:[i32] }:$src1, -6:{ *:[i32] }) => (XORIb:{ *:[i32] } GPR32:{ *:[i32] }:$src1)
728+
// NOOPT-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(MyTarget::XORIb),
729+
// NOOPT-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // DstI[dst]
730+
// NOOPT-NEXT: GIR_AddImm8, /*InsnID*/0, /*Imm*/13,
731+
// NOOPT-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
732+
// NOOPT-NEXT: GIR_EraseFromParent, /*InsnID*/0,
733+
// NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
734+
// NOOPT-NEXT: // GIR_Coverage, 6,
735+
// NOOPT-NEXT: GIR_Done,
736+
// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
737+
738+
// The -6 is just to distinguish it from the other cases.
739+
def XORIb : I<(outs GPR32:$dst), (ins mb:$src2, GPR32:$src1),
740+
[(set GPR32:$dst, (xor GPR32:$src1, -6))]>;
741+
712742
//===- Test a simple pattern with constant immediate operands. ------------===//
713743
//
714744
// This must precede the 3-register variants because constant immediates have
@@ -733,7 +763,7 @@ def XORManyDefaults : I<(outs GPR32:$dst), (ins m1Z:$src3, Z:$src2, GPR32:$src1)
733763
// NOOPT-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Wm
734764
// NOOPT-NEXT: GIR_EraseFromParent, /*InsnID*/0,
735765
// NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
736-
// NOOPT-NEXT: // GIR_Coverage, 22,
766+
// NOOPT-NEXT: // GIR_Coverage, 23,
737767
// NOOPT-NEXT: GIR_Done,
738768
// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
739769

@@ -774,7 +804,7 @@ def : Pat<(not GPR32:$Wm), (ORN R0, GPR32:$Wm)>;
774804
// NOOPT-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src3
775805
// NOOPT-NEXT: GIR_EraseFromParent, /*InsnID*/0,
776806
// NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
777-
// NOOPT-NEXT: // GIR_Coverage, 6,
807+
// NOOPT-NEXT: // GIR_Coverage, 7,
778808
// NOOPT-NEXT: GIR_Done,
779809
// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
780810

@@ -812,7 +842,7 @@ def : Pat<(not GPR32:$Wm), (ORN R0, GPR32:$Wm)>;
812842
// NOOPT-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src3
813843
// NOOPT-NEXT: GIR_EraseFromParent, /*InsnID*/0,
814844
// NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
815-
// NOOPT-NEXT: // GIR_Coverage, 27,
845+
// NOOPT-NEXT: // GIR_Coverage, 28,
816846
// NOOPT-NEXT: GIR_Done,
817847
// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
818848

@@ -836,7 +866,7 @@ def MULADD : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2, GPR32:$src3),
836866
// NOOPT-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // DstI[dst]
837867
// NOOPT-NEXT: GIR_EraseFromParent, /*InsnID*/0,
838868
// NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
839-
// NOOPT-NEXT: // GIR_Coverage, 7,
869+
// NOOPT-NEXT: // GIR_Coverage, 8,
840870
// NOOPT-NEXT: GIR_Done,
841871
// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
842872

@@ -859,7 +889,7 @@ def MOV1 : I<(outs GPR32:$dst), (ins), [(set GPR32:$dst, 1)]>;
859889
// NOOPT-NEXT: GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
860890
// NOOPT-NEXT: GIR_EraseFromParent, /*InsnID*/0,
861891
// NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
862-
// NOOPT-NEXT: // GIR_Coverage, 8,
892+
// NOOPT-NEXT: // GIR_Coverage, 9,
863893
// NOOPT-NEXT: GIR_Done,
864894
// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
865895

@@ -883,7 +913,7 @@ def MOVimm8 : I<(outs GPR32:$dst), (ins i32imm:$imm), [(set GPR32:$dst, simm8:$i
883913
// NOOPT-NEXT: GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
884914
// NOOPT-NEXT: GIR_EraseFromParent, /*InsnID*/0,
885915
// NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
886-
// NOOPT-NEXT: // GIR_Coverage, 9,
916+
// NOOPT-NEXT: // GIR_Coverage, 10,
887917
// NOOPT-NEXT: GIR_Done,
888918
// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
889919

@@ -907,7 +937,7 @@ def MOVimm9 : I<(outs GPR32:$dst), (ins i32imm:$imm), [(set GPR32:$dst, simm9:$i
907937
// NOOPT-NEXT: GIR_CustomRenderer, /*InsnID*/0, /*OldInsnID*/0, /*Renderer*/GIMT_Encode2(GICR_renderImm), // imm
908938
// NOOPT-NEXT: GIR_EraseFromParent, /*InsnID*/0,
909939
// NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
910-
// NOOPT-NEXT: // GIR_Coverage, 10,
940+
// NOOPT-NEXT: // GIR_Coverage, 11,
911941
// NOOPT-NEXT: GIR_Done,
912942
// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
913943

@@ -930,7 +960,7 @@ def MOVcimm8 : I<(outs GPR32:$dst), (ins i32imm:$imm), [(set GPR32:$dst, cimm8:$
930960
// NOOPT-NEXT: GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
931961
// NOOPT-NEXT: GIR_EraseFromParent, /*InsnID*/0,
932962
// NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
933-
// NOOPT-NEXT: // GIR_Coverage, 17,
963+
// NOOPT-NEXT: // GIR_Coverage, 18,
934964
// NOOPT-NEXT: GIR_Done,
935965
// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
936966

@@ -950,7 +980,7 @@ def MOVcimm8 : I<(outs GPR32:$dst), (ins i32imm:$imm), [(set GPR32:$dst, cimm8:$
950980
// NOOPT-NEXT: // (ld:{ *:[i32] } GPR32:{ *:[i32] }:$src1)<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD:{ *:[i32] } GPR32:{ *:[i32] }:$src1)
951981
// NOOPT-NEXT: GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(MyTarget::LOAD),
952982
// NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
953-
// NOOPT-NEXT: // GIR_Coverage, 11,
983+
// NOOPT-NEXT: // GIR_Coverage, 12,
954984
// NOOPT-NEXT: GIR_Done,
955985
// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
956986

@@ -973,7 +1003,7 @@ def LOAD : I<(outs GPR32:$dst), (ins GPR32:$src1),
9731003
// NOOPT-NEXT: // (ld:{ *:[i32] } GPR32:{ *:[i32] }:$src)<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD:{ *:[i32] } GPR32:{ *:[i32] }:$src)
9741004
// NOOPT-NEXT: GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(MyTarget::LOAD),
9751005
// NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
976-
// NOOPT-NEXT: // GIR_Coverage, 23,
1006+
// NOOPT-NEXT: // GIR_Coverage, 24,
9771007
// NOOPT-NEXT: GIR_Done,
9781008
// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
9791009

@@ -996,7 +1026,7 @@ def : Pat<(load GPR32:$src),
9961026
// NOOPT-NEXT: // (ld:{ *:[i32] } GPR32:{ *:[i32] }:$src1)<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16>> => (SEXTLOAD:{ *:[i32] } GPR32:{ *:[i32] }:$src1)
9971027
// NOOPT-NEXT: GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(MyTarget::SEXTLOAD),
9981028
// NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
999-
// NOOPT-NEXT: // GIR_Coverage, 12,
1029+
// NOOPT-NEXT: // GIR_Coverage, 13,
10001030
// NOOPT-NEXT: GIR_Done,
10011031
// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
10021032

@@ -1020,7 +1050,7 @@ def SEXTLOAD : I<(outs GPR32:$dst), (ins GPR32:$src1),
10201050
// NOOPT-NEXT: // (add:{ *:[i32] } GPR32:{ *:[i32] }:$src1, GPR32:{ *:[i32] }:$src2) => (ADD:{ *:[i32] } GPR32:{ *:[i32] }:$src1, GPR32:{ *:[i32] }:$src2)
10211051
// NOOPT-NEXT: GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(MyTarget::ADD),
10221052
// NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1023-
// NOOPT-NEXT: // GIR_Coverage, 13,
1053+
// NOOPT-NEXT: // GIR_Coverage, 14,
10241054
// NOOPT-NEXT: GIR_Done,
10251055
// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
10261056

@@ -1046,7 +1076,7 @@ def ADD : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2),
10461076
// NOOPT-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
10471077
// NOOPT-NEXT: GIR_EraseFromParent, /*InsnID*/0,
10481078
// NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1049-
// NOOPT-NEXT: // GIR_Coverage, 14,
1079+
// NOOPT-NEXT: // GIR_Coverage, 15,
10501080
// NOOPT-NEXT: GIR_Done,
10511081
// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
10521082

@@ -1073,7 +1103,7 @@ def DOUBLE : I<(outs GPR32:$dst), (ins GPR32:$src), [(set GPR32:$dst, (add GPR32
10731103
// NOOPT-NEXT: // (add:{ *:[i32] } i32:{ *:[i32] }:$samename, i32:{ *:[i32] }:$othername) => (InsnWithSpeciallyNamedDef:{ *:[i32] } i32:{ *:[i32] }:$samename, i32:{ *:[i32] }:$othername)
10741104
// NOOPT-NEXT: GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(MyTarget::InsnWithSpeciallyNamedDef),
10751105
// NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1076-
// NOOPT-NEXT: // GIR_Coverage, 24,
1106+
// NOOPT-NEXT: // GIR_Coverage, 25,
10771107
// NOOPT-NEXT: GIR_Done,
10781108
// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
10791109

@@ -1096,7 +1126,7 @@ def : Pat<(add i32:$samename, i32:$othername),
10961126
// NOOPT-NEXT: // (add:{ *:[i32] } i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) => (ADD:{ *:[i32] } i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2)
10971127
// NOOPT-NEXT: GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(MyTarget::ADD),
10981128
// NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1099-
// NOOPT-NEXT: // GIR_Coverage, 25,
1129+
// NOOPT-NEXT: // GIR_Coverage, 26,
11001130
// NOOPT-NEXT: GIR_Done,
11011131
// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
11021132

@@ -1125,7 +1155,7 @@ def : Pat<(add i32:$src1, i32:$src2),
11251155
// NOOPT-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
11261156
// NOOPT-NEXT: GIR_EraseFromParent, /*InsnID*/0,
11271157
// NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1128-
// NOOPT-NEXT: // GIR_Coverage, 15,
1158+
// NOOPT-NEXT: // GIR_Coverage, 16,
11291159
// NOOPT-NEXT: GIR_Done,
11301160
// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
11311161

@@ -1148,7 +1178,7 @@ def MUL : I<(outs GPR32:$dst), (ins GPR32:$src2, GPR32:$src1),
11481178
// NOOPT-NEXT: // (bitconvert:{ *:[i32] } FPR32:{ *:[f32] }:$src1) => (COPY_TO_REGCLASS:{ *:[i32] } FPR32:{ *:[f32] }:$src1, GPR32:{ *:[i32] })
11491179
// NOOPT-NEXT: GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
11501180
// NOOPT-NEXT: GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(MyTarget::GPR32RegClassID),
1151-
// NOOPT-NEXT: // GIR_Coverage, 26,
1181+
// NOOPT-NEXT: // GIR_Coverage, 27,
11521182
// NOOPT-NEXT: GIR_Done,
11531183
// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
11541184

@@ -1171,7 +1201,7 @@ def : Pat<(i32 (bitconvert FPR32:$src1)),
11711201
// NOOPT-NEXT: GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
11721202
// NOOPT-NEXT: GIR_EraseFromParent, /*InsnID*/0,
11731203
// NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1174-
// NOOPT-NEXT: // GIR_Coverage, 16,
1204+
// NOOPT-NEXT: // GIR_Coverage, 17,
11751205
// NOOPT-NEXT: GIR_Done,
11761206
// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
11771207

@@ -1190,13 +1220,13 @@ def MOVfpimmz : I<(outs FPR32:$dst), (ins f32imm:$imm), [(set FPR32:$dst, fpimmz
11901220
// NOOPT-NEXT: // (br (bb:{ *:[Other] }):$target) => (BR (bb:{ *:[Other] }):$target)
11911221
// NOOPT-NEXT: GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(MyTarget::BR),
11921222
// NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1193-
// NOOPT-NEXT: // GIR_Coverage, 18,
1223+
// NOOPT-NEXT: // GIR_Coverage, 19,
11941224
// NOOPT-NEXT: GIR_Done,
11951225
// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]]
11961226

11971227
def BR : I<(outs), (ins unknown:$target),
11981228
[(br bb:$target)]>;
11991229

12001230
// NOOPT-NEXT: GIM_Reject,
1201-
// NOOPT-NEXT: }; // Size: 1680 bytes
1231+
// NOOPT-NEXT: }; // Size: 1738 bytes
12021232
// NOOPT-NEXT: return MatchTable0;

‎llvm/utils/TableGen/GlobalISelEmitter.cpp

Lines changed: 12 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -408,7 +408,7 @@ class GlobalISelEmitter final : public GlobalISelMatchTableExecutorEmitter {
408408
const TreePatternNode *DstChild, const TreePatternNode *Src);
409409
Error importDefaultOperandRenderers(action_iterator InsertPt, RuleMatcher &M,
410410
BuildMIAction &DstMIBuilder,
411-
DagInit *DefaultOps) const;
411+
const DAGDefaultOperand &DefaultOp) const;
412412
Error
413413
importImplicitDefRenderers(BuildMIAction &DstMIBuilder,
414414
const std::vector<Record *> &ImplicitDefs) const;
@@ -1681,11 +1681,11 @@ Expected<action_iterator> GlobalISelEmitter::importExplicitUseRenderers(
16811681
// overridden, or which we aren't letting it override; emit the 'default
16821682
// ops' operands.
16831683

1684-
const CGIOperandList::OperandInfo &DstIOperand = DstI->Operands[InstOpNo];
1685-
DagInit *DefaultOps = DstIOperand.Rec->getValueAsDag("DefaultOps");
1686-
if (auto Error = importDefaultOperandRenderers(InsertPt, M, DstMIBuilder,
1687-
DefaultOps))
1684+
Record *OperandNode = DstI->Operands[InstOpNo].Rec;
1685+
if (auto Error = importDefaultOperandRenderers(
1686+
InsertPt, M, DstMIBuilder, CGP.getDefaultOperand(OperandNode)))
16881687
return std::move(Error);
1688+
16891689
++NumDefaultOps;
16901690
continue;
16911691
}
@@ -1710,22 +1710,16 @@ Expected<action_iterator> GlobalISelEmitter::importExplicitUseRenderers(
17101710

17111711
Error GlobalISelEmitter::importDefaultOperandRenderers(
17121712
action_iterator InsertPt, RuleMatcher &M, BuildMIAction &DstMIBuilder,
1713-
DagInit *DefaultOps) const {
1714-
for (const auto *DefaultOp : DefaultOps->getArgs()) {
1715-
std::optional<LLTCodeGen> OpTyOrNone;
1713+
const DAGDefaultOperand &DefaultOp) const {
1714+
for (const auto &Op : DefaultOp.DefaultOps) {
1715+
const auto *N = Op.get();
1716+
if (!N->isLeaf())
1717+
return failedImport("Could not add default op");
17161718

1717-
// Look through ValueType operators.
1718-
if (const DagInit *DefaultDagOp = dyn_cast<DagInit>(DefaultOp)) {
1719-
if (const DefInit *DefaultDagOperator =
1720-
dyn_cast<DefInit>(DefaultDagOp->getOperator())) {
1721-
if (DefaultDagOperator->getDef()->isSubClassOf("ValueType")) {
1722-
OpTyOrNone = MVTToLLT(getValueType(DefaultDagOperator->getDef()));
1723-
DefaultOp = DefaultDagOp->getArg(0);
1724-
}
1725-
}
1726-
}
1719+
const auto *DefaultOp = N->getLeafValue();
17271720

17281721
if (const DefInit *DefaultDefOp = dyn_cast<DefInit>(DefaultOp)) {
1722+
std::optional<LLTCodeGen> OpTyOrNone = MVTToLLT(N->getSimpleType(0));
17291723
auto Def = DefaultDefOp->getDef();
17301724
if (Def->getName() == "undef_tied_input") {
17311725
unsigned TempRegID = M.allocateTempRegID();

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