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[RISCV] Check vmerge's true is in same block in vmerge -> vmv.v.v peephole (#110861)
The peepholes in RISCVVectorPeephole need to be local and we were failing to check if the true operand was in the same block as the vmerge. Fixes #110832
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2 files changed

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llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -419,8 +419,8 @@ bool RISCVVectorPeephole::convertSameMaskVMergeToVMv(MachineInstr &MI) {
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if (!NewOpc)
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return false;
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MachineInstr *True = MRI->getVRegDef(MI.getOperand(3).getReg());
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if (!True || !RISCV::getMaskedPseudoInfo(True->getOpcode()) ||
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!hasSameEEW(MI, *True))
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if (!True || True->getParent() != MI.getParent() ||
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!RISCV::getMaskedPseudoInfo(True->getOpcode()) || !hasSameEEW(MI, *True))
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return false;
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const MachineInstr *TrueV0Def = V0Defs.lookup(True);

llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-to-vmv.mir

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -159,3 +159,29 @@ body: |
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$v0 = COPY %mask
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%x:vrnov0 = PseudoVMERGE_VVM_M1 $noreg, %false, %true, $v0, 4, 5 /* e32 */
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...
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---
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# Shouldn't be converted because true is in a different block
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name: same_mask_diff_blocks
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body: |
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; CHECK-LABEL: name: same_mask_diff_blocks
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.1(0x80000000)
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; CHECK-NEXT: liveins: $v8, $v0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %false:vr = COPY $v8
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; CHECK-NEXT: %mask:vr = COPY $v0
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; CHECK-NEXT: $v0 = COPY %mask
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; CHECK-NEXT: %true:vrnov0 = PseudoVADD_VV_M1_MASK $noreg, $noreg, $noreg, $v0, 4, 5 /* e32 */, 0 /* tu, mu */
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: $v0 = COPY %mask
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; CHECK-NEXT: [[PseudoVMERGE_VVM_M1_:%[0-9]+]]:vrnov0 = PseudoVMERGE_VVM_M1 $noreg, %false, %true, $v0, 4, 5 /* e32 */
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bb.0:
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liveins: $v8, $v0
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%false:vr = COPY $v8
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%mask:vr = COPY $v0
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$v0 = COPY %mask
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%true:vrnov0 = PseudoVADD_VV_M1_MASK $noreg, $noreg, $noreg, $v0, 4, 5 /* e32 */, 0 /* tu, mu */
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bb.1:
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$v0 = COPY %mask
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%5:vrnov0 = PseudoVMERGE_VVM_M1 $noreg, %false, %true, $v0, 4, 5 /* e32 */

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