Skip to content

Commit d1af601

Browse files
committed
[AVR] Don't assert on an undefined operand
Not all operands are correctly disassembled at the moment. This means that some machine instructions won't have all the necessary operands set. To avoid asserting, print an error instead until the necessary support has been implemented. Differential Revision: https://reviews.llvm.org/D73958
1 parent a5424de commit d1af601

File tree

1 file changed

+20
-0
lines changed

1 file changed

+20
-0
lines changed

llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -100,6 +100,16 @@ const char *AVRInstPrinter::getPrettyRegisterName(unsigned RegNum,
100100

101101
void AVRInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
102102
raw_ostream &O) {
103+
if (OpNo >= MI->size()) {
104+
// Not all operands are correctly disassembled at the moment. This means
105+
// that some machine instructions won't have all the necessary operands
106+
// set.
107+
// To avoid asserting, print <unknown> instead until the necessary support
108+
// has been implemented.
109+
O << "<unknown>";
110+
return;
111+
}
112+
103113
const MCOperand &Op = MI->getOperand(OpNo);
104114
const MCOperandInfo &MOI = this->MII.get(MI->getOpcode()).OpInfo[OpNo];
105115

@@ -125,6 +135,16 @@ void AVRInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
125135
/// being encoded as a pc-relative value.
126136
void AVRInstPrinter::printPCRelImm(const MCInst *MI, unsigned OpNo,
127137
raw_ostream &O) {
138+
if (OpNo >= MI->size()) {
139+
// Not all operands are correctly disassembled at the moment. This means
140+
// that some machine instructions won't have all the necessary operands
141+
// set.
142+
// To avoid asserting, print <unknown> instead until the necessary support
143+
// has been implemented.
144+
O << "<unknown>";
145+
return;
146+
}
147+
128148
const MCOperand &Op = MI->getOperand(OpNo);
129149

130150
if (Op.isImm()) {

0 commit comments

Comments
 (0)