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[AIX] Update data directives for AIX assembly
Summary: The standard data emission directives (e.g. .short, .long) in the AIX assembler have the unintended consequence of aligning their output to the natural byte boundary. This cause problems because we aren't expecting behavior from the Data*bitsDirectives, so the final alignment of data isn't correct in some cases on AIX. This patch updated the Data*bitsDirectives to use .vbyte pseudo-ops instead to emit the data, since we will emit the .align directives as needed. We update the existing testcases and add a test for emission of struct data. Reviewers: hubert.reinterpretcast, Xiangling_L, jasonliu Reviewed By: hubert.reinterpretcast, jasonliu Subscribers: wuzish, nemanjai, hiraditya, kbarton, arphaman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D80934
1 parent 36b8af1 commit d20fdca

15 files changed

+279
-166
lines changed

‎llvm/lib/MC/MCAsmInfoXCOFF.cpp

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,12 @@ MCAsmInfoXCOFF::MCAsmInfoXCOFF() {
2020
ZeroDirectiveSupportsNonZeroValue = false;
2121
AsciiDirective = nullptr; // not supported
2222
AscizDirective = nullptr; // not supported
23-
Data64bitsDirective = "\t.llong\t";
23+
24+
// Use .vbyte for data definition to avoid directives that apply an implicit
25+
// alignment.
26+
Data16bitsDirective = "\t.vbyte\t2, ";
27+
Data32bitsDirective = "\t.vbyte\t4, ";
28+
2429
COMMDirectiveAlignmentIsInBytes = false;
2530
LCOMMDirectiveAlignmentType = LCOMM::Log2Alignment;
2631
HasDotTypeDotSizeDirective = false;

‎llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -59,4 +59,7 @@ PPCXCOFFMCAsmInfo::PPCXCOFFMCAsmInfo(bool Is64Bit, const Triple &T) {
5959
if (T.getArch() == Triple::ppc64le)
6060
report_fatal_error("XCOFF is not supported for little-endian targets");
6161
CodePointerSize = CalleeSaveStackSlotSize = Is64Bit ? 8 : 4;
62+
63+
// A size of 8 is only supported by the assembler under 64-bit.
64+
Data64bitsDirective = Is64Bit ? "\t.vbyte\t8, " : nullptr;
6265
}

‎llvm/test/CodeGen/PowerPC/aix-extern-weak.ll

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -36,12 +36,12 @@ declare extern_weak void @foo_ext_weak(i32*)
3636
; COMMON-NEXT: .globl .main
3737
; COMMON-NEXT: .align 4
3838
; COMMON-NEXT: .csect main[DS]
39-
; BIT32-NEXT: .long .main # @main
40-
; BIT32-NEXT: .long TOC[TC0]
41-
; BIT32-NEXT: .long 0
42-
; BIT64-NEXT: .llong .main # @main
43-
; BIT64-NEXT: .llong TOC[TC0]
44-
; BIT64-NEXT: .llong 0
39+
; BIT32-NEXT: .vbyte 4, .main # @main
40+
; BIT32-NEXT: .vbyte 4, TOC[TC0]
41+
; BIT32-NEXT: .vbyte 4, 0
42+
; BIT64-NEXT: .vbyte 8, .main # @main
43+
; BIT64-NEXT: .vbyte 8, TOC[TC0]
44+
; BIT64-NEXT: .vbyte 8, 0
4545
; COMMON-NEXT: .csect .text[PR]
4646
; COMMON-NEXT: .main:
4747

@@ -50,8 +50,8 @@ declare extern_weak void @foo_ext_weak(i32*)
5050
; BIT32-NEXT: .align 2
5151
; BIT64-NEXT: .align 3
5252
; COMMON-NEXT: foo_ext_weak_p:
53-
; BIT32-NEXT: .long foo_ext_weak_ref[DS]
54-
; BIT64-NEXT: .llong foo_ext_weak_ref[DS]
53+
; BIT32-NEXT: .vbyte 4, foo_ext_weak_ref[DS]
54+
; BIT64-NEXT: .vbyte 8, foo_ext_weak_ref[DS]
5555
; COMMON-NEXT: .weak b_w[UA]
5656
; COMMON-NEXT: .weak foo_ext_weak_ref[DS]
5757
; COMMON-NEXT: .weak .foo_ext_weak

‎llvm/test/CodeGen/PowerPC/aix-extern.ll

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -42,25 +42,25 @@ declare i32 @bar_extern(i32*)
4242
; COMMON-NEXT: .globl .foo
4343
; COMMON-NEXT: .align 4
4444
; COMMON-NEXT: .csect foo[DS]
45-
; BIT32-NEXT: .long .foo # @foo
46-
; BIT32-NEXT: .long TOC[TC0]
47-
; BIT32-NEXT: .long 0
48-
; BIT64-NEXT: .llong .foo # @foo
49-
; BIT64-NEXT: .llong TOC[TC0]
50-
; BIT64-NEXT: .llong 0
45+
; BIT32-NEXT: .vbyte 4, .foo # @foo
46+
; BIT32-NEXT: .vbyte 4, TOC[TC0]
47+
; BIT32-NEXT: .vbyte 4, 0
48+
; BIT64-NEXT: .vbyte 8, .foo # @foo
49+
; BIT64-NEXT: .vbyte 8, TOC[TC0]
50+
; BIT64-NEXT: .vbyte 8, 0
5151
; COMMON-NEXT: .csect .text[PR]
5252
; COMMON-NEXT: .foo:
5353

5454
; COMMON: .globl main[DS] # -- Begin function main
5555
; COMMON-NEXT: .globl .main
5656
; COMMON-NEXT: .align 4
5757
; COMMON-NEXT: .csect main[DS]
58-
; BIT32-NEXT: .long .main # @main
59-
; BIT32-NEXT: .long TOC[TC0]
60-
; BIT32-NEXT: .long 0
61-
; BIT64-NEXT: .llong .main # @main
62-
; BIT64-NEXT: .llong TOC[TC0]
63-
; BIT64-NEXT: .llong 0
58+
; BIT32-NEXT: .vbyte 4, .main # @main
59+
; BIT32-NEXT: .vbyte 4, TOC[TC0]
60+
; BIT32-NEXT: .vbyte 4, 0
61+
; BIT64-NEXT: .vbyte 8, .main # @main
62+
; BIT64-NEXT: .vbyte 8, TOC[TC0]
63+
; BIT64-NEXT: .vbyte 8, 0
6464
; COMMON-NEXT: .csect .text[PR]
6565
; COMMON-NEXT: .main:
6666

@@ -69,8 +69,8 @@ declare i32 @bar_extern(i32*)
6969
; BIT32-NEXT: .align 2
7070
; BIT64-NEXT: .align 3
7171
; COMMON-NEXT: bar_p:
72-
; BIT32-NEXT: .long bar_ref[DS]
73-
; BIT64-NEXT: .llong bar_ref[DS]
72+
; BIT32-NEXT: .vbyte 4, bar_ref[DS]
73+
; BIT64-NEXT: .vbyte 8, bar_ref[DS]
7474
; COMMON-NEXT: .extern b_e[UA]
7575
; COMMON-NEXT: .extern .bar_ref
7676
; COMMON-NEXT: .extern bar_ref[DS]

‎llvm/test/CodeGen/PowerPC/aix-lower-constant-pool-index.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -48,7 +48,7 @@ entry:
4848
; 32SMALL-ASM: .csect .rodata[RO],2
4949
; 32SMALL-ASM: .align 2
5050
; 32SMALL-ASM: .LCPI0_0:
51-
; 32SMALL-ASM: .long 0x40b00000
51+
; 32SMALL-ASM: .vbyte 4, 0x40b00000
5252
; 32SMALL-ASM: .test_float:
5353
; 32SMALL-ASM: lwz [[REG1:[0-9]+]], LC0(2)
5454
; 32SMALL-ASM: lfs 1, 0([[REG1]])
@@ -57,7 +57,7 @@ entry:
5757
; 32LARGE-ASM: .csect .rodata[RO],2
5858
; 32LARGE-ASM: .align 2
5959
; 32LARGE-ASM: .LCPI0_0:
60-
; 32LARGE-ASM: .long 0x40b00000
60+
; 32LARGE-ASM: .vbyte 4, 0x40b00000
6161
; 32LARGE-ASM: .test_float:
6262
; 32LARGE-ASM: addis [[REG1:[0-9]+]], LC0@u(2)
6363
; 32LARGE-ASM: lwz [[REG2:[0-9]+]], LC0@l([[REG1]])
@@ -67,7 +67,7 @@ entry:
6767
; 64SMALL-ASM: .csect .rodata[RO],2
6868
; 64SMALL-ASM: .align 2
6969
; 64SMALL-ASM: .LCPI0_0:
70-
; 64SMALL-ASM: .long 0x40b00000
70+
; 64SMALL-ASM: .vbyte 4, 0x40b00000
7171
; 64SMALL-ASM: .test_float:
7272
; 64SMALL-ASM: ld [[REG1:[0-9]+]], LC0(2)
7373
; 64SMALL-ASM: lfs 1, 0([[REG1]])
@@ -76,7 +76,7 @@ entry:
7676
; 64LARGE-ASM: .csect .rodata[RO],2
7777
; 64LARGE-ASM: .align 2
7878
; 64LARGE-ASM: .LCPI0_0:
79-
; 64LARGE-ASM: .long 0x40b00000
79+
; 64LARGE-ASM: .vbyte 4, 0x40b00000
8080
; 64LARGE-ASM: .test_float:
8181
; 64LARGE-ASM: addis [[REG1:[0-9]+]], LC0@u(2)
8282
; 64LARGE-ASM: ld [[REG2:[0-9]+]], LC0@l([[REG1]])

‎llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -99,10 +99,10 @@
9999
; 32SMALL-ASM: .csect .rodata[RO],2
100100
; 32SMALL-ASM: .align 2
101101
; 32SMALL-ASM: .LJTI0_0:
102-
; 32SMALL-ASM: .long LBB0_2-.LJTI0_0
103-
; 32SMALL-ASM: .long LBB0_3-.LJTI0_0
104-
; 32SMALL-ASM: .long LBB0_4-.LJTI0_0
105-
; 32SMALL-ASM: .long LBB0_5-.LJTI0_0
102+
; 32SMALL-ASM: .vbyte 4, LBB0_2-.LJTI0_0
103+
; 32SMALL-ASM: .vbyte 4, LBB0_3-.LJTI0_0
104+
; 32SMALL-ASM: .vbyte 4, LBB0_4-.LJTI0_0
105+
; 32SMALL-ASM: .vbyte 4, LBB0_5-.LJTI0_0
106106

107107
; 32LARGE-ASM-LABEL: jump_table
108108
; 32LARGE-ASM: .jump_table:
@@ -126,10 +126,10 @@
126126
; 32LARGE-ASM: .csect .rodata[RO],2
127127
; 32LARGE-ASM: .align 2
128128
; 32LARGE-ASM: .LJTI0_0:
129-
; 32LARGE-ASM: .long LBB0_2-.LJTI0_0
130-
; 32LARGE-ASM: .long LBB0_3-.LJTI0_0
131-
; 32LARGE-ASM: .long LBB0_4-.LJTI0_0
132-
; 32LARGE-ASM: .long LBB0_5-.LJTI0_0
129+
; 32LARGE-ASM: .vbyte 4, LBB0_2-.LJTI0_0
130+
; 32LARGE-ASM: .vbyte 4, LBB0_3-.LJTI0_0
131+
; 32LARGE-ASM: .vbyte 4, LBB0_4-.LJTI0_0
132+
; 32LARGE-ASM: .vbyte 4, LBB0_5-.LJTI0_0
133133

134134
; 64SMALL-ASM-LABEL: jump_table
135135
; 64SMALL-ASM: .jump_table:
@@ -152,10 +152,10 @@
152152
; 64SMALL-ASM: .csect .rodata[RO],2
153153
; 64SMALL-ASM: .align 2
154154
; 64SMALL-ASM: .LJTI0_0:
155-
; 64SMALL-ASM: .long LBB0_2-.LJTI0_0
156-
; 64SMALL-ASM: .long LBB0_3-.LJTI0_0
157-
; 64SMALL-ASM: .long LBB0_4-.LJTI0_0
158-
; 64SMALL-ASM: .long LBB0_5-.LJTI0_0
155+
; 64SMALL-ASM: .vbyte 4, LBB0_2-.LJTI0_0
156+
; 64SMALL-ASM: .vbyte 4, LBB0_3-.LJTI0_0
157+
; 64SMALL-ASM: .vbyte 4, LBB0_4-.LJTI0_0
158+
; 64SMALL-ASM: .vbyte 4, LBB0_5-.LJTI0_0
159159

160160
; 64LARGE-ASM-LABEL: jump_table
161161
; 64LARGE-ASM: .jump_table:
@@ -179,10 +179,10 @@
179179
; 64LARGE-ASM: .csect .rodata[RO],2
180180
; 64LARGE-ASM: .align 2
181181
; 64LARGE-ASM: .LJTI0_0:
182-
; 64LARGE-ASM: .long LBB0_2-.LJTI0_0
183-
; 64LARGE-ASM: .long LBB0_3-.LJTI0_0
184-
; 64LARGE-ASM: .long LBB0_4-.LJTI0_0
185-
; 64LARGE-ASM: .long LBB0_5-.LJTI0_0
182+
; 64LARGE-ASM: .vbyte 4, LBB0_2-.LJTI0_0
183+
; 64LARGE-ASM: .vbyte 4, LBB0_3-.LJTI0_0
184+
; 64LARGE-ASM: .vbyte 4, LBB0_4-.LJTI0_0
185+
; 64LARGE-ASM: .vbyte 4, LBB0_5-.LJTI0_0
186186

187187
; CHECK: .toc
188188
; CHECK: .tc .LJTI0_0[TC],.LJTI0_0

‎llvm/test/CodeGen/PowerPC/aix-readonly-with-relocation.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9,11 +9,11 @@
99
;CHECK-NEXT: .globl b
1010
;CHECK-NEXT: .align 2
1111
;CHECK-NEXT: b:
12-
;CHECK-NEXT: .long a
12+
;CHECK-NEXT: .vbyte 4, a
1313

1414
;CHECK64: .comm a[RW],4,2
1515
;CHECK64-NEXT: .csect .data[RW],3
1616
;CHECK64-NEXT: .globl b
1717
;CHECK64-NEXT: .align 3
1818
;CHECK64-NEXT: b:
19-
;CHECK64-NEXT: .llong a
19+
;CHECK64-NEXT: .vbyte 8, a

‎llvm/test/CodeGen/PowerPC/aix-reference-func-addr-const.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -15,20 +15,20 @@ entry:
1515
;CHECK-NEXT: .globl foo_ptr
1616
;CHECK-NEXT: .align 2
1717
;CHECK-NEXT: foo_ptr:
18-
;CHECK-NEXT: .long foo[DS]
18+
;CHECK-NEXT: .vbyte 4, foo[DS]
1919
;CHECK-NEXT: .globl bar_ptr1
2020
;CHECK-NEXT: .align 2
2121
;CHECK-NEXT: bar_ptr1:
22-
;CHECK-NEXT: .long bar[DS]
22+
;CHECK-NEXT: .vbyte 4, bar[DS]
2323
;CHECK-NEXT: .extern foo[DS]
2424

2525
;CHECK64: .csect .data[RW],3
2626
;CHECK64-NEXT: .globl foo_ptr
2727
;CHECK64-NEXT: .align 3
2828
;CHECK64-NEXT: foo_ptr:
29-
;CHECK64-NEXT: .llong foo[DS]
29+
;CHECK64-NEXT: .vbyte 8, foo[DS]
3030
;CHECK64-NEXT: .globl bar_ptr1
3131
;CHECK64-NEXT: .align 3
3232
;CHECK64-NEXT: bar_ptr1:
33-
;CHECK64-NEXT: .llong bar[DS]
33+
;CHECK64-NEXT: .vbyte 8, bar[DS]
3434
;CHECK64-NEXT: .extern foo[DS]

‎llvm/test/CodeGen/PowerPC/aix-weak.ll

Lines changed: 21 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -45,38 +45,38 @@ entry:
4545
; COMMON-NEXT: .weak .foo_weak
4646
; COMMON-NEXT: .align 4
4747
; COMMON-NEXT: .csect foo_weak[DS]
48-
; BIT32-NEXT: .long .foo_weak # @foo_weak
49-
; BIT32-NEXT: .long TOC[TC0]
50-
; BIT32-NEXT: .long 0
51-
; BIT64-NEXT: .llong .foo_weak # @foo_weak
52-
; BIT64-NEXT: .llong TOC[TC0]
53-
; BIT64-NEXT: .llong 0
48+
; BIT32-NEXT: .vbyte 4, .foo_weak # @foo_weak
49+
; BIT32-NEXT: .vbyte 4, TOC[TC0]
50+
; BIT32-NEXT: .vbyte 4, 0
51+
; BIT64-NEXT: .vbyte 8, .foo_weak # @foo_weak
52+
; BIT64-NEXT: .vbyte 8, TOC[TC0]
53+
; BIT64-NEXT: .vbyte 8, 0
5454
; COMMON-NEXT: .csect .text[PR]
5555
; COMMON-NEXT: .foo_weak:
5656

5757
; COMMON: .weak foo_ref_weak[DS] # -- Begin function foo_ref_weak
5858
; COMMON-NEXT: .weak .foo_ref_weak
5959
; COMMON-NEXT: .align 4
6060
; COMMON-NEXT: .csect foo_ref_weak[DS]
61-
; BIT32-NEXT: .long .foo_ref_weak # @foo_ref_weak
62-
; BIT32-NEXT: .long TOC[TC0]
63-
; BIT32-NEXT: .long 0
64-
; BIT64-NEXT: .llong .foo_ref_weak # @foo_ref_weak
65-
; BIT64-NEXT: .llong TOC[TC0]
66-
; BIT64-NEXT: .llong 0
61+
; BIT32-NEXT: .vbyte 4, .foo_ref_weak # @foo_ref_weak
62+
; BIT32-NEXT: .vbyte 4, TOC[TC0]
63+
; BIT32-NEXT: .vbyte 4, 0
64+
; BIT64-NEXT: .vbyte 8, .foo_ref_weak # @foo_ref_weak
65+
; BIT64-NEXT: .vbyte 8, TOC[TC0]
66+
; BIT64-NEXT: .vbyte 8, 0
6767
; COMMON-NEXT: .csect .text[PR]
6868
; COMMON-NEXT: .foo_ref_weak:
6969

7070
; COMMON: .globl main[DS] # -- Begin function main
7171
; COMMON-NEXT: .globl .main
7272
; COMMON-NEXT: .align 4
7373
; COMMON-NEXT: .csect main[DS]
74-
; BIT32-NEXT: .long .main # @main
75-
; BIT32-NEXT: .long TOC[TC0]
76-
; BIT32-NEXT: .long 0
77-
; BIT64-NEXT: .llong .main # @main
78-
; BIT64-NEXT: .llong TOC[TC0]
79-
; BIT64-NEXT: .llong 0
74+
; BIT32-NEXT: .vbyte 4, .main # @main
75+
; BIT32-NEXT: .vbyte 4, TOC[TC0]
76+
; BIT32-NEXT: .vbyte 4, 0
77+
; BIT64-NEXT: .vbyte 8, .main # @main
78+
; BIT64-NEXT: .vbyte 8, TOC[TC0]
79+
; BIT64-NEXT: .vbyte 8, 0
8080
; COMMON-NEXT: .csect .text[PR]
8181
; COMMON-NEXT: .main:
8282

@@ -85,12 +85,12 @@ entry:
8585
; BIT32-NEXT: .align 2
8686
; BIT64-NEXT: .align 3
8787
; COMMON-NEXT: foo_weak_p:
88-
; BIT32-NEXT: .long foo_ref_weak[DS]
89-
; BIT64-NEXT: .llong foo_ref_weak[DS]
88+
; BIT32-NEXT: .vbyte 4, foo_ref_weak[DS]
89+
; BIT64-NEXT: .vbyte 8, foo_ref_weak[DS]
9090
; COMMON-NEXT: .weak b
9191
; COMMON-NEXT: .align 2
9292
; COMMON-NEXT: b:
93-
; COMMON-NEXT: .long 0 # 0x0
93+
; COMMON-NEXT: .vbyte 4, 0 # 0x0
9494
; COMMON-NEXT: .toc
9595
; COMMON-NEXT: LC0:
9696
; COMMON-NEXT: .tc foo_weak_p[TC],foo_weak_p

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