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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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+ ; PR125228
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define <16 x i8 > @knownbits_bitcast_masked_shift (<16 x i8 > %arg ) {
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; CHECK-LABEL: define <16 x i8> @knownbits_bitcast_masked_shift(
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; CHECK-SAME: <16 x i8> [[ARG:%.*]]) {
@@ -17,7 +19,6 @@ define <16 x i8> @knownbits_bitcast_masked_shift(<16 x i8> %arg) {
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; CHECK-NEXT: [[BITCAST6:%.*]] = bitcast <8 x i16> [[SHL5]] to <16 x i8>
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; CHECK-NEXT: ret <16 x i8> [[BITCAST6]]
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;
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-
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%bitcast = bitcast <16 x i8 > %arg to <8 x i16 >
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%lshr = lshr <8 x i16 > %bitcast , splat (i16 4 )
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%bitcast1 = bitcast <8 x i16 > %lshr to <16 x i8 >
@@ -51,7 +52,6 @@ define <16 x i8> @knownbits_shuffle_bitcast_masked_shift(<8 x i16> %arg) {
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; CHECK-NEXT: [[BITCAST7:%.*]] = bitcast <8 x i16> [[SHL6]] to <16 x i8>
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; CHECK-NEXT: ret <16 x i8> [[BITCAST7]]
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;
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-
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%bitcast = bitcast <8 x i16 > %arg to <16 x i8 >
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%shufflevector = shufflevector <16 x i8 > %bitcast , <16 x i8 > poison, <16 x i32 > <i32 1 , i32 0 , i32 3 , i32 2 , i32 5 , i32 4 , i32 7 , i32 6 , i32 9 , i32 8 , i32 11 , i32 10 , i32 13 , i32 12 , i32 15 , i32 14 >
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%bitcast1 = bitcast <16 x i8 > %shufflevector to <8 x i16 >
@@ -80,7 +80,6 @@ define <16 x i8> @knownbits_shuffle_masked_nibble_shift(<8 x i16> %arg) {
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; CHECK-NEXT: [[BITCAST2:%.*]] = bitcast <8 x i16> [[SHL]] to <16 x i8>
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; CHECK-NEXT: ret <16 x i8> [[BITCAST2]]
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;
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-
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%bitcast = bitcast <8 x i16 > %arg to <16 x i8 >
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%and = and <16 x i8 > %bitcast , splat (i8 15 )
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%shufflevector = shufflevector <16 x i8 > %and , <16 x i8 > poison, <16 x i32 > <i32 1 , i32 0 , i32 3 , i32 2 , i32 5 , i32 4 , i32 7 , i32 6 , i32 9 , i32 8 , i32 11 , i32 10 , i32 13 , i32 12 , i32 15 , i32 14 >
@@ -102,7 +101,6 @@ define <16 x i8> @knownbits_reverse_shuffle_masked_shift(<8 x i16> %arg) {
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; CHECK-NEXT: [[BITCAST2:%.*]] = bitcast <8 x i16> [[SHL]] to <16 x i8>
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; CHECK-NEXT: ret <16 x i8> [[BITCAST2]]
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;
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-
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%bitcast = bitcast <8 x i16 > %arg to <16 x i8 >
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%and = and <16 x i8 > %bitcast , splat (i8 15 )
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%shufflevector = shufflevector <16 x i8 > %and , <16 x i8 > poison, <16 x i32 > <i32 3 , i32 2 , i32 1 , i32 0 , i32 7 , i32 6 , i32 5 , i32 4 , i32 11 , i32 10 , i32 9 , i32 8 , i32 15 , i32 14 , i32 13 , i32 12 >
@@ -123,7 +121,6 @@ define <16 x i8> @knownbits_interleave_mul_extract_bit(<16 x i8> %arg) {
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; CHECK-NEXT: [[BITCAST1:%.*]] = bitcast <8 x i16> [[LSHR]] to <16 x i8>
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; CHECK-NEXT: ret <16 x i8> [[BITCAST1]]
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;
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-
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%shufflevector = shufflevector <16 x i8 > %arg , <16 x i8 > <i8 0 , i8 0 , i8 0 , i8 0 , i8 0 , i8 0 , i8 0 , i8 0 , i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison>, <16 x i32 > <i32 0 , i32 16 , i32 1 , i32 17 , i32 2 , i32 18 , i32 3 , i32 19 , i32 4 , i32 20 , i32 5 , i32 21 , i32 6 , i32 22 , i32 7 , i32 23 >
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%bitcast = bitcast <16 x i8 > %shufflevector to <8 x i16 >
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%mul = mul nuw <8 x i16 > %bitcast , <i16 171 , i16 0 , i16 0 , i16 0 , i16 0 , i16 0 , i16 0 , i16 0 >
@@ -151,7 +148,6 @@ define <16 x i8> @knownbits_reverse_shuffle_masked_ops(<8 x i16> %arg) {
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; CHECK-NEXT: [[BITCAST7:%.*]] = bitcast <8 x i16> [[SHL6]] to <16 x i8>
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; CHECK-NEXT: ret <16 x i8> [[BITCAST7]]
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;
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-
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%bitcast = bitcast <8 x i16 > %arg to <16 x i8 >
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%shufflevector = shufflevector <16 x i8 > %bitcast , <16 x i8 > poison, <16 x i32 > <i32 3 , i32 2 , i32 1 , i32 0 , i32 7 , i32 6 , i32 5 , i32 4 , i32 11 , i32 10 , i32 9 , i32 8 , i32 15 , i32 14 , i32 13 , i32 12 >
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%bitcast1 = bitcast <16 x i8 > %shufflevector to <8 x i16 >
@@ -187,7 +183,6 @@ define <16 x i8> @knownbits_v4i32_to_v16i8_shuffle_masked_pipeline(<4 x i32> %ar
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; CHECK-NEXT: [[BITCAST7:%.*]] = bitcast <8 x i16> [[SHL6]] to <16 x i8>
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; CHECK-NEXT: ret <16 x i8> [[BITCAST7]]
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;
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-
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%bitcast = bitcast <4 x i32 > %arg to <16 x i8 >
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%shufflevector = shufflevector <16 x i8 > %bitcast , <16 x i8 > poison, <16 x i32 > <i32 3 , i32 2 , i32 1 , i32 0 , i32 7 , i32 6 , i32 5 , i32 4 , i32 11 , i32 10 , i32 9 , i32 8 , i32 15 , i32 14 , i32 13 , i32 12 >
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%bitcast1 = bitcast <16 x i8 > %shufflevector to <8 x i16 >
@@ -224,7 +219,6 @@ define { i32, i1 } @knownbits_popcount_add_with_overflow(i32 %arg, i32 %arg1, i3
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; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[CALL12]], 0
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; CHECK-NEXT: ret { i32, i1 } [[TMP1]]
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;
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-
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%insertelement = insertelement <4 x i32 > poison, i32 %arg2 , i64 0
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%insertelement4 = insertelement <4 x i32 > %insertelement , i32 %arg3 , i64 1
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%bitcast = bitcast <4 x i32 > %insertelement4 to <2 x i64 >
@@ -259,10 +253,9 @@ define <16 x i8> @knownbits_shuffle_add_shift_v32i8(<32 x i8> %arg, <32 x i8> %a
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; CHECK-NEXT: [[SHL10:%.*]] = shl <8 x i16> [[SHUFFLEVECTOR9]], splat (i16 8)
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; CHECK-NEXT: [[BITCAST11:%.*]] = bitcast <8 x i16> [[SHL10]] to <16 x i8>
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; CHECK-NEXT: [[ADD12:%.*]] = add <16 x i8> [[BITCAST11]], [[BITCAST7]]
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- ; CHECK-NEXT: [[ADD13 :%.*]] = add <16 x i8> [[ADD12]], [[BITCAST3]]
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- ; CHECK-NEXT: ret <16 x i8> [[ADD13 ]]
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+ ; CHECK-NEXT: [[ADD17 :%.*]] = add <16 x i8> [[ADD12]], [[BITCAST3]]
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+ ; CHECK-NEXT: ret <16 x i8> [[ADD17 ]]
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;
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-
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%shufflevector = shufflevector <32 x i8 > %arg , <32 x i8 > poison, <16 x i32 > <i32 0 , i32 1 , i32 2 , i32 3 , i32 4 , i32 5 , i32 6 , i32 7 , i32 8 , i32 9 , i32 10 , i32 11 , i32 12 , i32 13 , i32 14 , i32 15 >
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%shufflevector2 = shufflevector <32 x i8 > %arg , <32 x i8 > poison, <16 x i32 > <i32 16 , i32 17 , i32 18 , i32 19 , i32 20 , i32 21 , i32 22 , i32 23 , i32 24 , i32 25 , i32 26 , i32 27 , i32 28 , i32 29 , i32 30 , i32 31 >
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%add = add <16 x i8 > %shufflevector , %shufflevector2
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