@@ -3156,6 +3156,7 @@ define void @mscatter_v8i64(<8 x i64> %val, <8 x ptr> %ptrs, <8 x i1> %m) {
3156
3156
; RV32ZVE32F-NEXT: .cfi_offset s0, -4
3157
3157
; RV32ZVE32F-NEXT: .cfi_offset s1, -8
3158
3158
; RV32ZVE32F-NEXT: .cfi_offset s2, -12
3159
+ ; RV32ZVE32F-NEXT: .cfi_remember_state
3159
3160
; RV32ZVE32F-NEXT: lw a1, 56(a0)
3160
3161
; RV32ZVE32F-NEXT: lw a2, 60(a0)
3161
3162
; RV32ZVE32F-NEXT: lw a5, 40(a0)
@@ -3212,6 +3213,7 @@ define void @mscatter_v8i64(<8 x i64> %val, <8 x ptr> %ptrs, <8 x i1> %m) {
3212
3213
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
3213
3214
; RV32ZVE32F-NEXT: ret
3214
3215
; RV32ZVE32F-NEXT: .LBB41_10: # %cond.store
3216
+ ; RV32ZVE32F-NEXT: .cfi_restore_state
3215
3217
; RV32ZVE32F-NEXT: lw s1, 4(a0)
3216
3218
; RV32ZVE32F-NEXT: lw a0, 0(a0)
3217
3219
; RV32ZVE32F-NEXT: vsetvli zero, zero, e32, m4, ta, ma
@@ -3280,6 +3282,7 @@ define void @mscatter_v8i64(<8 x i64> %val, <8 x ptr> %ptrs, <8 x i1> %m) {
3280
3282
; RV64ZVE32F-NEXT: .cfi_offset s0, -8
3281
3283
; RV64ZVE32F-NEXT: .cfi_offset s1, -16
3282
3284
; RV64ZVE32F-NEXT: .cfi_offset s2, -24
3285
+ ; RV64ZVE32F-NEXT: .cfi_remember_state
3283
3286
; RV64ZVE32F-NEXT: ld a4, 40(a1)
3284
3287
; RV64ZVE32F-NEXT: ld a3, 48(a1)
3285
3288
; RV64ZVE32F-NEXT: ld a2, 56(a1)
@@ -3332,6 +3335,7 @@ define void @mscatter_v8i64(<8 x i64> %val, <8 x ptr> %ptrs, <8 x i1> %m) {
3332
3335
; RV64ZVE32F-NEXT: .cfi_def_cfa_offset 0
3333
3336
; RV64ZVE32F-NEXT: ret
3334
3337
; RV64ZVE32F-NEXT: .LBB41_10: # %cond.store
3338
+ ; RV64ZVE32F-NEXT: .cfi_restore_state
3335
3339
; RV64ZVE32F-NEXT: ld a1, 0(a1)
3336
3340
; RV64ZVE32F-NEXT: ld a0, 0(a0)
3337
3341
; RV64ZVE32F-NEXT: sd a0, 0(a1)
@@ -3394,6 +3398,7 @@ define void @mscatter_baseidx_v8i8_v8i64(<8 x i64> %val, ptr %base, <8 x i8> %id
3394
3398
; RV32ZVE32F-NEXT: .cfi_offset s0, -4
3395
3399
; RV32ZVE32F-NEXT: .cfi_offset s1, -8
3396
3400
; RV32ZVE32F-NEXT: .cfi_offset s2, -12
3401
+ ; RV32ZVE32F-NEXT: .cfi_remember_state
3397
3402
; RV32ZVE32F-NEXT: lw a2, 56(a0)
3398
3403
; RV32ZVE32F-NEXT: lw a3, 60(a0)
3399
3404
; RV32ZVE32F-NEXT: lw a6, 40(a0)
@@ -3455,6 +3460,7 @@ define void @mscatter_baseidx_v8i8_v8i64(<8 x i64> %val, ptr %base, <8 x i8> %id
3455
3460
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
3456
3461
; RV32ZVE32F-NEXT: ret
3457
3462
; RV32ZVE32F-NEXT: .LBB42_10: # %cond.store
3463
+ ; RV32ZVE32F-NEXT: .cfi_restore_state
3458
3464
; RV32ZVE32F-NEXT: lw a1, 4(a0)
3459
3465
; RV32ZVE32F-NEXT: lw a0, 0(a0)
3460
3466
; RV32ZVE32F-NEXT: vmv.x.s s2, v8
@@ -3642,6 +3648,7 @@ define void @mscatter_baseidx_sext_v8i8_v8i64(<8 x i64> %val, ptr %base, <8 x i8
3642
3648
; RV32ZVE32F-NEXT: .cfi_offset s0, -4
3643
3649
; RV32ZVE32F-NEXT: .cfi_offset s1, -8
3644
3650
; RV32ZVE32F-NEXT: .cfi_offset s2, -12
3651
+ ; RV32ZVE32F-NEXT: .cfi_remember_state
3645
3652
; RV32ZVE32F-NEXT: lw a2, 56(a0)
3646
3653
; RV32ZVE32F-NEXT: lw a3, 60(a0)
3647
3654
; RV32ZVE32F-NEXT: lw a6, 40(a0)
@@ -3703,6 +3710,7 @@ define void @mscatter_baseidx_sext_v8i8_v8i64(<8 x i64> %val, ptr %base, <8 x i8
3703
3710
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
3704
3711
; RV32ZVE32F-NEXT: ret
3705
3712
; RV32ZVE32F-NEXT: .LBB43_10: # %cond.store
3713
+ ; RV32ZVE32F-NEXT: .cfi_restore_state
3706
3714
; RV32ZVE32F-NEXT: lw a1, 4(a0)
3707
3715
; RV32ZVE32F-NEXT: lw a0, 0(a0)
3708
3716
; RV32ZVE32F-NEXT: vmv.x.s s2, v8
@@ -3892,6 +3900,7 @@ define void @mscatter_baseidx_zext_v8i8_v8i64(<8 x i64> %val, ptr %base, <8 x i8
3892
3900
; RV32ZVE32F-NEXT: .cfi_offset s0, -4
3893
3901
; RV32ZVE32F-NEXT: .cfi_offset s1, -8
3894
3902
; RV32ZVE32F-NEXT: .cfi_offset s2, -12
3903
+ ; RV32ZVE32F-NEXT: .cfi_remember_state
3895
3904
; RV32ZVE32F-NEXT: lw a2, 56(a0)
3896
3905
; RV32ZVE32F-NEXT: lw a3, 60(a0)
3897
3906
; RV32ZVE32F-NEXT: lw a6, 40(a0)
@@ -3953,6 +3962,7 @@ define void @mscatter_baseidx_zext_v8i8_v8i64(<8 x i64> %val, ptr %base, <8 x i8
3953
3962
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
3954
3963
; RV32ZVE32F-NEXT: ret
3955
3964
; RV32ZVE32F-NEXT: .LBB44_10: # %cond.store
3965
+ ; RV32ZVE32F-NEXT: .cfi_restore_state
3956
3966
; RV32ZVE32F-NEXT: lw a1, 4(a0)
3957
3967
; RV32ZVE32F-NEXT: lw a0, 0(a0)
3958
3968
; RV32ZVE32F-NEXT: vmv.x.s s2, v8
@@ -4149,6 +4159,7 @@ define void @mscatter_baseidx_v8i16_v8i64(<8 x i64> %val, ptr %base, <8 x i16> %
4149
4159
; RV32ZVE32F-NEXT: .cfi_offset s0, -4
4150
4160
; RV32ZVE32F-NEXT: .cfi_offset s1, -8
4151
4161
; RV32ZVE32F-NEXT: .cfi_offset s2, -12
4162
+ ; RV32ZVE32F-NEXT: .cfi_remember_state
4152
4163
; RV32ZVE32F-NEXT: lw a2, 56(a0)
4153
4164
; RV32ZVE32F-NEXT: lw a3, 60(a0)
4154
4165
; RV32ZVE32F-NEXT: lw a6, 40(a0)
@@ -4210,6 +4221,7 @@ define void @mscatter_baseidx_v8i16_v8i64(<8 x i64> %val, ptr %base, <8 x i16> %
4210
4221
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
4211
4222
; RV32ZVE32F-NEXT: ret
4212
4223
; RV32ZVE32F-NEXT: .LBB45_10: # %cond.store
4224
+ ; RV32ZVE32F-NEXT: .cfi_restore_state
4213
4225
; RV32ZVE32F-NEXT: lw a1, 4(a0)
4214
4226
; RV32ZVE32F-NEXT: lw a0, 0(a0)
4215
4227
; RV32ZVE32F-NEXT: vmv.x.s s2, v8
@@ -4398,6 +4410,7 @@ define void @mscatter_baseidx_sext_v8i16_v8i64(<8 x i64> %val, ptr %base, <8 x i
4398
4410
; RV32ZVE32F-NEXT: .cfi_offset s0, -4
4399
4411
; RV32ZVE32F-NEXT: .cfi_offset s1, -8
4400
4412
; RV32ZVE32F-NEXT: .cfi_offset s2, -12
4413
+ ; RV32ZVE32F-NEXT: .cfi_remember_state
4401
4414
; RV32ZVE32F-NEXT: lw a2, 56(a0)
4402
4415
; RV32ZVE32F-NEXT: lw a3, 60(a0)
4403
4416
; RV32ZVE32F-NEXT: lw a6, 40(a0)
@@ -4459,6 +4472,7 @@ define void @mscatter_baseidx_sext_v8i16_v8i64(<8 x i64> %val, ptr %base, <8 x i
4459
4472
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
4460
4473
; RV32ZVE32F-NEXT: ret
4461
4474
; RV32ZVE32F-NEXT: .LBB46_10: # %cond.store
4475
+ ; RV32ZVE32F-NEXT: .cfi_restore_state
4462
4476
; RV32ZVE32F-NEXT: lw a1, 4(a0)
4463
4477
; RV32ZVE32F-NEXT: lw a0, 0(a0)
4464
4478
; RV32ZVE32F-NEXT: vmv.x.s s2, v8
@@ -4649,6 +4663,7 @@ define void @mscatter_baseidx_zext_v8i16_v8i64(<8 x i64> %val, ptr %base, <8 x i
4649
4663
; RV32ZVE32F-NEXT: .cfi_offset s0, -4
4650
4664
; RV32ZVE32F-NEXT: .cfi_offset s1, -8
4651
4665
; RV32ZVE32F-NEXT: .cfi_offset s2, -12
4666
+ ; RV32ZVE32F-NEXT: .cfi_remember_state
4652
4667
; RV32ZVE32F-NEXT: lw a2, 56(a0)
4653
4668
; RV32ZVE32F-NEXT: lw a3, 60(a0)
4654
4669
; RV32ZVE32F-NEXT: lw a6, 40(a0)
@@ -4710,6 +4725,7 @@ define void @mscatter_baseidx_zext_v8i16_v8i64(<8 x i64> %val, ptr %base, <8 x i
4710
4725
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
4711
4726
; RV32ZVE32F-NEXT: ret
4712
4727
; RV32ZVE32F-NEXT: .LBB47_10: # %cond.store
4728
+ ; RV32ZVE32F-NEXT: .cfi_restore_state
4713
4729
; RV32ZVE32F-NEXT: lw a1, 4(a0)
4714
4730
; RV32ZVE32F-NEXT: lw a0, 0(a0)
4715
4731
; RV32ZVE32F-NEXT: vmv.x.s s2, v8
@@ -4908,6 +4924,7 @@ define void @mscatter_baseidx_v8i32_v8i64(<8 x i64> %val, ptr %base, <8 x i32> %
4908
4924
; RV32ZVE32F-NEXT: .cfi_offset s0, -4
4909
4925
; RV32ZVE32F-NEXT: .cfi_offset s1, -8
4910
4926
; RV32ZVE32F-NEXT: .cfi_offset s2, -12
4927
+ ; RV32ZVE32F-NEXT: .cfi_remember_state
4911
4928
; RV32ZVE32F-NEXT: lw a2, 56(a0)
4912
4929
; RV32ZVE32F-NEXT: lw a3, 60(a0)
4913
4930
; RV32ZVE32F-NEXT: lw a6, 40(a0)
@@ -4968,6 +4985,7 @@ define void @mscatter_baseidx_v8i32_v8i64(<8 x i64> %val, ptr %base, <8 x i32> %
4968
4985
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
4969
4986
; RV32ZVE32F-NEXT: ret
4970
4987
; RV32ZVE32F-NEXT: .LBB48_10: # %cond.store
4988
+ ; RV32ZVE32F-NEXT: .cfi_restore_state
4971
4989
; RV32ZVE32F-NEXT: lw a1, 4(a0)
4972
4990
; RV32ZVE32F-NEXT: lw a0, 0(a0)
4973
4991
; RV32ZVE32F-NEXT: vmv.x.s s2, v8
@@ -5155,6 +5173,7 @@ define void @mscatter_baseidx_sext_v8i32_v8i64(<8 x i64> %val, ptr %base, <8 x i
5155
5173
; RV32ZVE32F-NEXT: .cfi_offset s0, -4
5156
5174
; RV32ZVE32F-NEXT: .cfi_offset s1, -8
5157
5175
; RV32ZVE32F-NEXT: .cfi_offset s2, -12
5176
+ ; RV32ZVE32F-NEXT: .cfi_remember_state
5158
5177
; RV32ZVE32F-NEXT: lw a2, 56(a0)
5159
5178
; RV32ZVE32F-NEXT: lw a3, 60(a0)
5160
5179
; RV32ZVE32F-NEXT: lw a6, 40(a0)
@@ -5215,6 +5234,7 @@ define void @mscatter_baseidx_sext_v8i32_v8i64(<8 x i64> %val, ptr %base, <8 x i
5215
5234
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
5216
5235
; RV32ZVE32F-NEXT: ret
5217
5236
; RV32ZVE32F-NEXT: .LBB49_10: # %cond.store
5237
+ ; RV32ZVE32F-NEXT: .cfi_restore_state
5218
5238
; RV32ZVE32F-NEXT: lw a1, 4(a0)
5219
5239
; RV32ZVE32F-NEXT: lw a0, 0(a0)
5220
5240
; RV32ZVE32F-NEXT: vmv.x.s s2, v8
@@ -5403,6 +5423,7 @@ define void @mscatter_baseidx_zext_v8i32_v8i64(<8 x i64> %val, ptr %base, <8 x i
5403
5423
; RV32ZVE32F-NEXT: .cfi_offset s0, -4
5404
5424
; RV32ZVE32F-NEXT: .cfi_offset s1, -8
5405
5425
; RV32ZVE32F-NEXT: .cfi_offset s2, -12
5426
+ ; RV32ZVE32F-NEXT: .cfi_remember_state
5406
5427
; RV32ZVE32F-NEXT: lw a2, 56(a0)
5407
5428
; RV32ZVE32F-NEXT: lw a3, 60(a0)
5408
5429
; RV32ZVE32F-NEXT: lw a6, 40(a0)
@@ -5463,6 +5484,7 @@ define void @mscatter_baseidx_zext_v8i32_v8i64(<8 x i64> %val, ptr %base, <8 x i
5463
5484
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
5464
5485
; RV32ZVE32F-NEXT: ret
5465
5486
; RV32ZVE32F-NEXT: .LBB50_10: # %cond.store
5487
+ ; RV32ZVE32F-NEXT: .cfi_restore_state
5466
5488
; RV32ZVE32F-NEXT: lw a1, 4(a0)
5467
5489
; RV32ZVE32F-NEXT: lw a0, 0(a0)
5468
5490
; RV32ZVE32F-NEXT: vmv.x.s s2, v8
@@ -5671,6 +5693,7 @@ define void @mscatter_baseidx_v8i64(<8 x i64> %val, ptr %base, <8 x i64> %idxs,
5671
5693
; RV32ZVE32F-NEXT: .cfi_offset s6, -28
5672
5694
; RV32ZVE32F-NEXT: .cfi_offset s7, -32
5673
5695
; RV32ZVE32F-NEXT: .cfi_offset s8, -36
5696
+ ; RV32ZVE32F-NEXT: .cfi_remember_state
5674
5697
; RV32ZVE32F-NEXT: lw a3, 56(a0)
5675
5698
; RV32ZVE32F-NEXT: lw a4, 60(a0)
5676
5699
; RV32ZVE32F-NEXT: lw a7, 40(a0)
@@ -5759,6 +5782,7 @@ define void @mscatter_baseidx_v8i64(<8 x i64> %val, ptr %base, <8 x i64> %idxs,
5759
5782
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
5760
5783
; RV32ZVE32F-NEXT: ret
5761
5784
; RV32ZVE32F-NEXT: .LBB51_10: # %cond.store
5785
+ ; RV32ZVE32F-NEXT: .cfi_restore_state
5762
5786
; RV32ZVE32F-NEXT: lw a1, 4(a0)
5763
5787
; RV32ZVE32F-NEXT: lw a0, 0(a0)
5764
5788
; RV32ZVE32F-NEXT: vmv.x.s s2, v8
@@ -5828,6 +5852,7 @@ define void @mscatter_baseidx_v8i64(<8 x i64> %val, ptr %base, <8 x i64> %idxs,
5828
5852
; RV64ZVE32F-NEXT: .cfi_offset s1, -16
5829
5853
; RV64ZVE32F-NEXT: .cfi_offset s2, -24
5830
5854
; RV64ZVE32F-NEXT: .cfi_offset s3, -32
5855
+ ; RV64ZVE32F-NEXT: .cfi_remember_state
5831
5856
; RV64ZVE32F-NEXT: ld a5, 40(a0)
5832
5857
; RV64ZVE32F-NEXT: ld a4, 48(a0)
5833
5858
; RV64ZVE32F-NEXT: ld a3, 56(a0)
@@ -5884,6 +5909,7 @@ define void @mscatter_baseidx_v8i64(<8 x i64> %val, ptr %base, <8 x i64> %idxs,
5884
5909
; RV64ZVE32F-NEXT: .cfi_def_cfa_offset 0
5885
5910
; RV64ZVE32F-NEXT: ret
5886
5911
; RV64ZVE32F-NEXT: .LBB51_10: # %cond.store
5912
+ ; RV64ZVE32F-NEXT: .cfi_restore_state
5887
5913
; RV64ZVE32F-NEXT: ld a2, 0(a2)
5888
5914
; RV64ZVE32F-NEXT: ld a0, 0(a0)
5889
5915
; RV64ZVE32F-NEXT: slli a2, a2, 3
0 commit comments