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Revert "Finish deleting the le32/le64 targets" (#99079)
Reverts #98497 We're reverting this for approx 30 days so that the Halide project has time to transition off the target.
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lines changed

18 files changed

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clang/docs/ReleaseNotes.rst

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@@ -40,8 +40,6 @@ code bases.
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- Setting the deprecated CMake variable ``GCC_INSTALL_PREFIX`` (which sets the
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default ``--gcc-toolchain=``) now leads to a fatal error.
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43-
- The ``le32`` and ``le64`` targets have been removed.
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C/C++ Language Potentially Breaking Changes
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-------------------------------------------
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clang/docs/tools/clang-formatted-files.txt

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@@ -362,6 +362,7 @@ clang/lib/Basic/Targets/BPF.cpp
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clang/lib/Basic/Targets/BPF.h
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clang/lib/Basic/Targets/Hexagon.h
364364
clang/lib/Basic/Targets/Lanai.h
365+
clang/lib/Basic/Targets/Le64.h
365366
clang/lib/Basic/Targets/M68k.h
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clang/lib/Basic/Targets/MSP430.h
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clang/lib/Basic/Targets/NVPTX.cpp

clang/lib/Basic/CMakeLists.txt

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@@ -102,6 +102,7 @@ add_clang_library(clangBasic
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Targets/DirectX.cpp
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Targets/Hexagon.cpp
104104
Targets/Lanai.cpp
105+
Targets/Le64.cpp
105106
Targets/LoongArch.cpp
106107
Targets/M68k.cpp
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Targets/MSP430.cpp

clang/lib/Basic/Targets.cpp

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@@ -23,6 +23,7 @@
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#include "Targets/DirectX.h"
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#include "Targets/Hexagon.h"
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#include "Targets/Lanai.h"
26+
#include "Targets/Le64.h"
2627
#include "Targets/LoongArch.h"
2728
#include "Targets/M68k.h"
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#include "Targets/MSP430.h"
@@ -343,6 +344,17 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
343344
return std::make_unique<M68kTargetInfo>(Triple, Opts);
344345
}
345346

347+
case llvm::Triple::le32:
348+
switch (os) {
349+
case llvm::Triple::NaCl:
350+
return std::make_unique<NaClTargetInfo<PNaClTargetInfo>>(Triple, Opts);
351+
default:
352+
return nullptr;
353+
}
354+
355+
case llvm::Triple::le64:
356+
return std::make_unique<Le64TargetInfo>(Triple, Opts);
357+
346358
case llvm::Triple::ppc:
347359
switch (os) {
348360
case llvm::Triple::Linux:

clang/lib/Basic/Targets/Le64.cpp

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@@ -0,0 +1,30 @@
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//===--- Le64.cpp - Implement Le64 target feature support -----------------===//
2+
//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===----------------------------------------------------------------------===//
8+
//
9+
// This file implements Le64 TargetInfo objects.
10+
//
11+
//===----------------------------------------------------------------------===//
12+
13+
#include "Le64.h"
14+
#include "Targets.h"
15+
#include "clang/Basic/Builtins.h"
16+
#include "clang/Basic/MacroBuilder.h"
17+
#include "clang/Basic/TargetBuiltins.h"
18+
19+
using namespace clang;
20+
using namespace clang::targets;
21+
22+
ArrayRef<Builtin::Info> Le64TargetInfo::getTargetBuiltins() const {
23+
return {};
24+
}
25+
26+
void Le64TargetInfo::getTargetDefines(const LangOptions &Opts,
27+
MacroBuilder &Builder) const {
28+
DefineStd(Builder, "unix", Opts);
29+
defineCPUMacros(Builder, "le64", /*Tuning=*/false);
30+
}

clang/lib/Basic/Targets/Le64.h

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//===--- Le64.h - Declare Le64 target feature support -----------*- C++ -*-===//
2+
//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===----------------------------------------------------------------------===//
8+
//
9+
// This file declares Le64 TargetInfo objects.
10+
//
11+
//===----------------------------------------------------------------------===//
12+
13+
#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_LE64_H
14+
#define LLVM_CLANG_LIB_BASIC_TARGETS_LE64_H
15+
16+
#include "clang/Basic/TargetInfo.h"
17+
#include "clang/Basic/TargetOptions.h"
18+
#include "llvm/Support/Compiler.h"
19+
#include "llvm/TargetParser/Triple.h"
20+
21+
namespace clang {
22+
namespace targets {
23+
24+
class LLVM_LIBRARY_VISIBILITY Le64TargetInfo : public TargetInfo {
25+
26+
public:
27+
Le64TargetInfo(const llvm::Triple &Triple, const TargetOptions &)
28+
: TargetInfo(Triple) {
29+
NoAsmVariants = true;
30+
LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
31+
MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
32+
resetDataLayout("e-m:e-v128:32-v16:16-v32:32-v96:32-n8:16:32:64-S128");
33+
}
34+
35+
void getTargetDefines(const LangOptions &Opts,
36+
MacroBuilder &Builder) const override;
37+
38+
ArrayRef<Builtin::Info> getTargetBuiltins() const override;
39+
40+
BuiltinVaListKind getBuiltinVaListKind() const override {
41+
return TargetInfo::PNaClABIBuiltinVaList;
42+
}
43+
44+
std::string_view getClobbers() const override { return ""; }
45+
46+
ArrayRef<const char *> getGCCRegNames() const override {
47+
return std::nullopt;
48+
}
49+
50+
ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
51+
return std::nullopt;
52+
}
53+
54+
bool validateAsmConstraint(const char *&Name,
55+
TargetInfo::ConstraintInfo &Info) const override {
56+
return false;
57+
}
58+
59+
bool hasProtectedVisibility() const override { return false; }
60+
};
61+
62+
} // namespace targets
63+
} // namespace clang
64+
#endif // LLVM_CLANG_LIB_BASIC_TARGETS_LE64_H

clang/lib/Basic/Targets/OSTargets.h

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@@ -841,6 +841,9 @@ class LLVM_LIBRARY_VISIBILITY NaClTargetInfo : public OSTargetInfo<Target> {
841841
"i64:64-i128:128-n8:16:32:64-S128");
842842
} else if (Triple.getArch() == llvm::Triple::mipsel) {
843843
// Handled on mips' setDataLayout.
844+
} else {
845+
assert(Triple.getArch() == llvm::Triple::le32);
846+
this->resetDataLayout("e-p:32:32-i64:64");
844847
}
845848
}
846849
};

clang/lib/CodeGen/CodeGenModule.cpp

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@@ -116,6 +116,8 @@ createTargetCodeGenInfo(CodeGenModule &CGM) {
116116
default:
117117
return createDefaultTargetCodeGenInfo(CGM);
118118

119+
case llvm::Triple::le32:
120+
return createPNaClTargetCodeGenInfo(CGM);
119121
case llvm::Triple::m68k:
120122
return createM68kTargetCodeGenInfo(CGM);
121123
case llvm::Triple::mips:

clang/lib/CodeGen/ItaniumCXXABI.cpp

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@@ -576,6 +576,13 @@ CodeGen::CGCXXABI *CodeGen::CreateItaniumCXXABI(CodeGenModule &CGM) {
576576
return new XLCXXABI(CGM);
577577

578578
case TargetCXXABI::GenericItanium:
579+
if (CGM.getContext().getTargetInfo().getTriple().getArch()
580+
== llvm::Triple::le32) {
581+
// For PNaCl, use ARM-style method pointers so that PNaCl code
582+
// does not assume anything about the alignment of function
583+
// pointers.
584+
return new ItaniumCXXABI(CGM, /*UseARMMethodPtrABI=*/true);
585+
}
579586
return new ItaniumCXXABI(CGM);
580587

581588
case TargetCXXABI::Microsoft:

clang/lib/Driver/ToolChains/Clang.cpp

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@@ -3822,6 +3822,12 @@ static void RenderBuiltinOptions(const ToolChain &TC, const llvm::Triple &T,
38223822
if (UseBuiltins)
38233823
A->render(Args, CmdArgs);
38243824
}
3825+
3826+
// le32-specific flags:
3827+
// -fno-math-builtin: clang should not convert math builtins to intrinsics
3828+
// by default.
3829+
if (TC.getArch() == llvm::Triple::le32)
3830+
CmdArgs.push_back("-fno-math-builtin");
38253831
}
38263832

38273833
bool Driver::getDefaultModuleCachePath(SmallVectorImpl<char> &Result) {

clang/test/CodeGen/bitfield-access-pad.c

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@@ -16,6 +16,7 @@
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// Configs that have expensive unaligned access
1717
// Little Endian
1818
// RUN: %clang_cc1 -triple=hexagon-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-T %s
19+
// RUN: %clang_cc1 -triple=le64-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-T %s
1920

2021
// Big endian
2122
// RUN: %clang_cc1 -triple=m68k-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-T %s

clang/test/CodeGen/bitfield-access-unit.c

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@@ -53,8 +53,8 @@
5353
// RUN: %clang_cc1 -triple=sparc-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT-STRICT %s
5454
// RUN: %clang_cc1 -triple=tce-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT-STRICT %s
5555

56-
// m68-elf is a strict alignment ISA with 4-byte aligned 64-bit or 2-byte
57-
// aligned 32-bit integer types. This more compex to describe here.
56+
// Both le64-elf and m68-elf are strict alignment ISAs with 4-byte aligned
57+
// 64-bit or 2-byte aligned 32-bit integer types. This more compex to describe here.
5858

5959
// If unaligned access is expensive don't stick these together.
6060
struct A {

clang/test/CodeGenCXX/bitfield-access-empty.cpp

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@@ -26,6 +26,7 @@
2626
// RUN: %clang_cc1 -triple=bpf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
2727
// RUN: %clang_cc1 -triple=csky %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
2828
// RUN: %clang_cc1 -triple=hexagon-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
29+
// RUN: %clang_cc1 -triple=le64-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
2930
// RUN: %clang_cc1 -triple=loongarch32-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
3031
// RUN: %clang_cc1 -triple=nvptx-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
3132
// RUN: %clang_cc1 -triple=riscv32 %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s

clang/test/CodeGenCXX/bitfield-access-tail.cpp

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// RUN: %clang_cc1 -triple=bpf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s
2727
// RUN: %clang_cc1 -triple=csky %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
2828
// RUN: %clang_cc1 -triple=hexagon-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
29+
// RUN: %clang_cc1 -triple=le64-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s
2930
// RUN: %clang_cc1 -triple=loongarch32-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
3031
// RUN: %clang_cc1 -triple=nvptx-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
3132
// RUN: %clang_cc1 -triple=riscv32 %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s

clang/test/Preprocessor/predefined-macros-no-warnings.c

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@@ -75,6 +75,8 @@
7575
// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple m68k
7676
// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple m68k-linux
7777
// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple m68k-netbsd
78+
// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple le32-nacl
79+
// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple le64
7880
// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple ppc
7981
// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple ppc-freebsd
8082
// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple ppc-netbsd

llvm/include/llvm/TargetParser/Triple.h

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@@ -88,6 +88,8 @@ class Triple {
8888
xtensa, // Tensilica: Xtensa
8989
nvptx, // NVPTX: 32-bit
9090
nvptx64, // NVPTX: 64-bit
91+
le32, // le32: generic little-endian 32-bit CPU (PNaCl)
92+
le64, // le64: generic little-endian 64-bit CPU (PNaCl)
9193
amdil, // AMDIL
9294
amdil64, // AMDIL with 64-bit pointers
9395
hsail, // AMD HSAIL

llvm/lib/TargetParser/Triple.cpp

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@@ -44,6 +44,8 @@ StringRef Triple::getArchTypeName(ArchType Kind) {
4444
case hsail: return "hsail";
4545
case kalimba: return "kalimba";
4646
case lanai: return "lanai";
47+
case le32: return "le32";
48+
case le64: return "le64";
4749
case loongarch32: return "loongarch32";
4850
case loongarch64: return "loongarch64";
4951
case m68k: return "m68k";
@@ -197,6 +199,9 @@ StringRef Triple::getArchTypePrefix(ArchType Kind) {
197199
case nvptx: return "nvvm";
198200
case nvptx64: return "nvvm";
199201

202+
case le32: return "le32";
203+
case le64: return "le64";
204+
200205
case amdil:
201206
case amdil64: return "amdil";
202207

@@ -427,6 +432,8 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
427432
.Case("xcore", xcore)
428433
.Case("nvptx", nvptx)
429434
.Case("nvptx64", nvptx64)
435+
.Case("le32", le32)
436+
.Case("le64", le64)
430437
.Case("amdil", amdil)
431438
.Case("amdil64", amdil64)
432439
.Case("hsail", hsail)
@@ -567,6 +574,8 @@ static Triple::ArchType parseArch(StringRef ArchName) {
567574
.Case("xcore", Triple::xcore)
568575
.Case("nvptx", Triple::nvptx)
569576
.Case("nvptx64", Triple::nvptx64)
577+
.Case("le32", Triple::le32)
578+
.Case("le64", Triple::le64)
570579
.Case("amdil", Triple::amdil)
571580
.Case("amdil64", Triple::amdil64)
572581
.Case("hsail", Triple::hsail)
@@ -896,6 +905,8 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) {
896905
case Triple::hsail:
897906
case Triple::kalimba:
898907
case Triple::lanai:
908+
case Triple::le32:
909+
case Triple::le64:
899910
case Triple::loongarch32:
900911
case Triple::loongarch64:
901912
case Triple::m68k:
@@ -1592,6 +1603,7 @@ unsigned Triple::getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
15921603
case llvm::Triple::hsail:
15931604
case llvm::Triple::kalimba:
15941605
case llvm::Triple::lanai:
1606+
case llvm::Triple::le32:
15951607
case llvm::Triple::loongarch32:
15961608
case llvm::Triple::m68k:
15971609
case llvm::Triple::mips:
@@ -1624,6 +1636,7 @@ unsigned Triple::getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
16241636
case llvm::Triple::bpfeb:
16251637
case llvm::Triple::bpfel:
16261638
case llvm::Triple::hsail64:
1639+
case llvm::Triple::le64:
16271640
case llvm::Triple::loongarch64:
16281641
case llvm::Triple::mips64:
16291642
case llvm::Triple::mips64el:
@@ -1682,6 +1695,7 @@ Triple Triple::get32BitArchVariant() const {
16821695
case Triple::hsail:
16831696
case Triple::kalimba:
16841697
case Triple::lanai:
1698+
case Triple::le32:
16851699
case Triple::loongarch32:
16861700
case Triple::m68k:
16871701
case Triple::mips:
@@ -1712,6 +1726,7 @@ Triple Triple::get32BitArchVariant() const {
17121726
case Triple::aarch64_be: T.setArch(Triple::armeb); break;
17131727
case Triple::amdil64: T.setArch(Triple::amdil); break;
17141728
case Triple::hsail64: T.setArch(Triple::hsail); break;
1729+
case Triple::le64: T.setArch(Triple::le32); break;
17151730
case Triple::loongarch64: T.setArch(Triple::loongarch32); break;
17161731
case Triple::mips64:
17171732
T.setArch(Triple::mips, getSubArch());
@@ -1766,6 +1781,7 @@ Triple Triple::get64BitArchVariant() const {
17661781
case Triple::bpfeb:
17671782
case Triple::bpfel:
17681783
case Triple::hsail64:
1784+
case Triple::le64:
17691785
case Triple::loongarch64:
17701786
case Triple::mips64:
17711787
case Triple::mips64el:
@@ -1789,6 +1805,7 @@ Triple Triple::get64BitArchVariant() const {
17891805
case Triple::arm: T.setArch(Triple::aarch64); break;
17901806
case Triple::armeb: T.setArch(Triple::aarch64_be); break;
17911807
case Triple::hsail: T.setArch(Triple::hsail64); break;
1808+
case Triple::le32: T.setArch(Triple::le64); break;
17921809
case Triple::loongarch32: T.setArch(Triple::loongarch64); break;
17931810
case Triple::mips:
17941811
T.setArch(Triple::mips64, getSubArch());
@@ -1831,6 +1848,8 @@ Triple Triple::getBigEndianArchVariant() const {
18311848
case Triple::hsail64:
18321849
case Triple::hsail:
18331850
case Triple::kalimba:
1851+
case Triple::le32:
1852+
case Triple::le64:
18341853
case Triple::loongarch32:
18351854
case Triple::loongarch64:
18361855
case Triple::msp430:
@@ -1934,6 +1953,8 @@ bool Triple::isLittleEndian() const {
19341953
case Triple::hsail64:
19351954
case Triple::hsail:
19361955
case Triple::kalimba:
1956+
case Triple::le32:
1957+
case Triple::le64:
19371958
case Triple::loongarch32:
19381959
case Triple::loongarch64:
19391960
case Triple::mips64el:

llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn

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@@ -108,6 +108,7 @@ static_library("Basic") {
108108
"Targets/DirectX.cpp",
109109
"Targets/Hexagon.cpp",
110110
"Targets/Lanai.cpp",
111+
"Targets/Le64.cpp",
111112
"Targets/LoongArch.cpp",
112113
"Targets/M68k.cpp",
113114
"Targets/MSP430.cpp",

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