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//
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//===----------------------------------------------------------------------===//
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- // Mask immediates for MMA instructions (2, 4 and 8 bits).
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- def Msk2Imm : ImmLeaf<i32, [{ return isUInt<2>(Imm); }]>;
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- def Msk4Imm : ImmLeaf<i32, [{ return isUInt<4>(Imm); }]>;
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- def Msk8Imm : ImmLeaf<i32, [{ return isUInt<8>(Imm); }]>;
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-
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- def MMA : Predicate<"Subtarget->hasMMA()">;
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-
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class XX3Form_AT3_XABp5_P1<bits<6> opcode, bits<8> xo, dag OOL, dag IOL,
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string asmstr, list<dag> pattern>
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: I<opcode, OOL, IOL, asmstr, NoItinerary> {
@@ -132,7 +125,7 @@ class MMIRR_XX3Form_X8YP4_XAp5B6<bits<6> opcode, bits<8> xo, dag OOL, dag IOL,
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multiclass DMR_UM_XOEO<bits<6> opcode, bits<8> xo, dag IOL, string asmbase,
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string asmstr> {
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- let Predicates = [IsISAFuture] in {
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+ let Predicates = [MMA, IsISAFuture] in {
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def NAME :
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XX3Form_AT3_XAp5B6<opcode, !or(xo, 0x01), (outs dmr:$AT), IOL,
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!strconcat(asmbase#" ", asmstr), IIC_VecFP, []>,
@@ -147,7 +140,7 @@ multiclass DMR_UM_XOEO<bits<6> opcode, bits<8> xo, dag IOL, string asmbase,
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multiclass DMR_UM_M448_XOEO<bits<6> opcode, bits<8> xo, dag IOL, string asmbase,
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string asmstr> {
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defm NAME : DMR_UM_XOEO<opcode, xo, IOL, asmbase, asmstr>;
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- let Predicates = [IsISAFuture] in {
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+ let Predicates = [MMA, PrefixInstrs, IsISAFuture] in {
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def PM#NAME :
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MMIRR_XX3Form_X8YP4_XAp5B6<
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opcode, !or(xo, 0x01), (outs dmr:$AT),
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