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Commit d80031d

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Address issue.
1 parent e6612fe commit d80031d

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2 files changed

+12
-3
lines changed

2 files changed

+12
-3
lines changed

llvm/lib/Analysis/ValueTracking.cpp

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -278,7 +278,16 @@ static bool isKnownNonZero(const Value *V, const APInt &DemandedElts,
278278

279279
bool llvm::isKnownNonNegative(const Value *V, const SimplifyQuery &SQ,
280280
unsigned Depth) {
281-
return computeKnownBits(V, SQ, Depth).isNonNegative();
281+
if (computeKnownBits(V, SQ, Depth).isNonNegative())
282+
return true;
283+
284+
Value *X, *Y;
285+
if (match(V, m_NSWSub(m_Value(X), m_Value(Y))))
286+
if (std::optional<bool> result =
287+
isImpliedByDomCondition(ICmpInst::ICMP_SLE, Y, X, SQ.CxtI, SQ.DL))
288+
return *result;
289+
290+
return false;
282291
}
283292

284293
bool llvm::isKnownPositive(const Value *V, const SimplifyQuery &SQ,

llvm/test/Transforms/InstCombine/sub-after-sle-is-non-negative.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@ define void @test_as_arg(i8 %a, i8 %b) {
77
; CHECK-NEXT: br i1 [[CMP]], label %[[COND_END:.*]], label %[[COND_FALSE:.*]]
88
; CHECK: [[COND_FALSE]]:
99
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i8 [[B]], [[A]]
10-
; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[SUB]] to i16
10+
; CHECK-NEXT: [[CONV:%.*]] = zext nneg i8 [[SUB]] to i16
1111
; CHECK-NEXT: call void @subroutine(i16 [[CONV]])
1212
; CHECK-NEXT: br label %[[COND_END]]
1313
; CHECK: [[COND_END]]:
@@ -37,7 +37,7 @@ define i16 @test_as_retval(i8 %a, i8 %b) {
3737
; CHECK-NEXT: ret i16 0
3838
; CHECK: [[COND_FALSE]]:
3939
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i8 [[B]], [[A]]
40-
; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[SUB]] to i16
40+
; CHECK-NEXT: [[CONV:%.*]] = zext nneg i8 [[SUB]] to i16
4141
; CHECK-NEXT: ret i16 [[CONV]]
4242
;
4343
%cmp = icmp sgt i8 %a, %b

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