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AMDGPU: Add is.shared/is.private intrinsics to isBoolSGPR (#141804)
No change in the net output since these ultimately expand to setcc, but saves a step in the DAG.
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2 files changed

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2 files changed

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llvm/lib/Target/AMDGPU/SIISelLowering.cpp

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@@ -11915,6 +11915,18 @@ bool llvm::isBoolSGPR(SDValue V) {
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case ISD::SMULO:
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case ISD::UMULO:
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return V.getResNo() == 1;
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case ISD::INTRINSIC_WO_CHAIN: {
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unsigned IntrinsicID = V.getConstantOperandVal(0);
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switch (IntrinsicID) {
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case Intrinsic::amdgcn_is_shared:
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case Intrinsic::amdgcn_is_private:
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return true;
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default:
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return false;
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}
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return false;
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}
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}
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return false;
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}

llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll

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@@ -740,6 +740,54 @@ bb:
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ret void
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}
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define i32 @add_sext_bool_is_shared(ptr %ptr, i32 %y) {
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; GCN-LABEL: add_sext_bool_is_shared:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: s_mov_b64 s[4:5], 0xe8
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; GCN-NEXT: s_load_dword s4, s[4:5], 0x0
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s4, v1
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; GCN-NEXT: v_subbrev_u32_e32 v0, vcc, 0, v2, vcc
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; GCN-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX9-LABEL: add_sext_bool_is_shared:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: s_mov_b64 s[4:5], src_shared_base
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; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, s5, v1
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; GFX9-NEXT: v_subbrev_co_u32_e32 v0, vcc, 0, v2, vcc
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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%is.shared = call i1 @llvm.amdgcn.is.shared(ptr %ptr)
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%sext = sext i1 %is.shared to i32
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%add = add i32 %sext, %y
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ret i32 %add
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}
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define i32 @add_sext_bool_is_private(ptr %ptr, i32 %y) {
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; GCN-LABEL: add_sext_bool_is_private:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: s_mov_b64 s[4:5], 0xe4
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; GCN-NEXT: s_load_dword s4, s[4:5], 0x0
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s4, v1
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; GCN-NEXT: v_subbrev_u32_e32 v0, vcc, 0, v2, vcc
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; GCN-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX9-LABEL: add_sext_bool_is_private:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: s_mov_b64 s[4:5], src_private_base
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; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, s5, v1
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; GFX9-NEXT: v_subbrev_co_u32_e32 v0, vcc, 0, v2, vcc
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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%is.private = call i1 @llvm.amdgcn.is.private(ptr %ptr)
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%sext = sext i1 %is.private to i32
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%add = add i32 %sext, %y
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ret i32 %add
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}
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declare i1 @llvm.amdgcn.class.f32(float, i32) #0
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declare i32 @llvm.amdgcn.workitem.id.x() #0

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