|
740 | 740 | ret void
|
741 | 741 | }
|
742 | 742 |
|
| 743 | +define i32 @add_sext_bool_is_shared(ptr %ptr, i32 %y) { |
| 744 | +; GCN-LABEL: add_sext_bool_is_shared: |
| 745 | +; GCN: ; %bb.0: |
| 746 | +; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| 747 | +; GCN-NEXT: s_mov_b64 s[4:5], 0xe8 |
| 748 | +; GCN-NEXT: s_load_dword s4, s[4:5], 0x0 |
| 749 | +; GCN-NEXT: s_waitcnt lgkmcnt(0) |
| 750 | +; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s4, v1 |
| 751 | +; GCN-NEXT: v_subbrev_u32_e32 v0, vcc, 0, v2, vcc |
| 752 | +; GCN-NEXT: s_setpc_b64 s[30:31] |
| 753 | +; |
| 754 | +; GFX9-LABEL: add_sext_bool_is_shared: |
| 755 | +; GFX9: ; %bb.0: |
| 756 | +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| 757 | +; GFX9-NEXT: s_mov_b64 s[4:5], src_shared_base |
| 758 | +; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, s5, v1 |
| 759 | +; GFX9-NEXT: v_subbrev_co_u32_e32 v0, vcc, 0, v2, vcc |
| 760 | +; GFX9-NEXT: s_setpc_b64 s[30:31] |
| 761 | + %is.shared = call i1 @llvm.amdgcn.is.shared(ptr %ptr) |
| 762 | + %sext = sext i1 %is.shared to i32 |
| 763 | + %add = add i32 %sext, %y |
| 764 | + ret i32 %add |
| 765 | +} |
| 766 | + |
| 767 | +define i32 @add_sext_bool_is_private(ptr %ptr, i32 %y) { |
| 768 | +; GCN-LABEL: add_sext_bool_is_private: |
| 769 | +; GCN: ; %bb.0: |
| 770 | +; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| 771 | +; GCN-NEXT: s_mov_b64 s[4:5], 0xe4 |
| 772 | +; GCN-NEXT: s_load_dword s4, s[4:5], 0x0 |
| 773 | +; GCN-NEXT: s_waitcnt lgkmcnt(0) |
| 774 | +; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s4, v1 |
| 775 | +; GCN-NEXT: v_subbrev_u32_e32 v0, vcc, 0, v2, vcc |
| 776 | +; GCN-NEXT: s_setpc_b64 s[30:31] |
| 777 | +; |
| 778 | +; GFX9-LABEL: add_sext_bool_is_private: |
| 779 | +; GFX9: ; %bb.0: |
| 780 | +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| 781 | +; GFX9-NEXT: s_mov_b64 s[4:5], src_private_base |
| 782 | +; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, s5, v1 |
| 783 | +; GFX9-NEXT: v_subbrev_co_u32_e32 v0, vcc, 0, v2, vcc |
| 784 | +; GFX9-NEXT: s_setpc_b64 s[30:31] |
| 785 | + %is.private = call i1 @llvm.amdgcn.is.private(ptr %ptr) |
| 786 | + %sext = sext i1 %is.private to i32 |
| 787 | + %add = add i32 %sext, %y |
| 788 | + ret i32 %add |
| 789 | +} |
| 790 | + |
743 | 791 | declare i1 @llvm.amdgcn.class.f32(float, i32) #0
|
744 | 792 |
|
745 | 793 | declare i32 @llvm.amdgcn.workitem.id.x() #0
|
|
0 commit comments