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[LoongArch] Reuse GPRRegisterClass to shorten some code in LoongArchRegisterInfo.td. NFC
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llvm/lib/Target/LoongArch/LoongArchRegisterInfo.td

Lines changed: 17 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -97,32 +97,29 @@ def GRLenRI : RegInfoByHwMode<
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[LA32, LA64],
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[RegInfo<32,32,32>, RegInfo<64,64,64>]>;
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100-
// The order of registers represents the preferred allocation sequence.
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// Registers are listed in the order caller-save, callee-save, specials.
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def GPR : RegisterClass<"LoongArch", [GRLenVT], 32, (add
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// Argument registers (a0...a7)
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(sequence "R%u", 4, 11),
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// Temporary registers (t0...t8)
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(sequence "R%u", 12, 20),
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// Static register (s9/fp, s0...s8)
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(sequence "R%u", 22, 31),
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// Specials (r0, ra, tp, sp)
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(sequence "R%u", 0, 3),
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// Reserved (Non-allocatable)
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R21
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)> {
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class GPRRegisterClass<dag regList>
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: RegisterClass<"LoongArch", [GRLenVT], 32, regList> {
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let RegInfos = GRLenRI;
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}
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105+
// The order of registers represents the preferred allocation sequence.
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// Registers are listed in the order caller-save, callee-save, specials.
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def GPR : GPRRegisterClass<(add // Argument registers (a0...a7)
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(sequence "R%u", 4, 11),
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// Temporary registers (t0...t8)
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(sequence "R%u", 12, 20),
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// Static register (s9/fp, s0...s8)
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(sequence "R%u", 22, 31),
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// Specials (r0, ra, tp, sp)
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(sequence "R%u", 0, 3),
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// Reserved (Non-allocatable)
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R21)>;
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// GPR for indirect tail calls. We can't use callee-saved registers, as they are
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// restored to the saved value before the tail call, which would clobber a call
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// address.
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def GPRT : RegisterClass<"LoongArch", [GRLenVT], 32, (add
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// a0...a7, t0...t8
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(sequence "R%u", 4, 20)
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)> {
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let RegInfos = GRLenRI;
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}
121+
def GPRT : GPRRegisterClass<(add // a0...a7, t0...t8
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(sequence "R%u", 4, 20))>;
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// Floating point registers
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