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[MC][Mips] Add MipsWinCOFFObjectWriter/MipsWinCOFFStreamer (#114611)
llc is now able to create MIPS COFF files for simple cases.
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‎llvm/lib/Target/Mips/MCTargetDesc/CMakeLists.txt

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,8 @@ add_llvm_component_library(LLVMMipsDesc
1212
MipsNaClELFStreamer.cpp
1313
MipsOptionRecord.cpp
1414
MipsTargetStreamer.cpp
15+
MipsWinCOFFObjectWriter.cpp
16+
MipsWinCOFFStreamer.cpp
1517

1618
LINK_COMPONENTS
1719
CodeGenTypes

‎llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -593,10 +593,30 @@ bool MipsAsmBackend::isMicroMips(const MCSymbol *Sym) const {
593593
return false;
594594
}
595595

596+
namespace {
597+
598+
class WindowsMipsAsmBackend : public MipsAsmBackend {
599+
public:
600+
WindowsMipsAsmBackend(const Target &T, const MCRegisterInfo &MRI,
601+
const MCSubtargetInfo &STI)
602+
: MipsAsmBackend(T, MRI, STI.getTargetTriple(), STI.getCPU(), false) {}
603+
604+
std::unique_ptr<MCObjectTargetWriter>
605+
createObjectTargetWriter() const override {
606+
return createMipsWinCOFFObjectWriter();
607+
}
608+
};
609+
610+
} // end anonymous namespace
611+
596612
MCAsmBackend *llvm::createMipsAsmBackend(const Target &T,
597613
const MCSubtargetInfo &STI,
598614
const MCRegisterInfo &MRI,
599615
const MCTargetOptions &Options) {
616+
const Triple &TheTriple = STI.getTargetTriple();
617+
if (TheTriple.isOSWindows() && TheTriple.isOSBinFormatCOFF())
618+
return new WindowsMipsAsmBackend(T, MRI, STI);
619+
600620
MipsABIInfo ABI = MipsABIInfo::computeTargetABI(STI.getTargetTriple(),
601621
STI.getCPU(), Options);
602622
return new MipsAsmBackend(T, MRI, STI.getTargetTriple(), STI.getCPU(),

‎llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -51,3 +51,14 @@ MipsELFMCAsmInfo::MipsELFMCAsmInfo(const Triple &TheTriple,
5151
DwarfRegNumForCFI = true;
5252
HasMipsExpressions = true;
5353
}
54+
55+
void MipsCOFFMCAsmInfo::anchor() {}
56+
57+
MipsCOFFMCAsmInfo::MipsCOFFMCAsmInfo() {
58+
HasSingleParameterDotFile = true;
59+
WinEHEncodingType = WinEH::EncodingType::Itanium;
60+
61+
ExceptionsType = ExceptionHandling::WinEH;
62+
63+
AllowAtInName = true;
64+
}

‎llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@
1313
#ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCASMINFO_H
1414
#define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCASMINFO_H
1515

16+
#include "llvm/MC/MCAsmInfoCOFF.h"
1617
#include "llvm/MC/MCAsmInfoELF.h"
1718

1819
namespace llvm {
@@ -26,6 +27,13 @@ class MipsELFMCAsmInfo : public MCAsmInfoELF {
2627
const MCTargetOptions &Options);
2728
};
2829

30+
class MipsCOFFMCAsmInfo : public MCAsmInfoGNUCOFF {
31+
void anchor() override;
32+
33+
public:
34+
explicit MipsCOFFMCAsmInfo();
35+
};
36+
2937
} // namespace llvm
3038

3139
#endif

‎llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp

Lines changed: 17 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -44,6 +44,13 @@ using namespace llvm;
4444
#define GET_REGINFO_MC_DESC
4545
#include "MipsGenRegisterInfo.inc"
4646

47+
namespace {
48+
class MipsWinCOFFTargetStreamer : public MipsTargetStreamer {
49+
public:
50+
MipsWinCOFFTargetStreamer(MCStreamer &S) : MipsTargetStreamer(S) {}
51+
};
52+
} // end namespace
53+
4754
/// Select the Mips CPU for the given triple and cpu name.
4855
StringRef MIPS_MC::selectMipsCPU(const Triple &TT, StringRef CPU) {
4956
if (CPU.empty() || CPU == "generic") {
@@ -83,7 +90,12 @@ static MCSubtargetInfo *createMipsMCSubtargetInfo(const Triple &TT,
8390
static MCAsmInfo *createMipsMCAsmInfo(const MCRegisterInfo &MRI,
8491
const Triple &TT,
8592
const MCTargetOptions &Options) {
86-
MCAsmInfo *MAI = new MipsELFMCAsmInfo(TT, Options);
93+
MCAsmInfo *MAI;
94+
95+
if (TT.isOSWindows())
96+
MAI = new MipsCOFFMCAsmInfo();
97+
else
98+
MAI = new MipsELFMCAsmInfo(TT, Options);
8799

88100
unsigned SP = MRI.getDwarfRegNum(Mips::SP, true);
89101
MCCFIInstruction Inst = MCCFIInstruction::createDefCfaRegister(nullptr, SP);
@@ -126,6 +138,8 @@ static MCTargetStreamer *createMipsNullTargetStreamer(MCStreamer &S) {
126138

127139
static MCTargetStreamer *
128140
createMipsObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
141+
if (STI.getTargetTriple().isOSBinFormatCOFF())
142+
return new MipsWinCOFFTargetStreamer(S);
129143
return new MipsTargetELFStreamer(S, STI);
130144
}
131145

@@ -185,6 +199,8 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTargetMC() {
185199
TargetRegistry::RegisterNullTargetStreamer(*T,
186200
createMipsNullTargetStreamer);
187201

202+
TargetRegistry::RegisterCOFFStreamer(*T, createMipsWinCOFFStreamer);
203+
188204
// Register the MC subtarget info.
189205
TargetRegistry::RegisterMCSubtargetInfo(*T, createMipsMCSubtargetInfo);
190206

‎llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,9 @@ class MCCodeEmitter;
2323
class MCContext;
2424
class MCInstrInfo;
2525
class MCObjectTargetWriter;
26+
class MCObjectWriter;
2627
class MCRegisterInfo;
28+
class MCStreamer;
2729
class MCSubtargetInfo;
2830
class MCTargetOptions;
2931
class StringRef;
@@ -39,8 +41,20 @@ MCAsmBackend *createMipsAsmBackend(const Target &T, const MCSubtargetInfo &STI,
3941
const MCRegisterInfo &MRI,
4042
const MCTargetOptions &Options);
4143

44+
/// Construct an MIPS Windows COFF machine code streamer which will generate
45+
/// PE/COFF format object files.
46+
///
47+
/// Takes ownership of \p AB and \p CE.
48+
MCStreamer *createMipsWinCOFFStreamer(MCContext &C,
49+
std::unique_ptr<MCAsmBackend> &&AB,
50+
std::unique_ptr<MCObjectWriter> &&OW,
51+
std::unique_ptr<MCCodeEmitter> &&CE);
52+
53+
/// Construct a Mips ELF object writer.
4254
std::unique_ptr<MCObjectTargetWriter>
4355
createMipsELFObjectWriter(const Triple &TT, bool IsN32);
56+
/// Construct a Mips Win COFF object writer.
57+
std::unique_ptr<MCObjectTargetWriter> createMipsWinCOFFObjectWriter();
4458

4559
namespace MIPS_MC {
4660
StringRef selectMipsCPU(const Triple &TT, StringRef CPU);

‎llvm/lib/Target/Mips/MCTargetDesc/MipsWinCOFFObjectWriter.cpp

Lines changed: 57 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,57 @@
1+
//===- MipsWinCOFFObjectWriter.cpp------------------------------*- C++ -*-===//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===---------------------------------------------------------------------===//
8+
9+
#include "MCTargetDesc/MipsFixupKinds.h"
10+
#include "MCTargetDesc/MipsMCTargetDesc.h"
11+
#include "llvm/BinaryFormat/COFF.h"
12+
#include "llvm/MC/MCContext.h"
13+
#include "llvm/MC/MCWinCOFFObjectWriter.h"
14+
15+
using namespace llvm;
16+
17+
namespace {
18+
19+
class MipsWinCOFFObjectWriter : public MCWinCOFFObjectTargetWriter {
20+
public:
21+
MipsWinCOFFObjectWriter();
22+
23+
unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
24+
const MCFixup &Fixup, bool IsCrossSection,
25+
const MCAsmBackend &MAB) const override;
26+
};
27+
28+
} // end anonymous namespace
29+
30+
MipsWinCOFFObjectWriter::MipsWinCOFFObjectWriter()
31+
: MCWinCOFFObjectTargetWriter(COFF::IMAGE_FILE_MACHINE_R4000) {}
32+
33+
unsigned MipsWinCOFFObjectWriter::getRelocType(MCContext &Ctx,
34+
const MCValue &Target,
35+
const MCFixup &Fixup,
36+
bool IsCrossSection,
37+
const MCAsmBackend &MAB) const {
38+
unsigned FixupKind = Fixup.getKind();
39+
40+
switch (FixupKind) {
41+
case FK_Data_4:
42+
return COFF::IMAGE_REL_MIPS_REFWORD;
43+
case Mips::fixup_Mips_26:
44+
return COFF::IMAGE_REL_MIPS_JMPADDR;
45+
case Mips::fixup_Mips_HI16:
46+
return COFF::IMAGE_REL_MIPS_REFHI;
47+
case Mips::fixup_Mips_LO16:
48+
return COFF::IMAGE_REL_MIPS_REFLO;
49+
default:
50+
Ctx.reportError(Fixup.getLoc(), "unsupported relocation type");
51+
return COFF::IMAGE_REL_MIPS_REFWORD;
52+
}
53+
}
54+
55+
std::unique_ptr<MCObjectTargetWriter> llvm::createMipsWinCOFFObjectWriter() {
56+
return std::make_unique<MipsWinCOFFObjectWriter>();
57+
}

‎llvm/lib/Target/Mips/MCTargetDesc/MipsWinCOFFStreamer.cpp

Lines changed: 33 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,33 @@
1+
//===- MipsWinCOFFStreamer.cpp-----------------------------------*- C++ -*-===//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===---------------------------------------------------------------------===//
8+
9+
#include "MipsMCTargetDesc.h"
10+
#include "llvm/MC/MCAsmBackend.h"
11+
#include "llvm/MC/MCAssembler.h"
12+
#include "llvm/MC/MCCodeEmitter.h"
13+
#include "llvm/MC/MCObjectWriter.h"
14+
#include "llvm/MC/MCWinCOFFStreamer.h"
15+
16+
using namespace llvm;
17+
18+
namespace {
19+
class MipsWinCOFFStreamer : public MCWinCOFFStreamer {
20+
public:
21+
MipsWinCOFFStreamer(MCContext &C, std::unique_ptr<MCAsmBackend> AB,
22+
std::unique_ptr<MCCodeEmitter> CE,
23+
std::unique_ptr<MCObjectWriter> OW)
24+
: MCWinCOFFStreamer(C, std::move(AB), std::move(CE), std::move(OW)) {}
25+
};
26+
} // namespace
27+
28+
MCStreamer *llvm::createMipsWinCOFFStreamer(
29+
MCContext &C, std::unique_ptr<MCAsmBackend> &&AB,
30+
std::unique_ptr<MCObjectWriter> &&OW, std::unique_ptr<MCCodeEmitter> &&CE) {
31+
return new MipsWinCOFFStreamer(C, std::move(AB), std::move(CE),
32+
std::move(OW));
33+
}

‎llvm/lib/Target/Mips/MipsTargetMachine.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -70,6 +70,8 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTarget() {
7070
}
7171

7272
static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) {
73+
if (TT.isOSBinFormatCOFF())
74+
return std::make_unique<TargetLoweringObjectFileCOFF>();
7375
return std::make_unique<MipsTargetObjectFile>();
7476
}
7577

‎llvm/test/CodeGen/Mips/Fast-ISel/br1.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
; RUN: llc -mtriple=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
1+
; RUN: llc -mtriple=mipsel-elf -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
22
; RUN: < %s | FileCheck %s
3-
; RUN: llc -mtriple=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \
3+
; RUN: llc -mtriple=mipsel-elf -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \
44
; RUN: < %s | FileCheck %s
55

66
@b = global i32 1, align 4

‎llvm/test/CodeGen/Mips/Fast-ISel/icmpbr1.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc -mtriple=mipsel -relocation-model=pic -O0 -fast-isel=true -mcpu=mips32r2 \
2+
; RUN: llc -mtriple=mipsel-elf -relocation-model=pic -O0 -fast-isel=true -mcpu=mips32r2 \
33
; RUN: < %s -verify-machineinstrs | FileCheck %s
44

55

‎llvm/test/CodeGen/Mips/addressing-mode.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; RUN: llc -mtriple=mipsel < %s | FileCheck %s
1+
; RUN: llc -mtriple=mipsel-elf < %s | FileCheck %s
22

33
@g0 = common global i32 0, align 4
44
@g1 = common global i32 0, align 4

‎llvm/test/CodeGen/Mips/atomic-min-max-64.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc -mtriple=mips64 -O0 -mcpu=mips64r2 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPS
3-
; RUN: llc -mtriple=mips64el -O0 -mcpu=mips64r2 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPS
4-
; RUN: llc -mtriple=mips64 -O0 -mcpu=mips64r6 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPSR6
5-
; RUN: llc -mtriple=mips64el -O0 -mcpu=mips64r6 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPSR6
2+
; RUN: llc -mtriple=mips64-elf -O0 -mcpu=mips64r2 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPS
3+
; RUN: llc -mtriple=mips64el-elf -O0 -mcpu=mips64r2 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPS
4+
; RUN: llc -mtriple=mips64-elf -O0 -mcpu=mips64r6 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPSR6
5+
; RUN: llc -mtriple=mips64el-elf -O0 -mcpu=mips64r6 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPSR6
66

77
define i64 @test_max(ptr nocapture %ptr, i64 signext %val) {
88
; MIPS-LABEL: test_max:

‎llvm/test/CodeGen/Mips/atomic-min-max.ll

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1,17 +1,17 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc -mtriple=mips -O0 -mcpu=mips32r2 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPS
3-
; RUN: llc -mtriple=mips -O0 -mcpu=mips32r6 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPSR6
4-
; RUN: llc -mtriple=mips -O0 -mcpu=mips32r2 -mattr=+micromips -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MM
5-
; RUN: llc -mtriple=mips -O0 -mcpu=mips32r6 -mattr=+micromips -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MMR6
6-
; RUN: llc -mtriple=mipsel -O0 -mcpu=mips32 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPS32
7-
; RUN: llc -mtriple=mipsel -O0 -mcpu=mips32r2 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPSEL
8-
; RUN: llc -mtriple=mipsel -O0 -mcpu=mips32r6 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPSELR6
9-
; RUN: llc -mtriple=mipsel -O0 -mcpu=mips32r2 -mattr=+micromips -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MMEL
10-
; RUN: llc -mtriple=mipsel -O0 -mcpu=mips32r6 -mattr=+micromips -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MMELR6
11-
; RUN: llc -mtriple=mips64 -O0 -mcpu=mips64r2 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPS64
12-
; RUN: llc -mtriple=mips64 -O0 -mcpu=mips64r6 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPS64R6
13-
; RUN: llc -mtriple=mips64el -O0 -mcpu=mips64r2 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPS64EL
14-
; RUN: llc -mtriple=mips64el -O0 -mcpu=mips64r6 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPS64ELR6
2+
; RUN: llc -mtriple=mips-elf -O0 -mcpu=mips32r2 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPS
3+
; RUN: llc -mtriple=mips-elf -O0 -mcpu=mips32r6 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPSR6
4+
; RUN: llc -mtriple=mips-elf -O0 -mcpu=mips32r2 -mattr=+micromips -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MM
5+
; RUN: llc -mtriple=mips-elf -O0 -mcpu=mips32r6 -mattr=+micromips -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MMR6
6+
; RUN: llc -mtriple=mipsel-elf -O0 -mcpu=mips32 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPS32
7+
; RUN: llc -mtriple=mipsel-elf -O0 -mcpu=mips32r2 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPSEL
8+
; RUN: llc -mtriple=mipsel-elf -O0 -mcpu=mips32r6 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPSELR6
9+
; RUN: llc -mtriple=mipsel-elf -O0 -mcpu=mips32r2 -mattr=+micromips -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MMEL
10+
; RUN: llc -mtriple=mipsel-elf -O0 -mcpu=mips32r6 -mattr=+micromips -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MMELR6
11+
; RUN: llc -mtriple=mips64-elf -O0 -mcpu=mips64r2 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPS64
12+
; RUN: llc -mtriple=mips64-elf -O0 -mcpu=mips64r6 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPS64R6
13+
; RUN: llc -mtriple=mips64el-elf -O0 -mcpu=mips64r2 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPS64EL
14+
; RUN: llc -mtriple=mips64el-elf -O0 -mcpu=mips64r6 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPS64ELR6
1515

1616
define i32 @test_max_32(ptr nocapture %ptr, i32 signext %val) {
1717
; MIPS-LABEL: test_max_32:

‎llvm/test/CodeGen/Mips/brconeq.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; RUN: llc -mtriple=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
1+
; RUN: llc -mtriple=mipsel-elf -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
22

33
@i = global i32 5, align 4
44
@j = global i32 10, align 4

‎llvm/test/CodeGen/Mips/brconeqk.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; RUN: llc -mtriple=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
1+
; RUN: llc -mtriple=mipsel-elf -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
22

33
@i = global i32 5, align 4
44
@result = global i32 0, align 4

‎llvm/test/CodeGen/Mips/brconeqz.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; RUN: llc -mtriple=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
1+
; RUN: llc -mtriple=mipsel-elf -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
22

33
@i = global i32 5, align 4
44
@result = global i32 0, align 4

‎llvm/test/CodeGen/Mips/brconge.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; RUN: llc -mtriple=mipsel -mattr=mips16 -relocation-model=pic -O2 < %s | FileCheck %s -check-prefix=16
1+
; RUN: llc -mtriple=mipsel-elf -mattr=mips16 -relocation-model=pic -O2 < %s | FileCheck %s -check-prefix=16
22

33
@i = global i32 5, align 4
44
@j = global i32 10, align 4

‎llvm/test/CodeGen/Mips/brcongt.ll

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; RUN: llc -mtriple=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
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; RUN: llc -mtriple=mipsel-elf -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
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@i = global i32 5, align 4
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@j = global i32 10, align 4

‎llvm/test/CodeGen/Mips/brconle.ll

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; RUN: llc -mtriple=mipsel -mattr=mips16 -relocation-model=pic -O2 < %s | FileCheck %s -check-prefix=16
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; RUN: llc -mtriple=mipsel-elf -mattr=mips16 -relocation-model=pic -O2 < %s | FileCheck %s -check-prefix=16
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@i = global i32 -5, align 4
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@j = global i32 10, align 4

‎llvm/test/CodeGen/Mips/brconlt.ll

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; RUN: llc -mtriple=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
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; RUN: llc -mtriple=mips -mattr=micromips -mcpu=mips32r6 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=MM32R6
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; RUN: llc -mtriple=mipsel-elf -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
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; RUN: llc -mtriple=mips-elf -mattr=micromips -mcpu=mips32r6 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=MM32R6
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@i = global i32 5, align 4
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@j = global i32 10, align 4

‎llvm/test/CodeGen/Mips/brconne.ll

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; RUN: llc -mtriple=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
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; RUN: llc -mtriple=mipsel-elf -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
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@i = global i32 5, align 4
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@j = global i32 5, align 4

‎llvm/test/CodeGen/Mips/brconnek.ll

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; RUN: llc -mtriple=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
1+
; RUN: llc -mtriple=mipsel-elf -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
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@j = global i32 5, align 4
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@result = global i32 0, align 4

‎llvm/test/CodeGen/Mips/brconnez.ll

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; RUN: llc -mtriple=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
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; RUN: llc -mtriple=mipsel-elf -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
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@j = global i32 0, align 4
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@result = global i32 0, align 4

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