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skatrakskatrak
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Use LLVM::TargetFeaturesAttr to represent target features also in func.func
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8 files changed

+42
-50
lines changed

8 files changed

+42
-50
lines changed

‎flang/lib/Lower/Bridge.cpp

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -54,6 +54,7 @@
5454
#include "flang/Semantics/symbol.h"
5555
#include "flang/Semantics/tools.h"
5656
#include "mlir/Dialect/ControlFlow/IR/ControlFlowOps.h"
57+
#include "mlir/Dialect/LLVMIR/LLVMAttrs.h"
5758
#include "mlir/IR/PatternMatch.h"
5859
#include "mlir/Parser/Parser.h"
5960
#include "mlir/Transforms/RegionUtils.h"
@@ -4332,10 +4333,11 @@ class FirConverter : public Fortran::lower::AbstractConverter {
43324333
if (auto targetCPU = targetMachine.getTargetCPU(); !targetCPU.empty())
43334334
func->setAttr("target_cpu",
43344335
mlir::StringAttr::get(func.getContext(), targetCPU));
4336+
43354337
if (auto targetFeatures = targetMachine.getTargetFeatureString();
43364338
!targetFeatures.empty())
4337-
func->setAttr("llvm.target_features",
4338-
mlir::StringAttr::get(func.getContext(), targetFeatures));
4339+
func->setAttr("target_features", mlir::LLVM::TargetFeaturesAttr::get(
4340+
func.getContext(), targetFeatures));
43394341

43404342
// Manage floating point exception, halting mode, and rounding mode
43414343
// settings at function entry and exit.

‎flang/test/Lower/OpenMP/FIR/target_cpu_features.f90

Lines changed: 13 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1,22 +1,26 @@
11
!REQUIRES: amdgpu-registered-target, nvptx-registered-target
2-
!RUN: %flang_fc1 -emit-fir -triple amdgcn-amd-amdhsa -target-cpu gfx908 -fopenmp -fopenmp-is-target-device %s -o - | FileCheck %s
2+
!RUN: %flang_fc1 -emit-fir -triple amdgcn-amd-amdhsa -target-cpu gfx908 -fopenmp -fopenmp-is-target-device %s -o - | FileCheck --check-prefix=AMDGCN %s
33
!RUN: %flang_fc1 -emit-hlfir -triple nvptx64-nvidia-cuda -target-cpu sm_80 -fopenmp -fopenmp-is-target-device %s -o - | FileCheck --check-prefix=NVPTX %s
44

55

66
!===============================================================================
77
! Target_Enter Simple
88
!===============================================================================
99

10-
!CHECK: omp.target = #omp.target<target_cpu = "gfx908",
11-
!CHECK-SAME: target_features = "+16-bit-insts,+ci-insts,+dl-insts,+dot1-insts,+dot10-insts,
12-
!CHECK-SAME: +dot2-insts,+dot3-insts,+dot4-insts,+dot5-insts,+dot6-insts,+dot7-insts,+dpp,
13-
!CHECK-SAME: +gfx8-insts,+gfx9-insts,+gws,+image-insts,+mai-insts,+s-memrealtime,+s-memtime-inst,
14-
!CHECK-SAME: +wavefrontsize64">
15-
!NVPTX: omp.target = #omp.target<target_cpu = "sm_80", target_features = "+ptx61,+sm_80">
16-
!CHECK-LABEL: func.func @_QPomp_target_simple()
10+
!AMDGCN-LABEL: func.func @_QPomp_target_simple() attributes {
11+
!AMDGCN-SAME: target_cpu = "gfx908"
12+
!AMDGCN-SAME: target_features = #llvm.target_features<["+16-bit-insts", "+ci-insts",
13+
!AMDGCN-SAME: "+dl-insts", "+dot1-insts", "+dot10-insts", "+dot2-insts", "+dot3-insts",
14+
!AMDGCN-SAME: "+dot4-insts", "+dot5-insts", "+dot6-insts", "+dot7-insts", "+dpp",
15+
!AMDGCN-SAME: "+gfx8-insts", "+gfx9-insts", "+gws", "+image-insts", "+mai-insts",
16+
!AMDGCN-SAME: "+s-memrealtime", "+s-memtime-inst", "+wavefrontsize64"]>
17+
18+
!NVPTX-LABEL: func.func @_QPomp_target_simple() attributes {
19+
!NVPTX-SAME: target_cpu = "sm_80"
20+
!NVPTX-SAME: target_features = #llvm.target_features<["+ptx61", "+sm_80"]>
21+
1722
subroutine omp_target_simple
1823
! Directive needed to prevent subroutine from being filtered out when
1924
! compiling for the device.
2025
!$omp declare target
2126
end subroutine omp_target_simple
22-

‎flang/test/Lower/OpenMP/target_cpu_features.f90

Lines changed: 13 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1,21 +1,25 @@
11
!REQUIRES: amdgpu-registered-target, nvptx-registered-target
2-
!RUN: %flang_fc1 -emit-hlfir -triple amdgcn-amd-amdhsa -target-cpu gfx908 -fopenmp -fopenmp-is-target-device %s -o - | FileCheck %s
2+
!RUN: %flang_fc1 -emit-hlfir -triple amdgcn-amd-amdhsa -target-cpu gfx908 -fopenmp -fopenmp-is-target-device %s -o - | FileCheck --check-prefix=AMDGCN %s
33
!RUN: %flang_fc1 -emit-hlfir -triple nvptx64-nvidia-cuda -target-cpu sm_80 -fopenmp -fopenmp-is-target-device %s -o - | FileCheck --check-prefix=NVPTX %s
44

55
!===============================================================================
66
! Target_Enter Simple
77
!===============================================================================
88

9-
!CHECK: omp.target = #omp.target<target_cpu = "gfx908",
10-
!CHECK-SAME: target_features = "+16-bit-insts,+ci-insts,+dl-insts,+dot1-insts,+dot10-insts,
11-
!CHECK-SAME: +dot2-insts,+dot3-insts,+dot4-insts,+dot5-insts,+dot6-insts,+dot7-insts,+dpp,
12-
!CHECK-SAME: +gfx8-insts,+gfx9-insts,+gws,+image-insts,+mai-insts,+s-memrealtime,+s-memtime-inst,
13-
!CHECK-SAME: +wavefrontsize64">
14-
!NVPTX: omp.target = #omp.target<target_cpu = "sm_80", target_features = "+ptx61,+sm_80">
15-
!CHECK-LABEL: func.func @_QPomp_target_simple()
9+
!AMDGCN-LABEL: func.func @_QPomp_target_simple() attributes {
10+
!AMDGCN-SAME: target_cpu = "gfx908"
11+
!AMDGCN-SAME: target_features = #llvm.target_features<["+16-bit-insts", "+ci-insts",
12+
!AMDGCN-SAME: "+dl-insts", "+dot1-insts", "+dot10-insts", "+dot2-insts", "+dot3-insts",
13+
!AMDGCN-SAME: "+dot4-insts", "+dot5-insts", "+dot6-insts", "+dot7-insts", "+dpp",
14+
!AMDGCN-SAME: "+gfx8-insts", "+gfx9-insts", "+gws", "+image-insts", "+mai-insts",
15+
!AMDGCN-SAME: "+s-memrealtime", "+s-memtime-inst", "+wavefrontsize64"]>
16+
17+
!NVPTX-LABEL: func.func @_QPomp_target_simple() attributes {
18+
!NVPTX-SAME: target_cpu = "sm_80"
19+
!NVPTX-SAME: target_features = #llvm.target_features<["+ptx61", "+sm_80"]>
20+
1621
subroutine omp_target_simple
1722
! Directive needed to prevent subroutine from being filtered out when
1823
! compiling for the device.
1924
!$omp declare target
2025
end subroutine omp_target_simple
21-

‎flang/test/Lower/target-features.f90

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -5,16 +5,18 @@
55

66
! ALL-LABEL: func.func @_QPfoo()
77

8-
! NONE-NOT: llvm.target_features
98
! NONE-NOT: target_cpu
9+
! NONE-NOT: target_features
1010

11-
! TRIPLE-NOT: llvm.target_features
1211
! TRIPLE-SAME: target_cpu = "generic-hsa"
12+
! TRIPLE-NOT: target_features
1313

14-
! CPU-NOT: llvm.target_features
1514
! CPU-SAME: target_cpu = "gfx90a"
15+
! CPU-NOT: target_features
1616

17-
! BOTH-SAME: llvm.target_features = "{{[^"]*}}+gfx90a-insts{{[^"]*}}"
1817
! BOTH-SAME: target_cpu = "gfx90a"
18+
! BOTH-SAME: target_features = #llvm.target_features<[
19+
! BOTH-SAME: "+gfx90a-insts"
20+
! BOTH-SAME: ]>
1921
subroutine foo
2022
end subroutine

‎mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp

Lines changed: 0 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -64,7 +64,6 @@ using namespace mlir;
6464
static constexpr StringRef varargsAttrName = "func.varargs";
6565
static constexpr StringRef linkageAttrName = "llvm.linkage";
6666
static constexpr StringRef barePtrAttrName = "llvm.bareptr";
67-
static constexpr StringRef targetFeaturesAttrName = "llvm.target_features";
6867

6968
/// Return `true` if the `op` should use bare pointer calling convention.
7069
static bool shouldUseBarePtrCallConv(Operation *op,
@@ -80,7 +79,6 @@ static void filterFuncAttributes(FunctionOpInterface func,
8079
for (const NamedAttribute &attr : func->getDiscardableAttrs()) {
8180
if (attr.getName() == linkageAttrName ||
8281
attr.getName() == varargsAttrName ||
83-
attr.getName() == targetFeaturesAttrName ||
8482
attr.getName() == LLVM::LLVMDialect::getReadnoneAttrName())
8583
continue;
8684
result.push_back(attr);
@@ -381,19 +379,6 @@ mlir::convertFuncOpToLLVMFuncOp(FunctionOpInterface funcOp,
381379
newFuncOp.setMemoryAttr(memoryAttr);
382380
}
383381

384-
// Create target_features attribute.
385-
if (funcOp->hasAttr(targetFeaturesAttrName)) {
386-
auto attr = funcOp->getAttrOfType<StringAttr>(targetFeaturesAttrName);
387-
if (!attr) {
388-
funcOp->emitError() << "Contains " << targetFeaturesAttrName
389-
<< " attribute not of type StringAttr";
390-
return rewriter.notifyMatchFailure(
391-
funcOp, "Contains target features attribute not of type StringAttr");
392-
}
393-
newFuncOp.setTargetFeaturesAttr(
394-
LLVM::TargetFeaturesAttr::get(rewriter.getContext(), attr.strref()));
395-
}
396-
397382
// Propagate argument/result attributes to all converted arguments/result
398383
// obtained after converting a given original argument/result.
399384
if (ArrayAttr resAttrDicts = funcOp.getAllResultAttrs()) {

‎mlir/test/Conversion/FuncToLLVM/convert-funcs.mlir

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -63,7 +63,7 @@ func.func @variadic_func(%arg0: i32) attributes { "func.varargs" = true } {
6363

6464
// CHECK-LABEL: llvm.func @target_features()
6565
// CHECK-SAME: target_features = #llvm.target_features<["+sme", "+sve"]>
66-
func.func private @target_features() attributes { "llvm.target_features" = "+sme,+sve" }
66+
func.func private @target_features() attributes { "target_features" = #llvm.target_features<["+sme", "+sve"]> }
6767

6868
// CHECK-LABEL: llvm.func @target_cpu()
6969
// CHECK-SAME: target_cpu = "gfx90a"
@@ -94,8 +94,3 @@ func.func private @badllvmlinkage(i32) attributes { "llvm.linkage" = 3 : i64 } /
9494
func.func @variadic_func(%arg0: i32) attributes { "func.varargs" = true, "llvm.emit_c_interface" } {
9595
return
9696
}
97-
98-
// -----
99-
100-
// expected-error@+1{{Contains llvm.target_features attribute not of type StringAttr}}
101-
func.func private @badllvmtargetfeatures() attributes { "llvm.target_features" = 1 : i64 }

‎mlir/test/Target/LLVMIR/omptarget-target-features.mlir

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -15,9 +15,9 @@ module attributes {omp.is_target_device = false} {
1515
}
1616
}
1717

18-
// CHECK: define void @omp_target_region() #[[ATTRS1:.*]] {
19-
// CHECK: define internal void @__omp_offloading_{{.*}}_omp_target_region_{{.*}}() #[[ATTRS1]] {
18+
// CHECK: define void @omp_target_region() #[[ATTRS:.*]] {
19+
// CHECK: define internal void @__omp_offloading_{{.*}}_omp_target_region_{{.*}}() #[[ATTRS]] {
2020

21-
// CHECK: attributes #[[ATTRS1]] = {
21+
// CHECK: attributes #[[ATTRS]] = {
2222
// CHECK-SAME: "target-cpu"="x86-64"
2323
// CHECK-SAME: "target-features"="+mmx,+sse"

‎mlir/test/Target/LLVMIR/target-cpu.mlir

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
22

3-
// CHECK-LABEL: define void @target_cpu
4-
// CHECK: attributes #{{.*}} = { "target-cpu"="gfx90a" }
3+
// CHECK: define void @target_cpu() #[[ATTRS:.*]] {
4+
// CHECK: attributes #[[ATTRS]] = { "target-cpu"="gfx90a" }
55
llvm.func @target_cpu() attributes {target_cpu = "gfx90a"} {
66
llvm.return
77
}

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