@@ -200,6 +200,19 @@ defm V_DIV_FMAS_F64 : VOP3Inst_Pseudo_Wrapper <"v_div_fmas_f64", VOP_F64_F64_F6
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} // End isCommutable = 1
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+ let True16Predicate = UseFakeTrue16Insts in
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+ multiclass int_amdgcn_alignbyte_fake16<string inst_name> {
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+ defvar inst = !cast<VOP_Pseudo>(inst_name#"_fake16_e64");
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+ def : GCNPat <
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+ (i32 (int_amdgcn_alignbyte (i32 (VOP3OpSelMods i32:$src0, i32:$src0_modifiers)),
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+ (i32 (VOP3OpSelMods i32:$src1, i32:$src1_modifiers)),
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+ (i32 (VOP3OpSelMods i32:$src2, i32:$src2_modifiers)))),
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+ (inst i32:$src0_mods, VSrc_b32:$src0,
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+ i32:$src1_mods, VSrc_b32:$src1,
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+ 0, VGPR_32:$src2)
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+ >;
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+ }
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+
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let isReMaterializable = 1 in {
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let mayRaiseFPException = 0 in {
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defm V_CUBEID_F32 : VOP3Inst <"v_cubeid_f32", VOP3_Profile<VOP_F32_F32_F32_F32>, int_amdgcn_cubeid>;
@@ -212,11 +225,14 @@ defm V_BFE_U32 : VOP3Inst <"v_bfe_u32", VOP3_Profile<VOP_I32_I32_I32_I32>, AMDGP
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defm V_BFE_I32 : VOP3Inst <"v_bfe_i32", VOP3_Profile<VOP_I32_I32_I32_I32>, AMDGPUbfe_i32>;
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defm V_BFI_B32 : VOP3Inst <"v_bfi_b32", VOP3_Profile<VOP_I32_I32_I32_I32>, AMDGPUbfi>;
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defm V_ALIGNBIT_B32 : VOP3Inst <"v_alignbit_b32", VOP3_Profile<VOP_I32_I32_I32_I32>, fshr>;
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- defm V_ALIGNBYTE_B32 : VOP3Inst_t16_with_profiles <"v_alignbyte_b32",
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- VOP3_Profile<VOP_I32_I32_I32_I32>,
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- VOP3_Profile_True16<VOP_I32_I32_I32_I16, VOP3_OPSEL>,
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- VOP3_Profile_Fake16<VOP_I32_I32_I32_I16, VOP3_OPSEL>,
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- int_amdgcn_alignbyte>;
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+
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+ let True16Predicate = NotHasTrue16BitInsts in
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+ defm V_ALIGNBYTE_B32 : VOP3Inst <"v_alignbyte_b32", VOP3_Profile<VOP_I32_I32_I32_I32>, int_amdgcn_alignbyte>;
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+ let True16Predicate = UseRealTrue16Insts in
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+ defm V_ALIGNBYTE_B32_t16 : VOP3Inst <"v_alignbyte_b32_t16", VOP3_Profile_True16<VOP_I32_I32_I32_I16, VOP3_OPSEL>>;
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+ let True16Predicate = UseFakeTrue16Insts in {
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+ defm V_ALIGNBYTE_B32_fake16 : VOP3Inst <"v_alignbyte_b32_fake16", VOP3_Profile_Fake16<VOP_I32_I32_I32_I16, VOP3_OPSEL>>;
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+ }
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// XXX - No FPException seems suspect but manual doesn't say it does
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let mayRaiseFPException = 0 in {
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