@@ -909,33 +909,23 @@ InstructionCost RISCVTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst,
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if (!IsTypeLegal)
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return BaseT::getCastInstrCost (Opcode, Dst, Src, CCH, CostKind, I);
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- std::pair<InstructionCost, MVT> DstLT = getTypeLegalizationCost (Dst);
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-
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int ISD = TLI->InstructionOpcodeToISD (Opcode);
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assert (ISD && " Invalid opcode" );
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+ // FIXME: Need to consider vsetvli and lmul.
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int PowDiff = (int )Log2_32 (Dst->getScalarSizeInBits ()) -
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(int )Log2_32 (Src->getScalarSizeInBits ());
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switch (ISD) {
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case ISD::SIGN_EXTEND:
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- case ISD::ZERO_EXTEND: {
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- const unsigned SrcEltSize = Src->getScalarSizeInBits ();
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- if (SrcEltSize == 1 ) {
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+ case ISD::ZERO_EXTEND:
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+ if (Src->getScalarSizeInBits () == 1 ) {
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// We do not use vsext/vzext to extend from mask vector.
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// Instead we use the following instructions to extend from mask vector:
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// vmv.v.i v8, 0
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// vmerge.vim v8, v8, -1, v0
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- return getRISCVInstructionCost ({RISCV::VMV_V_I, RISCV::VMERGE_VIM},
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- DstLT.second , CostKind);
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+ return 2 ;
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}
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- if (PowDiff > 3 )
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- return BaseT::getCastInstrCost (Opcode, Dst, Src, CCH, CostKind, I);
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- unsigned SExtOp[] = {RISCV::VSEXT_VF2, RISCV::VSEXT_VF4, RISCV::VSEXT_VF8};
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- unsigned ZExtOp[] = {RISCV::VZEXT_VF2, RISCV::VZEXT_VF4, RISCV::VZEXT_VF8};
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- unsigned Op =
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- (ISD == ISD::SIGN_EXTEND) ? SExtOp[PowDiff - 1 ] : ZExtOp[PowDiff - 1 ];
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- return getRISCVInstructionCost (Op, DstLT.second , CostKind);
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- }
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+ return 1 ;
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case ISD::TRUNCATE:
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if (Dst->getScalarSizeInBits () == 1 ) {
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// We do not use several vncvt to truncate to mask vector. So we could
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