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[LoongArch] Fix incorrect pattern [X]VBITSELI_B instructions
Adjusted the operand order of [X]VBITSELI_B to correctly match vselect.
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lines changed

4 files changed

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llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1600,8 +1600,8 @@ def : Pat<(f64 (vector_extract v4f64:$xj, uimm2:$imm)),
16001600
(MOVGR2FR_D (XVPICKVE2GR_D v4f64:$xj, uimm2:$imm))>;
16011601

16021602
// vselect
1603-
def : Pat<(v32i8 (vselect LASX256:$xj, LASX256:$xd,
1604-
(v32i8 (SplatPat_uimm8 uimm8:$imm)))),
1603+
def : Pat<(v32i8 (vselect LASX256:$xd, (v32i8 (SplatPat_uimm8 uimm8:$imm)),
1604+
LASX256:$xj)),
16051605
(XVBITSELI_B LASX256:$xd, LASX256:$xj, uimm8:$imm)>;
16061606
foreach vt = [v32i8, v16i16, v8i32, v4i64, v8f32, v4f64] in
16071607
def : Pat<(vt (vselect LASX256:$xa, LASX256:$xk, LASX256:$xj)),

llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1731,8 +1731,8 @@ def : Pat<(f64 (vector_extract v2f64:$vj, i64:$rk)),
17311731
(f64 (EXTRACT_SUBREG (VREPLVE_D v2f64:$vj, i64:$rk), sub_64))>;
17321732

17331733
// vselect
1734-
def : Pat<(v16i8 (vselect LSX128:$vj, LSX128:$vd,
1735-
(v16i8 (SplatPat_uimm8 uimm8:$imm)))),
1734+
def : Pat<(v16i8 (vselect LSX128:$vd, (v16i8 (SplatPat_uimm8 uimm8:$imm)),
1735+
LSX128:$vj)),
17361736
(VBITSELI_B LSX128:$vd, LSX128:$vj, uimm8:$imm)>;
17371737
foreach vt = [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64] in
17381738
def : Pat<(vt (vselect LSX128:$va, LSX128:$vk, LSX128:$vj)),

llvm/test/CodeGen/LoongArch/lasx/vselect.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -6,11 +6,11 @@ define void @select_v32i8_imm(ptr %res, ptr %a0) nounwind {
66
; CHECK: # %bb.0:
77
; CHECK-NEXT: xvld $xr0, $a1, 0
88
; CHECK-NEXT: xvrepli.h $xr1, -256
9-
; CHECK-NEXT: xvbitseli.b $xr0, $xr1, 1
10-
; CHECK-NEXT: xvst $xr0, $a0, 0
9+
; CHECK-NEXT: xvbitseli.b $xr1, $xr0, 1
10+
; CHECK-NEXT: xvst $xr1, $a0, 0
1111
; CHECK-NEXT: ret
1212
%v0 = load <32 x i8>, ptr %a0
13-
%sel = select <32 x i1> <i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true>, <32 x i8> %v0, <32 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
13+
%sel = select <32 x i1> <i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true>, <32 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>, <32 x i8> %v0
1414
store <32 x i8> %sel, ptr %res
1515
ret void
1616
}

llvm/test/CodeGen/LoongArch/lsx/vselect.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -6,11 +6,11 @@ define void @select_v16i8_imm(ptr %res, ptr %a0) nounwind {
66
; CHECK: # %bb.0:
77
; CHECK-NEXT: vld $vr0, $a1, 0
88
; CHECK-NEXT: vrepli.h $vr1, -256
9-
; CHECK-NEXT: vbitseli.b $vr0, $vr1, 255
10-
; CHECK-NEXT: vst $vr0, $a0, 0
9+
; CHECK-NEXT: vbitseli.b $vr1, $vr0, 255
10+
; CHECK-NEXT: vst $vr1, $a0, 0
1111
; CHECK-NEXT: ret
1212
%v0 = load <16 x i8>, ptr %a0
13-
%sel = select <16 x i1> <i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true>, <16 x i8> %v0, <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
13+
%sel = select <16 x i1> <i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true>, <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>, <16 x i8> %v0
1414
store <16 x i8> %sel, ptr %res
1515
ret void
1616
}

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