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[RISCV] Move DecoderNamespace in RISCVInstrInfoXCV.td to the Instruction defs. NFC (#130800)
This puts them in the same place as the Predicates. I'd like to have a single DecoderNamespace scope for all the instruction defs, but we need to reorder the classes and InstAliases away from the defs to do that.
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llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td

Lines changed: 14 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -10,8 +10,7 @@
1010
//
1111
//===----------------------------------------------------------------------===//
1212

13-
let DecoderNamespace = "XCV",
14-
hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
13+
let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
1514
class CVInstBitManipRII<bits<2> funct2, bits<3> funct3, dag outs, dag ins,
1615
string opcodestr, string argstr>
1716
: RVInstIBase<funct3, OPC_CUSTOM_2, outs, ins, opcodestr, argstr> {
@@ -37,9 +36,9 @@ let DecoderNamespace = "XCV",
3736
(ins GPR:$rs1), opcodestr, "$rd, $rs1"> {
3837
let rs2 = 0b00000;
3938
}
40-
} // DecoderNamespace = "XCV", hasSideEffects = 0, mayLoad = 0, mayStore = 0
39+
} // hasSideEffects = 0, mayLoad = 0, mayStore = 0
4140

42-
let Predicates = [HasVendorXCVbitmanip, IsRV32] in {
41+
let Predicates = [HasVendorXCVbitmanip, IsRV32], DecoderNamespace = "XCV" in {
4342
def CV_EXTRACT : CVBitManipRII<0b00, 0b000, "cv.extract">;
4443
def CV_EXTRACTU : CVBitManipRII<0b01, 0b000, "cv.extractu">;
4544

@@ -54,8 +53,7 @@ let Predicates = [HasVendorXCVbitmanip, IsRV32] in {
5453
def CV_INSERT : CVInstBitManipRII<0b10, 0b000, (outs GPR:$rd_wb),
5554
(ins GPR:$rd, GPR:$rs1, uimm5:$is3, uimm5:$is2),
5655
"cv.insert", "$rd, $rs1, $is3, $is2">;
57-
let DecoderNamespace = "XCV",
58-
hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
56+
let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
5957
def CV_INSERTR : RVInstR<0b0011010, 0b011, OPC_CUSTOM_1, (outs GPR:$rd_wb),
6058
(ins GPR:$rd, GPR:$rs1, GPR:$rs2),
6159
"cv.insertr", "$rd, $rs1, $rs2">;
@@ -79,7 +77,6 @@ class CVInstMac<bits<7> funct7, bits<3> funct3, string opcodestr>
7977
let hasSideEffects = 0;
8078
let mayLoad = 0;
8179
let mayStore = 0;
82-
let DecoderNamespace = "XCV";
8380
}
8481

8582
class CVInstMacMulN<bits<2> funct2, bits<3> funct3, dag outs, dag ins,
@@ -94,8 +91,6 @@ class CVInstMacMulN<bits<2> funct2, bits<3> funct3, dag outs, dag ins,
9491
let hasSideEffects = 0;
9592
let mayLoad = 0;
9693
let mayStore = 0;
97-
98-
let DecoderNamespace = "XCV";
9994
}
10095

10196
class CVInstMacN<bits<2> funct2, bits<3> funct3, string opcodestr>
@@ -108,7 +103,7 @@ class CVInstMulN<bits<2> funct2, bits<3> funct3, string opcodestr>
108103
: CVInstMacMulN<funct2, funct3, (outs GPR:$rd),
109104
(ins GPR:$rs1, GPR:$rs2, uimm5:$imm5), opcodestr>;
110105

111-
let Predicates = [HasVendorXCVmac, IsRV32] in {
106+
let Predicates = [HasVendorXCVmac, IsRV32], DecoderNamespace = "XCV" in {
112107
// 32x32 bit macs
113108
def CV_MAC : CVInstMac<0b1001000, 0b011, "cv.mac">,
114109
Sched<[]>;
@@ -154,7 +149,9 @@ let Predicates = [HasVendorXCVmac, IsRV32] in {
154149
Sched<[]>;
155150
def CV_MULHHURN : CVInstMulN<0b11, 0b101, "cv.mulhhurn">,
156151
Sched<[]>;
152+
} // Predicates = [HasVendorXCVmac, IsRV32], DecoderNamespace = "XCV"
157153

154+
let Predicates = [HasVendorXCVmac, IsRV32] in {
158155
// Xcvmac Pseudo Instructions
159156
// Signed 16x16 bit muls
160157
def : InstAlias<"cv.muls $rd1, $rs1, $rs2",
@@ -169,8 +166,7 @@ let Predicates = [HasVendorXCVmac, IsRV32] in {
169166
(CV_MULHHUN GPR:$rd1, GPR:$rs1, GPR:$rs2, 0)>;
170167
} // Predicates = [HasVendorXCVmac, IsRV32]
171168

172-
let DecoderNamespace = "XCV",
173-
hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
169+
let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
174170
class CVInstAluRRI<bits<2> funct2, bits<3> funct3, string opcodestr>
175171
: RVInstRBase<funct3, OPC_CUSTOM_2, (outs GPR:$rd),
176172
(ins GPR:$rs1, GPR:$rs2, uimm5:$imm5), opcodestr,
@@ -206,10 +202,9 @@ let DecoderNamespace = "XCV",
206202
opcodestr, "$rd, $rs1"> {
207203
let rs2 = 0b00000;
208204
}
205+
} // hasSideEffects = 0, mayLoad = 0, mayStore = 0
209206

210-
} // DecoderNamespace = "XCV"
211-
212-
let Predicates = [HasVendorXCValu, IsRV32] in {
207+
let Predicates = [HasVendorXCValu, IsRV32], DecoderNamespace = "XCV" in {
213208
// General ALU Operations
214209
def CV_ABS : CVInstAluR<0b0101000, 0b011, "cv.abs">,
215210
Sched<[]>;
@@ -291,7 +286,6 @@ class CVInstSIMDRR<bits<5> funct5, bit F, bit funct1, bits<3> funct3,
291286
let Inst{31-27} = funct5;
292287
let Inst{26} = F;
293288
let Inst{25} = funct1;
294-
let DecoderNamespace = "XCV";
295289
}
296290

297291
class CVInstSIMDRI<bits<5> funct5, bit F, bits<3> funct3, RISCVOpcode opcode,
@@ -303,7 +297,6 @@ class CVInstSIMDRI<bits<5> funct5, bit F, bits<3> funct3, RISCVOpcode opcode,
303297
let Inst{26} = F;
304298
let Inst{25} = imm6{0}; // funct1 unused
305299
let Inst{24-20} = imm6{5-1};
306-
let DecoderNamespace = "XCV";
307300
}
308301

309302
let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
@@ -392,7 +385,7 @@ multiclass CVSIMDBinaryUnsignedWb<bits<5> funct5, bit F, bit funct1, string mnem
392385
}
393386

394387

395-
let Predicates = [HasVendorXCVsimd, IsRV32] in {
388+
let Predicates = [HasVendorXCVsimd, IsRV32], DecoderNamespace = "XCV" in {
396389
defm ADD : CVSIMDBinarySigned<0b00000, 0, 0, "add">;
397390
defm SUB : CVSIMDBinarySigned<0b00001, 0, 0, "sub">;
398391
defm AVG : CVSIMDBinarySigned<0b00010, 0, 0, "avg">;
@@ -499,10 +492,9 @@ class CVInstImmBranch<bits<3> funct3, dag outs, dag ins,
499492
let hasSideEffects = 0;
500493
let mayLoad = 0;
501494
let mayStore = 0;
502-
let DecoderNamespace = "XCV";
503495
}
504496

505-
let Predicates = [HasVendorXCVbi, IsRV32] in {
497+
let Predicates = [HasVendorXCVbi, IsRV32], DecoderNamespace = "XCV" in {
506498
// Immediate branching operations
507499
def CV_BEQIMM : CVInstImmBranch<0b110, (outs),
508500
(ins GPR:$rs1, simm5:$imm5, simm13_lsb0:$imm12),
@@ -534,15 +526,13 @@ class CVLoad_ri_inc<bits<3> funct3, string opcodestr>
534526
(ins GPRMem:$rs1, simm12:$imm12),
535527
opcodestr, "$rd, (${rs1}), ${imm12}"> {
536528
let Constraints = "$rs1_wb = $rs1";
537-
let DecoderNamespace = "XCV";
538529
}
539530

540531
class CVLoad_rr_inc<bits<7> funct7, bits<3> funct3, string opcodestr>
541532
: RVInstR<funct7, funct3, OPC_CUSTOM_1, (outs GPR:$rd, GPR:$rs1_wb),
542533
(ins GPRMem:$rs1, GPR:$rs2),
543534
opcodestr, "$rd, (${rs1}), ${rs2}"> {
544535
let Constraints = "$rs1_wb = $rs1";
545-
let DecoderNamespace = "XCV";
546536
}
547537

548538
class CVLoad_rr<bits<7> funct7, bits<3> funct3, string opcodestr>
@@ -556,11 +546,10 @@ class CVLoad_rr<bits<7> funct7, bits<3> funct3, string opcodestr>
556546
let Inst{19-15} = cvrr{9-5};
557547
let Inst{14-12} = funct3;
558548
let Inst{11-7} = rd;
559-
let DecoderNamespace = "XCV";
560549
}
561550
} // hasSideEffects = 0, mayLoad = 1, mayStore = 0
562551

563-
let Predicates = [HasVendorXCVmem, IsRV32] in {
552+
let Predicates = [HasVendorXCVmem, IsRV32], DecoderNamespace = "XCV" in {
564553
// Register-Immediate load with post-increment
565554
def CV_LB_ri_inc : CVLoad_ri_inc<0b000, "cv.lb">;
566555
def CV_LBU_ri_inc : CVLoad_ri_inc<0b100, "cv.lbu">;
@@ -589,7 +578,6 @@ class CVStore_ri_inc<bits<3> funct3, string opcodestr>
589578
(ins GPR:$rs2, GPR:$rs1, simm12:$imm12),
590579
opcodestr, "$rs2, (${rs1}), ${imm12}"> {
591580
let Constraints = "$rs1_wb = $rs1";
592-
let DecoderNamespace = "XCV";
593581
}
594582

595583
class CVStore_rr_inc<bits<3> funct3, bits<7> funct7, string opcodestr>
@@ -606,7 +594,6 @@ class CVStore_rr_inc<bits<3> funct3, bits<7> funct7, string opcodestr>
606594
let Inst{11-7} = rs3;
607595
let Inst{6-0} = OPC_CUSTOM_1.Value;
608596
let Constraints = "$rs1_wb = $rs1";
609-
let DecoderNamespace = "XCV";
610597
}
611598

612599

@@ -622,11 +609,10 @@ class CVStore_rr<bits<3> funct3, bits<7> funct7, string opcodestr>
622609
let Inst{14-12} = funct3;
623610
let Inst{11-7} = cvrr{4-0};
624611
let Inst{6-0} = OPC_CUSTOM_1.Value;
625-
let DecoderNamespace = "XCV";
626612
}
627613
} // hasSideEffects = 0, mayLoad = 0, mayStore = 1
628614

629-
let Predicates = [HasVendorXCVmem, IsRV32] in {
615+
let Predicates = [HasVendorXCVmem, IsRV32], DecoderNamespace = "XCV" in {
630616
// Register-Immediate store with post-increment
631617
def CV_SB_ri_inc : CVStore_ri_inc<0b000, "cv.sb">;
632618
def CV_SH_ri_inc : CVStore_ri_inc<0b001, "cv.sh">;
@@ -643,7 +629,6 @@ let Predicates = [HasVendorXCVmem, IsRV32] in {
643629
def CV_SW_rr : CVStore_rr<0b011, 0b0010110, "cv.sw">;
644630
}
645631

646-
let DecoderNamespace = "XCV" in
647632
class CVLoad_ri<bits<3> funct3, string opcodestr>
648633
: RVInstI<funct3, OPC_CUSTOM_0, (outs GPR:$rd),
649634
(ins GPRMem:$rs1, simm12:$imm12), opcodestr, "$rd, ${imm12}(${rs1})">;

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