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‎llvm/test/CodeGen/AArch64/reduce-or-opt.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -mattr=+sve | FileCheck %s
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define i64 @select_or_reduce_v2i1(ptr nocapture noundef readonly %src) {
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; CHECK-LABEL: select_or_reduce_v2i1:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov x8, xzr
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; CHECK-NEXT: .LBB0_1: // %vector.body
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: ldr q0, [x0, x8]
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; CHECK-NEXT: cmeq v0.2d, v0.2d, #0
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; CHECK-NEXT: xtn v0.2s, v0.2d
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; CHECK-NEXT: umaxp v0.2s, v0.2s, v0.2s
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; CHECK-NEXT: fmov w9, s0
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; CHECK-NEXT: tbnz w9, #0, .LBB0_3
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; CHECK-NEXT: // %bb.2: // %vector.body
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; CHECK-NEXT: // in Loop: Header=BB0_1 Depth=1
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; CHECK-NEXT: cmp x8, #16
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; CHECK-NEXT: add x8, x8, #16
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; CHECK-NEXT: b.ne .LBB0_1
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; CHECK-NEXT: .LBB0_3: // %middle.split
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; CHECK-NEXT: and x0, x9, #0x1
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; CHECK-NEXT: ret
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entry:
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br label %vector.body
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vector.body:
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%index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]
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%arrayidx = getelementptr inbounds ptr, ptr %src, i64 %index
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%wide.load = load <2 x ptr>, ptr %arrayidx, align 8
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%cond = icmp eq <2 x ptr> %wide.load, splat(ptr zeroinitializer)
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%index.next = add nuw i64 %index, 2
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%or.reduc = tail call i1 @llvm.vector.reduce.or.v2i1(<2 x i1> %cond)
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%iv.cmp = icmp eq i64 %index.next, 4
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%exit.cond = or i1 %or.reduc, %iv.cmp
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br i1 %exit.cond, label %middle.split, label %vector.body
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middle.split:
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%sel = select i1 %or.reduc, i64 1, i64 0
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ret i64 %sel
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}
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define i64 @br_or_reduce_v2i1(ptr nocapture noundef readonly %src, ptr noundef readnone %p) {
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; CHECK-LABEL: br_or_reduce_v2i1:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov x8, xzr
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; CHECK-NEXT: .LBB1_1: // %vector.body
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: ldr q0, [x0, x8]
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; CHECK-NEXT: cmeq v0.2d, v0.2d, #0
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; CHECK-NEXT: xtn v0.2s, v0.2d
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; CHECK-NEXT: umaxp v0.2s, v0.2s, v0.2s
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; CHECK-NEXT: fmov w9, s0
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; CHECK-NEXT: tbnz w9, #0, .LBB1_3
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; CHECK-NEXT: // %bb.2: // %vector.body
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; CHECK-NEXT: // in Loop: Header=BB1_1 Depth=1
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; CHECK-NEXT: cmp x8, #16
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; CHECK-NEXT: add x8, x8, #16
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; CHECK-NEXT: b.ne .LBB1_1
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; CHECK-NEXT: .LBB1_3: // %middle.split
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; CHECK-NEXT: tbz w9, #0, .LBB1_5
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; CHECK-NEXT: // %bb.4: // %found
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; CHECK-NEXT: mov w8, #56 // =0x38
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; CHECK-NEXT: mov w0, #1 // =0x1
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; CHECK-NEXT: str x8, [x1]
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB1_5:
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; CHECK-NEXT: mov x0, xzr
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; CHECK-NEXT: ret
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entry:
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br label %vector.body
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vector.body:
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%index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]
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%arrayidx = getelementptr inbounds ptr, ptr %src, i64 %index
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%wide.load = load <2 x ptr>, ptr %arrayidx, align 8
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%cond = icmp eq <2 x ptr> %wide.load, splat(ptr zeroinitializer)
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%index.next = add nuw i64 %index, 2
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%or.reduc = tail call i1 @llvm.vector.reduce.or.v2i1(<2 x i1> %cond)
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%iv.cmp = icmp eq i64 %index.next, 4
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%exit.cond = or i1 %or.reduc, %iv.cmp
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br i1 %exit.cond, label %middle.split, label %vector.body
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middle.split:
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br i1 %or.reduc, label %found, label %notfound
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found:
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store i64 56, ptr %p, align 8
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ret i64 1
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notfound:
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ret i64 0
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}
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define i64 @select_or_reduce_nxv2i1(ptr nocapture noundef readonly %src) {
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; CHECK-LABEL: select_or_reduce_nxv2i1:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: cntd x9
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: mov x10, xzr
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; CHECK-NEXT: neg x8, x9
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; CHECK-NEXT: add x11, x8, #4
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; CHECK-NEXT: .LBB2_1: // %vector.body
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0, x10, lsl #3]
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; CHECK-NEXT: cmpeq p1.d, p0/z, z0.d, #0
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; CHECK-NEXT: cset w8, ne
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; CHECK-NEXT: b.ne .LBB2_3
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; CHECK-NEXT: // %bb.2: // %vector.body
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; CHECK-NEXT: // in Loop: Header=BB2_1 Depth=1
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; CHECK-NEXT: cmp x11, x10
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; CHECK-NEXT: add x10, x10, x9
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; CHECK-NEXT: b.ne .LBB2_1
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; CHECK-NEXT: .LBB2_3: // %middle.split
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; CHECK-NEXT: mov x0, x8
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; CHECK-NEXT: ret
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entry:
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%vscale = tail call i64 @llvm.vscale.i64()
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%vf = shl nuw nsw i64 %vscale, 1
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br label %vector.body
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vector.body:
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%index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]
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%arrayidx = getelementptr inbounds ptr, ptr %src, i64 %index
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%wide.load = load <vscale x 2 x ptr>, ptr %arrayidx, align 8
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%cond = icmp eq <vscale x 2 x ptr> %wide.load, splat(ptr zeroinitializer)
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%index.next = add nuw i64 %index, %vf
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%or.reduc = tail call i1 @llvm.vector.reduce.or.nxv2i1(<vscale x 2 x i1> %cond)
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%iv.cmp = icmp eq i64 %index.next, 4
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%exit.cond = or i1 %or.reduc, %iv.cmp
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br i1 %exit.cond, label %middle.split, label %vector.body
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middle.split:
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%sel = select i1 %or.reduc, i64 1, i64 0
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ret i64 %sel
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}
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define i64 @br_or_reduce_nxv2i1(ptr nocapture noundef readonly %src, ptr noundef readnone %p) {
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; CHECK-LABEL: br_or_reduce_nxv2i1:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: cntd x8
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: mov x9, xzr
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; CHECK-NEXT: neg x10, x8
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; CHECK-NEXT: add x10, x10, #4
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; CHECK-NEXT: .LBB3_1: // %vector.body
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0, x9, lsl #3]
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; CHECK-NEXT: cmpeq p1.d, p0/z, z0.d, #0
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; CHECK-NEXT: cset w11, ne
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; CHECK-NEXT: b.ne .LBB3_3
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; CHECK-NEXT: // %bb.2: // %vector.body
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; CHECK-NEXT: // in Loop: Header=BB3_1 Depth=1
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; CHECK-NEXT: cmp x10, x9
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; CHECK-NEXT: add x9, x9, x8
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; CHECK-NEXT: b.ne .LBB3_1
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; CHECK-NEXT: .LBB3_3: // %middle.split
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; CHECK-NEXT: tbz w11, #0, .LBB3_5
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; CHECK-NEXT: // %bb.4: // %found
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; CHECK-NEXT: mov w8, #56 // =0x38
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; CHECK-NEXT: mov w0, #1 // =0x1
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; CHECK-NEXT: str x8, [x1]
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB3_5:
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; CHECK-NEXT: mov x0, xzr
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; CHECK-NEXT: ret
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entry:
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%vscale = tail call i64 @llvm.vscale.i64()
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%vf = shl nuw nsw i64 %vscale, 1
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br label %vector.body
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vector.body:
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%index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]
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%arrayidx = getelementptr inbounds ptr, ptr %src, i64 %index
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%wide.load = load <vscale x 2 x ptr>, ptr %arrayidx, align 8
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%cond = icmp eq <vscale x 2 x ptr> %wide.load, splat(ptr zeroinitializer)
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%index.next = add nuw i64 %index, %vf
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%or.reduc = tail call i1 @llvm.vector.reduce.or.nxv2i1(<vscale x 2 x i1> %cond)
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%iv.cmp = icmp eq i64 %index.next, 4
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%exit.cond = or i1 %or.reduc, %iv.cmp
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br i1 %exit.cond, label %middle.split, label %vector.body
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middle.split:
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br i1 %or.reduc, label %found, label %notfound
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found:
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store i64 56, ptr %p, align 8
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ret i64 1
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notfound:
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ret i64 0
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}
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declare i1 @llvm.vector.reduce.or.v2i1(<2 x i1>)
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declare i1 @llvm.vector.reduce.or.nxv2i1(<vscale x 2 x i1>)

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