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[BDCE] Add tests for #80113 (NFC)
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llvm/test/Transforms/BDCE/invalidate-assumptions.ll

Lines changed: 54 additions & 11 deletions
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@@ -1,4 +1,4 @@
1-
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
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; RUN: opt -passes=bdce %s -S | FileCheck %s
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; The 'nuw' on the subtract allows us to deduce that %setbit is not demanded.
@@ -8,8 +8,9 @@
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; https://bugs.llvm.org/show_bug.cgi?id=33695
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1010
define i1 @PR33695(i1 %b, i8 %x) {
11-
; CHECK-LABEL: @PR33695(
12-
; CHECK-NEXT: [[LITTLE_NUMBER:%.*]] = zext i1 [[B:%.*]] to i8
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; CHECK-LABEL: define i1 @PR33695(
12+
; CHECK-SAME: i1 [[B:%.*]], i8 [[X:%.*]]) {
13+
; CHECK-NEXT: [[LITTLE_NUMBER:%.*]] = zext i1 [[B]] to i8
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; CHECK-NEXT: [[BIG_NUMBER:%.*]] = shl i8 0, 1
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; CHECK-NEXT: [[SUB:%.*]] = sub i8 [[BIG_NUMBER]], [[LITTLE_NUMBER]]
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i8 [[SUB]] to i1
@@ -27,13 +28,14 @@ define i1 @PR33695(i1 %b, i8 %x) {
2728
; https://bugs.llvm.org/show_bug.cgi?id=34037
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2930
define i64 @PR34037(i64 %m, i32 %r, i64 %j, i1 %b, i32 %k, i64 %p) {
30-
; CHECK-LABEL: @PR34037(
31+
; CHECK-LABEL: define i64 @PR34037(
32+
; CHECK-SAME: i64 [[M:%.*]], i32 [[R:%.*]], i64 [[J:%.*]], i1 [[B:%.*]], i32 [[K:%.*]], i64 [[P:%.*]]) {
3133
; CHECK-NEXT: [[SHL:%.*]] = shl i64 0, 29
32-
; CHECK-NEXT: [[CONV1:%.*]] = select i1 [[B:%.*]], i64 7, i64 0
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; CHECK-NEXT: [[CONV1:%.*]] = select i1 [[B]], i64 7, i64 0
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; CHECK-NEXT: [[SUB:%.*]] = sub i64 [[SHL]], [[CONV1]]
34-
; CHECK-NEXT: [[CONV2:%.*]] = zext i32 [[K:%.*]] to i64
36+
; CHECK-NEXT: [[CONV2:%.*]] = zext i32 [[K]] to i64
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; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[SUB]], [[CONV2]]
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; CHECK-NEXT: [[CONV4:%.*]] = and i64 [[P:%.*]], 65535
38+
; CHECK-NEXT: [[CONV4:%.*]] = and i64 [[P]], 65535
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; CHECK-NEXT: [[AND5:%.*]] = and i64 [[MUL]], [[CONV4]]
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; CHECK-NEXT: ret i64 [[AND5]]
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;
@@ -58,8 +60,9 @@ define i64 @PR34037(i64 %m, i32 %r, i64 %j, i1 %b, i32 %k, i64 %p) {
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declare i1 @foo(i1)
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define i1 @poison_on_call_user_is_ok(i1 %b, i8 %x) {
61-
; CHECK-LABEL: @poison_on_call_user_is_ok(
62-
; CHECK-NEXT: [[LITTLE_NUMBER:%.*]] = zext i1 [[B:%.*]] to i8
63+
; CHECK-LABEL: define i1 @poison_on_call_user_is_ok(
64+
; CHECK-SAME: i1 [[B:%.*]], i8 [[X:%.*]]) {
65+
; CHECK-NEXT: [[LITTLE_NUMBER:%.*]] = zext i1 [[B]] to i8
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; CHECK-NEXT: [[BIG_NUMBER:%.*]] = shl i8 0, 1
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; CHECK-NEXT: [[SUB:%.*]] = sub i8 [[BIG_NUMBER]], [[LITTLE_NUMBER]]
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i8 [[SUB]] to i1
@@ -84,12 +87,52 @@ define i1 @poison_on_call_user_is_ok(i1 %b, i8 %x) {
8487
; also integer-typed, but that's too strong. The alloca has a pointer-type result.
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define void @PR34179(ptr %a) {
87-
; CHECK-LABEL: @PR34179(
88-
; CHECK-NEXT: [[T0:%.*]] = load volatile i32, ptr [[A:%.*]]
90+
; CHECK-LABEL: define void @PR34179(
91+
; CHECK-SAME: ptr [[A:%.*]]) {
92+
; CHECK-NEXT: [[T0:%.*]] = load volatile i32, ptr [[A]], align 4
8993
; CHECK-NEXT: ret void
9094
;
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%t0 = load volatile i32, ptr %a
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%vla = alloca i32, i32 %t0
9397
ret void
9498
}
9599

100+
define i64 @disjoint(i64 %x) {
101+
; CHECK-LABEL: define i64 @disjoint(
102+
; CHECK-SAME: i64 [[X:%.*]]) {
103+
; CHECK-NEXT: [[OR:%.*]] = or disjoint i64 [[X]], -2
104+
; CHECK-NEXT: ret i64 [[OR]]
105+
;
106+
%and = and i64 %x, 1
107+
%or = or disjoint i64 %and, -2
108+
ret i64 %or
109+
}
110+
111+
define i32 @disjoint_indirect(i64 %x) {
112+
; CHECK-LABEL: define i32 @disjoint_indirect(
113+
; CHECK-SAME: i64 [[X:%.*]]) {
114+
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i64 [[X]] to i32
115+
; CHECK-NEXT: [[OR:%.*]] = or disjoint i32 [[TRUNC]], -2
116+
; CHECK-NEXT: ret i32 [[OR]]
117+
;
118+
%and = and i64 %x, 1
119+
%trunc = trunc i64 %and to i32
120+
%or = or disjoint i32 %trunc, -2
121+
ret i32 %or
122+
}
123+
124+
define i32 @range(i32 %x) {
125+
; CHECK-LABEL: define i32 @range(
126+
; CHECK-SAME: i32 [[X:%.*]]) {
127+
; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[X]], i32 100), !range [[RNG0:![0-9]+]]
128+
; CHECK-NEXT: [[AND:%.*]] = and i32 [[UMIN]], -2
129+
; CHECK-NEXT: ret i32 [[AND]]
130+
;
131+
%or = or i32 %x, 1
132+
%umin = call i32 @llvm.umin.i32(i32 %or, i32 100), !range !{i32 1, i32 101}
133+
%and = and i32 %umin, -2
134+
ret i32 %and
135+
}
136+
;.
137+
; CHECK: [[RNG0]] = !{i32 1, i32 101}
138+
;.

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