@@ -1274,3 +1274,90 @@ entry:
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%shl.cmp = icmp uge i256 %shl.ub , 1
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ret i1 %shl.cmp
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}
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+
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+ define i1 @shl_nsw_x8_slt_x7 (i8 %start , i8 %high ) {
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+ ; CHECK-LABEL: @shl_nsw_x8_slt_x7(
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+ ; CHECK-NEXT: [[C_0:%.*]] = icmp sge i8 [[HIGH:%.*]], 0
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+ ; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])
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+ ; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nsw i8 [[START:%.*]], 3
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+ ; CHECK-NEXT: [[C_1:%.*]] = icmp slt i8 [[START_SHL_3]], [[HIGH]]
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+ ; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
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+ ; CHECK-NEXT: [[START_MUL_7:%.*]] = mul nsw i8 [[START]], 7
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+ ; CHECK-NEXT: [[T_1:%.*]] = icmp slt i8 [[START_MUL_7]], [[HIGH]]
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+ ; CHECK-NEXT: ret i1 [[T_1]]
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+ ;
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+ %c.0 = icmp sge i8 %high , 0
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+ call void @llvm.assume (i1 %c.0 )
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+
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+ %start.shl.3 = shl nsw i8 %start , 3
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+ %c.1 = icmp slt i8 %start.shl.3 , %high
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+ call void @llvm.assume (i1 %c.1 )
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+
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+ %start.mul.7 = mul nsw i8 %start , 7
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+ %t.1 = icmp slt i8 %start.mul.7 , %high
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+ ret i1 %t.1
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+ }
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+
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+ define i1 @shl_nsw_x8_not_slt_x9 (i8 %start , i8 %high ) {
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+ ; CHECK-LABEL: @shl_nsw_x8_not_slt_x9(
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+ ; CHECK-NEXT: [[C_0:%.*]] = icmp sge i8 [[HIGH:%.*]], 0
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+ ; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])
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+ ; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nsw i8 [[START:%.*]], 3
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+ ; CHECK-NEXT: [[C_1:%.*]] = icmp slt i8 [[START_SHL_3]], [[HIGH]]
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+ ; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
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+ ; CHECK-NEXT: [[START_MUL_9:%.*]] = mul nsw i8 [[START]], 9
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+ ; CHECK-NEXT: [[T_1:%.*]] = icmp slt i8 [[START_MUL_9]], [[HIGH]]
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+ ; CHECK-NEXT: ret i1 [[T_1]]
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+ ;
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+ %c.0 = icmp sge i8 %high , 0
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+ call void @llvm.assume (i1 %c.0 )
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+
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+ %start.shl.3 = shl nsw i8 %start , 3
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+ %c.1 = icmp slt i8 %start.shl.3 , %high
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+ call void @llvm.assume (i1 %c.1 )
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+
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+ %start.mul.9 = mul nsw i8 %start , 9
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+ %t.1 = icmp slt i8 %start.mul.9 , %high
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+ ret i1 %t.1
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+ }
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+
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+ define i1 @shl_nsw_sign_implication (i8 %x ) {
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+ ; CHECK-LABEL: @shl_nsw_sign_implication(
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+ ; CHECK-NEXT: [[SHL:%.*]] = shl nsw i8 [[X:%.*]], 2
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+ ; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i8 [[X]], 0
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+ ; CHECK-NEXT: br i1 [[CMP1]], label [[IF:%.*]], label [[ELSE:%.*]]
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+ ; CHECK: if:
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+ ; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i8 [[SHL]], 0
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+ ; CHECK-NEXT: ret i1 [[CMP2]]
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+ ; CHECK: else:
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+ ; CHECK-NEXT: [[CMP3:%.*]] = icmp sge i8 [[SHL]], 0
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+ ; CHECK-NEXT: ret i1 [[CMP3]]
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+ ;
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+ %shl = shl nsw i8 %x , 2
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+ %cmp1 = icmp slt i8 %x , 0
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+ br i1 %cmp1 , label %if , label %else
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+
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+ if:
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+ %cmp2 = icmp slt i8 %shl , 0
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+ ret i1 %cmp2
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+
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+ else:
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+ %cmp3 = icmp sge i8 %shl , 0
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+ ret i1 %cmp3
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+ }
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+
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+ define i1 @shl_nsw_by_bw_minus_1 (i64 %x ) {
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+ ; CHECK-LABEL: @shl_nsw_by_bw_minus_1(
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+ ; CHECK-NEXT: [[X_SHL:%.*]] = shl nsw i64 [[X:%.*]], 63
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+ ; CHECK-NEXT: [[C_1:%.*]] = icmp slt i64 [[X_SHL]], 0
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+ ; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
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+ ; CHECK-NEXT: [[T_1:%.*]] = icmp slt i64 [[X]], 0
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+ ; CHECK-NEXT: ret i1 [[T_1]]
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+ ;
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+ %x.shl = shl nsw i64 %x , 63
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+ %c.1 = icmp slt i64 %x.shl , 0
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+ call void @llvm.assume (i1 %c.1 )
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+
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+ %t.1 = icmp slt i64 %x , 0
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+ ret i1 %t.1
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+ }
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