Merge pull request #160 from Xilinx/corentin.fix_itofp

[FXML-4281] Fix signedness behavior of unsigned integer <-> floating-point conversions

Author: cferry-AMD

mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp

@@ -162,8 +162,22 @@ class FtoICastOpConversion : public OpConversionPattern<CastOp> {
       return rewriter.notifyMatchFailure(castOp,
                                          "unsupported cast destination type");
 
-    rewriter.replaceOpWithNewOp<emitc::CastOp>(castOp, dstType,
-                                               adaptor.getOperands());
+    // Convert to unsigned if it's the "ui" variant
+    // Signless is interpreted as signed, so no need to cast for "si"
+    Type actualResultType = dstType;
+    if (isa<arith::FPToUIOp>(castOp)) {
+      actualResultType =
+          rewriter.getIntegerType(operandType.getIntOrFloatBitWidth(),
+                                  /*isSigned=*/false);
+    }
+
+    Value result = rewriter.create<emitc::CastOp>(
+        castOp.getLoc(), actualResultType, adaptor.getOperands());
+
+    if (isa<arith::FPToUIOp>(castOp)) {
+      result = rewriter.create<emitc::CastOp>(castOp.getLoc(), dstType, result);
+    }
+    rewriter.replaceOp(castOp, result);
 
     return success();
   }
@@ -179,7 +193,7 @@ class ItoFCastOpConversion : public OpConversionPattern<CastOp> {
   LogicalResult
   matchAndRewrite(CastOp castOp, typename CastOp::Adaptor adaptor,
                   ConversionPatternRewriter &rewriter) const override {
-
+    // Vectors in particular are not supported
     Type operandType = adaptor.getIn().getType();
     if (!emitc::isSupportedIntegerType(operandType))
       return rewriter.notifyMatchFailure(castOp,
@@ -193,8 +207,20 @@ class ItoFCastOpConversion : public OpConversionPattern<CastOp> {
       return rewriter.notifyMatchFailure(castOp,
                                          "unsupported cast destination type");
 
-    rewriter.replaceOpWithNewOp<emitc::CastOp>(castOp, dstType,
-                                               adaptor.getOperands());
+    // Convert to unsigned if it's the "ui" variant
+    // Signless is interpreted as signed, so no need to cast for "si"
+    Type actualOperandType = operandType;
+    if (isa<arith::UIToFPOp>(castOp)) {
+      actualOperandType =
+          rewriter.getIntegerType(operandType.getIntOrFloatBitWidth(),
+                                  /*isSigned=*/false);
+    }
+    Value fpCastOperand = adaptor.getIn();
+    if (actualOperandType != operandType) {
+      fpCastOperand = rewriter.template create<emitc::CastOp>(
+          castOp.getLoc(), actualOperandType, fpCastOperand);
+    }
+    rewriter.replaceOpWithNewOp<emitc::CastOp>(castOp, dstType, fpCastOperand);
 
     return success();
   }

mlir/test/Conversion/ArithToEmitC/arith-to-emitc-cast-truncate.mlir

@@ -13,7 +13,8 @@ func.func @arith_float_to_int_cast_ops(%arg0: f32, %arg1: f64) {
   // CHECK: emitc.cast %arg1 : f64 to i16
   %3 = arith.fptosi %arg1 : f64 to i16
 
-  // CHECK: emitc.cast %arg0 : f32 to i32
+  // CHECK: %[[CAST0:.*]] = emitc.cast %arg0 : f32 to ui32
+  // CHECK: emitc.cast %[[CAST0]] : ui32 to i32
   %4 = arith.fptoui %arg0 : f32 to i32
 
   return

mlir/test/Conversion/ArithToEmitC/arith-to-emitc.mlir

@@ -103,7 +103,8 @@ func.func @arith_int_to_float_cast_ops(%arg0: i8, %arg1: i64) {
   // CHECK: emitc.cast %arg1 : i64 to f32
   %1 = arith.sitofp %arg1 : i64 to f32
 
-  // CHECK: emitc.cast %arg0 : i8 to f32
+  // CHECK: %[[CAST_UNS:.*]] = emitc.cast %arg0 : i8 to ui8
+  // CHECK: emitc.cast %[[CAST_UNS]] : ui8 to f32
   %2 = arith.uitofp %arg0 : i8 to f32
 
   return