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[SystemZ] Test improvements for atomic load/store instructions (NFC).
Make sure to test atomic load and store instructions with and w/out natural alignment.
1 parent f324584 commit dbc00e6

14 files changed

+578
-88
lines changed

‎llvm/test/CodeGen/SystemZ/atomic-load-02.ll

Lines changed: 25 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,33 @@
1-
; Test 16-bit atomic loads.
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2+
; Test 16-bit atomic loads. Expect libcall without natural alignment.
23
;
34
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
45

56
define i16 @f1(ptr %src) {
67
; CHECK-LABEL: f1:
7-
; CHECK: lh %r2, 0(%r2)
8-
; CHECK: br %r14
8+
; CHECK: # %bb.0:
9+
; CHECK-NEXT: lh %r2, 0(%r2)
10+
; CHECK-NEXT: br %r14
911
%val = load atomic i16, ptr %src seq_cst, align 2
1012
ret i16 %val
1113
}
14+
15+
define i16 @f2(ptr %src) {
16+
; CHECK-LABEL: f2:
17+
; CHECK: # %bb.0:
18+
; CHECK-NEXT: stmg %r14, %r15, 112(%r15)
19+
; CHECK-NEXT: .cfi_offset %r14, -48
20+
; CHECK-NEXT: .cfi_offset %r15, -40
21+
; CHECK-NEXT: aghi %r15, -168
22+
; CHECK-NEXT: .cfi_def_cfa_offset 328
23+
; CHECK-NEXT: lgr %r3, %r2
24+
; CHECK-NEXT: la %r4, 166(%r15)
25+
; CHECK-NEXT: lghi %r2, 2
26+
; CHECK-NEXT: lhi %r5, 5
27+
; CHECK-NEXT: brasl %r14, __atomic_load@PLT
28+
; CHECK-NEXT: lh %r2, 166(%r15)
29+
; CHECK-NEXT: lmg %r14, %r15, 280(%r15)
30+
; CHECK-NEXT: br %r14
31+
%val = load atomic i16, ptr %src seq_cst, align 1
32+
ret i16 %val
33+
}

‎llvm/test/CodeGen/SystemZ/atomic-load-03.ll

Lines changed: 25 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,33 @@
1-
; Test 32-bit atomic loads.
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2+
; Test 32-bit atomic loads. Expect libcall without natural alignment.
23
;
34
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
45

56
define i32 @f1(ptr %src) {
67
; CHECK-LABEL: f1:
7-
; CHECK: l %r2, 0(%r2)
8-
; CHECK: br %r14
8+
; CHECK: # %bb.0:
9+
; CHECK-NEXT: l %r2, 0(%r2)
10+
; CHECK-NEXT: br %r14
911
%val = load atomic i32, ptr %src seq_cst, align 4
1012
ret i32 %val
1113
}
14+
15+
define i32 @f2(ptr %src) {
16+
; CHECK-LABEL: f2:
17+
; CHECK: # %bb.0:
18+
; CHECK-NEXT: stmg %r14, %r15, 112(%r15)
19+
; CHECK-NEXT: .cfi_offset %r14, -48
20+
; CHECK-NEXT: .cfi_offset %r15, -40
21+
; CHECK-NEXT: aghi %r15, -168
22+
; CHECK-NEXT: .cfi_def_cfa_offset 328
23+
; CHECK-NEXT: lgr %r3, %r2
24+
; CHECK-NEXT: la %r4, 164(%r15)
25+
; CHECK-NEXT: lghi %r2, 4
26+
; CHECK-NEXT: lhi %r5, 5
27+
; CHECK-NEXT: brasl %r14, __atomic_load@PLT
28+
; CHECK-NEXT: l %r2, 164(%r15)
29+
; CHECK-NEXT: lmg %r14, %r15, 280(%r15)
30+
; CHECK-NEXT: br %r14
31+
%val = load atomic i32, ptr %src seq_cst, align 2
32+
ret i32 %val
33+
}

‎llvm/test/CodeGen/SystemZ/atomic-load-04.ll

Lines changed: 25 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,33 @@
1-
; Test 64-bit atomic loads.
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2+
; Test 64-bit atomic loads. Expect libcall without natural alignment.
23
;
34
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
45

56
define i64 @f1(ptr %src) {
67
; CHECK-LABEL: f1:
7-
; CHECK: lg %r2, 0(%r2)
8-
; CHECK: br %r14
8+
; CHECK: # %bb.0:
9+
; CHECK-NEXT: lg %r2, 0(%r2)
10+
; CHECK-NEXT: br %r14
911
%val = load atomic i64, ptr %src seq_cst, align 8
1012
ret i64 %val
1113
}
14+
15+
define i64 @f2(ptr %src) {
16+
; CHECK-LABEL: f2:
17+
; CHECK: # %bb.0:
18+
; CHECK-NEXT: stmg %r14, %r15, 112(%r15)
19+
; CHECK-NEXT: .cfi_offset %r14, -48
20+
; CHECK-NEXT: .cfi_offset %r15, -40
21+
; CHECK-NEXT: aghi %r15, -168
22+
; CHECK-NEXT: .cfi_def_cfa_offset 328
23+
; CHECK-NEXT: lgr %r3, %r2
24+
; CHECK-NEXT: la %r4, 160(%r15)
25+
; CHECK-NEXT: lghi %r2, 8
26+
; CHECK-NEXT: lhi %r5, 5
27+
; CHECK-NEXT: brasl %r14, __atomic_load@PLT
28+
; CHECK-NEXT: lg %r2, 160(%r15)
29+
; CHECK-NEXT: lmg %r14, %r15, 280(%r15)
30+
; CHECK-NEXT: br %r14
31+
%val = load atomic i64, ptr %src seq_cst, align 4
32+
ret i64 %val
33+
}

‎llvm/test/CodeGen/SystemZ/atomic-load-05.ll

Lines changed: 57 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,14 +1,65 @@
1-
; Test 128-bit atomic loads.
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2+
; Test 128-bit atomic loads. Expect libcall without natural alignment.
23
;
34
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
4-
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
5+
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s --check-prefix=Z13
56

67
define i128 @f1(ptr %src) {
78
; CHECK-LABEL: f1:
8-
; CHECK: lpq %r0, 0(%r3)
9-
; CHECK-DAG: stg %r1, 8(%r2)
10-
; CHECK-DAG: stg %r0, 0(%r2)
11-
; CHECK: br %r14
9+
; CHECK: # %bb.0:
10+
; CHECK-NEXT: lpq %r0, 0(%r3)
11+
; CHECK-NEXT: stg %r1, 8(%r2)
12+
; CHECK-NEXT: stg %r0, 0(%r2)
13+
; CHECK-NEXT: br %r14
14+
;
15+
; Z13-LABEL: f1:
16+
; Z13: # %bb.0:
17+
; Z13-NEXT: lpq %r0, 0(%r3)
18+
; Z13-NEXT: stg %r1, 8(%r2)
19+
; Z13-NEXT: stg %r0, 0(%r2)
20+
; Z13-NEXT: br %r14
1221
%val = load atomic i128, ptr %src seq_cst, align 16
1322
ret i128 %val
1423
}
24+
25+
define i128 @f2(ptr %src) {
26+
; CHECK-LABEL: f2:
27+
; CHECK: # %bb.0:
28+
; CHECK-NEXT: stmg %r13, %r15, 104(%r15)
29+
; CHECK-NEXT: .cfi_offset %r13, -56
30+
; CHECK-NEXT: .cfi_offset %r14, -48
31+
; CHECK-NEXT: .cfi_offset %r15, -40
32+
; CHECK-NEXT: aghi %r15, -176
33+
; CHECK-NEXT: .cfi_def_cfa_offset 336
34+
; CHECK-NEXT: lgr %r13, %r2
35+
; CHECK-NEXT: la %r4, 160(%r15)
36+
; CHECK-NEXT: lghi %r2, 16
37+
; CHECK-NEXT: lhi %r5, 5
38+
; CHECK-NEXT: brasl %r14, __atomic_load@PLT
39+
; CHECK-NEXT: lg %r0, 168(%r15)
40+
; CHECK-NEXT: lg %r1, 160(%r15)
41+
; CHECK-NEXT: stg %r0, 8(%r13)
42+
; CHECK-NEXT: stg %r1, 0(%r13)
43+
; CHECK-NEXT: lmg %r13, %r15, 280(%r15)
44+
; CHECK-NEXT: br %r14
45+
;
46+
; Z13-LABEL: f2:
47+
; Z13: # %bb.0:
48+
; Z13-NEXT: stmg %r13, %r15, 104(%r15)
49+
; Z13-NEXT: .cfi_offset %r13, -56
50+
; Z13-NEXT: .cfi_offset %r14, -48
51+
; Z13-NEXT: .cfi_offset %r15, -40
52+
; Z13-NEXT: aghi %r15, -176
53+
; Z13-NEXT: .cfi_def_cfa_offset 336
54+
; Z13-NEXT: lgr %r13, %r2
55+
; Z13-NEXT: la %r4, 160(%r15)
56+
; Z13-NEXT: lghi %r2, 16
57+
; Z13-NEXT: lhi %r5, 5
58+
; Z13-NEXT: brasl %r14, __atomic_load@PLT
59+
; Z13-NEXT: vl %v0, 160(%r15), 3
60+
; Z13-NEXT: vst %v0, 0(%r13), 3
61+
; Z13-NEXT: lmg %r13, %r15, 280(%r15)
62+
; Z13-NEXT: br %r14
63+
%val = load atomic i128, ptr %src seq_cst, align 8
64+
ret i128 %val
65+
}

‎llvm/test/CodeGen/SystemZ/atomic-load-06.ll

Lines changed: 50 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,13 +1,58 @@
1-
; Test float atomic loads.
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2+
; Test float atomic loads. Expect libcall without natural alignment.
23
;
34
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
5+
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s --check-prefix=Z14
46

57
define float @f1(ptr %src) {
68
; CHECK-LABEL: f1:
7-
; CHECK: lgf [[R:%r[0-9]+]], 0(%r2)
8-
; CHECK: sllg [[R]], [[R]], 32
9-
; CHECK: ldgr %f0, [[R]]
10-
; CHECK: br %r14
9+
; CHECK: # %bb.0:
10+
; CHECK-NEXT: lgf %r0, 0(%r2)
11+
; CHECK-NEXT: sllg %r0, %r0, 32
12+
; CHECK-NEXT: ldgr %f0, %r0
13+
; CHECK-NEXT: # kill: def $f0s killed $f0s killed $f0d
14+
; CHECK-NEXT: br %r14
15+
;
16+
; Z14-LABEL: f1:
17+
; Z14: # %bb.0:
18+
; Z14-NEXT: lde %f0, 0(%r2)
19+
; Z14-NEXT: br %r14
1120
%val = load atomic float, ptr %src seq_cst, align 4
1221
ret float %val
1322
}
23+
24+
define float @f2(ptr %src) {
25+
; CHECK-LABEL: f2:
26+
; CHECK: # %bb.0:
27+
; CHECK-NEXT: stmg %r14, %r15, 112(%r15)
28+
; CHECK-NEXT: .cfi_offset %r14, -48
29+
; CHECK-NEXT: .cfi_offset %r15, -40
30+
; CHECK-NEXT: aghi %r15, -168
31+
; CHECK-NEXT: .cfi_def_cfa_offset 328
32+
; CHECK-NEXT: lgr %r3, %r2
33+
; CHECK-NEXT: la %r4, 164(%r15)
34+
; CHECK-NEXT: lghi %r2, 4
35+
; CHECK-NEXT: lhi %r5, 5
36+
; CHECK-NEXT: brasl %r14, __atomic_load@PLT
37+
; CHECK-NEXT: le %f0, 164(%r15)
38+
; CHECK-NEXT: lmg %r14, %r15, 280(%r15)
39+
; CHECK-NEXT: br %r14
40+
;
41+
; Z14-LABEL: f2:
42+
; Z14: # %bb.0:
43+
; Z14-NEXT: stmg %r14, %r15, 112(%r15)
44+
; Z14-NEXT: .cfi_offset %r14, -48
45+
; Z14-NEXT: .cfi_offset %r15, -40
46+
; Z14-NEXT: aghi %r15, -168
47+
; Z14-NEXT: .cfi_def_cfa_offset 328
48+
; Z14-NEXT: lgr %r3, %r2
49+
; Z14-NEXT: la %r4, 164(%r15)
50+
; Z14-NEXT: lghi %r2, 4
51+
; Z14-NEXT: lhi %r5, 5
52+
; Z14-NEXT: brasl %r14, __atomic_load@PLT
53+
; Z14-NEXT: lde %f0, 164(%r15)
54+
; Z14-NEXT: lmg %r14, %r15, 280(%r15)
55+
; Z14-NEXT: br %r14
56+
%val = load atomic float, ptr %src seq_cst, align 2
57+
ret float %val
58+
}

‎llvm/test/CodeGen/SystemZ/atomic-load-07.ll

Lines changed: 25 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,33 @@
1-
; Test double atomic loads.
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2+
; Test double atomic loads. Expect libcall without natural alignment.
23
;
34
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
45

56
define double @f1(ptr %src) {
67
; CHECK-LABEL: f1:
7-
; CHECK: ld %f0, 0(%r2)
8-
; CHECK: br %r14
8+
; CHECK: # %bb.0:
9+
; CHECK-NEXT: ld %f0, 0(%r2)
10+
; CHECK-NEXT: br %r14
911
%val = load atomic double, ptr %src seq_cst, align 8
1012
ret double %val
1113
}
14+
15+
define double @f2(ptr %src) {
16+
; CHECK-LABEL: f2:
17+
; CHECK: # %bb.0:
18+
; CHECK-NEXT: stmg %r14, %r15, 112(%r15)
19+
; CHECK-NEXT: .cfi_offset %r14, -48
20+
; CHECK-NEXT: .cfi_offset %r15, -40
21+
; CHECK-NEXT: aghi %r15, -168
22+
; CHECK-NEXT: .cfi_def_cfa_offset 328
23+
; CHECK-NEXT: lgr %r3, %r2
24+
; CHECK-NEXT: la %r4, 160(%r15)
25+
; CHECK-NEXT: lghi %r2, 8
26+
; CHECK-NEXT: lhi %r5, 5
27+
; CHECK-NEXT: brasl %r14, __atomic_load@PLT
28+
; CHECK-NEXT: ld %f0, 160(%r15)
29+
; CHECK-NEXT: lmg %r14, %r15, 280(%r15)
30+
; CHECK-NEXT: br %r14
31+
%val = load atomic double, ptr %src seq_cst, align 4
32+
ret double %val
33+
}

‎llvm/test/CodeGen/SystemZ/atomic-load-08.ll

Lines changed: 60 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1,19 +1,66 @@
1-
; Test long double atomic loads. Expect a libcall.
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2+
; Test long double atomic loads. Expect libcall without natural alignment.
23
;
34
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
5+
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s --check-prefix=Z14
46

5-
define void @f1(ptr %ret, ptr %src) {
6-
; CHECK-LABEL: f1:
7-
; CHECK: lgr [[RET:%r[0-9]+]], %r2
8-
; CHECK: la %r4, 160(%r15)
9-
; CHECK: lghi %r2, 16
10-
; CHECK: lhi %r5, 5
11-
; CHECK: brasl %r14, __atomic_load@PLT
12-
; CHECK: ld [[FL:%f[0-9]+]], 160(%r15)
13-
; CHECK: ld [[FH:%f[0-9]+]], 168(%r15)
14-
; CHECK: std [[FL]], 0([[RET]])
15-
; CHECK: std [[FH]], 8([[RET]])
16-
; CHECK: br %r14
7+
define void @fun1(ptr %ret, ptr %src) {
8+
; CHECK-LABEL: fun1:
9+
; CHECK: # %bb.0:
10+
; CHECK-NEXT: lpq %r0, 0(%r3)
11+
; CHECK-NEXT: stg %r1, 8(%r2)
12+
; CHECK-NEXT: stg %r0, 0(%r2)
13+
; CHECK-NEXT: br %r14
14+
;
15+
; Z14-LABEL: fun1:
16+
; Z14: # %bb.0:
17+
; Z14-NEXT: lpq %r0, 0(%r3)
18+
; Z14-NEXT: stg %r1, 8(%r2)
19+
; Z14-NEXT: stg %r0, 0(%r2)
20+
; Z14-NEXT: br %r14
21+
%val = load atomic fp128, ptr %src seq_cst, align 16
22+
store fp128 %val, ptr %ret, align 8
23+
ret void
24+
}
25+
26+
define void @fun2(ptr %ret, ptr %src) {
27+
; CHECK-LABEL: fun2:
28+
; CHECK: # %bb.0:
29+
; CHECK-NEXT: stmg %r13, %r15, 104(%r15)
30+
; CHECK-NEXT: .cfi_offset %r13, -56
31+
; CHECK-NEXT: .cfi_offset %r14, -48
32+
; CHECK-NEXT: .cfi_offset %r15, -40
33+
; CHECK-NEXT: aghi %r15, -176
34+
; CHECK-NEXT: .cfi_def_cfa_offset 336
35+
; CHECK-NEXT: lgr %r13, %r2
36+
; CHECK-NEXT: la %r4, 160(%r15)
37+
; CHECK-NEXT: lghi %r2, 16
38+
; CHECK-NEXT: lhi %r5, 5
39+
; CHECK-NEXT: brasl %r14, __atomic_load@PLT
40+
; CHECK-NEXT: ld %f0, 160(%r15)
41+
; CHECK-NEXT: ld %f2, 168(%r15)
42+
; CHECK-NEXT: std %f0, 0(%r13)
43+
; CHECK-NEXT: std %f2, 8(%r13)
44+
; CHECK-NEXT: lmg %r13, %r15, 280(%r15)
45+
; CHECK-NEXT: br %r14
46+
;
47+
; Z14-LABEL: fun2:
48+
; Z14: # %bb.0:
49+
; Z14-NEXT: stmg %r13, %r15, 104(%r15)
50+
; Z14-NEXT: .cfi_offset %r13, -56
51+
; Z14-NEXT: .cfi_offset %r14, -48
52+
; Z14-NEXT: .cfi_offset %r15, -40
53+
; Z14-NEXT: aghi %r15, -176
54+
; Z14-NEXT: .cfi_def_cfa_offset 336
55+
; Z14-NEXT: lgr %r13, %r2
56+
; Z14-NEXT: la %r4, 160(%r15)
57+
; Z14-NEXT: lghi %r2, 16
58+
; Z14-NEXT: lhi %r5, 5
59+
; Z14-NEXT: brasl %r14, __atomic_load@PLT
60+
; Z14-NEXT: vl %v0, 160(%r15), 3
61+
; Z14-NEXT: vst %v0, 0(%r13), 3
62+
; Z14-NEXT: lmg %r13, %r15, 280(%r15)
63+
; Z14-NEXT: br %r14
1764
%val = load atomic fp128, ptr %src seq_cst, align 8
1865
store fp128 %val, ptr %ret, align 8
1966
ret void

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