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Kai Luo
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[PowerPC][Atomics] Simplify atomicrmw i128 patterns. NFC. (#68779)
Most fragments of these patterns are the same, we can simplify them by defining a common pattern.
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llvm/lib/Target/PowerPC/PPCInstr64Bit.td

Lines changed: 16 additions & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -380,7 +380,7 @@ let mayStore = 1, mayLoad = 1,
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Defs = [CR0],
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Constraints = "@earlyclobber $scratch,@earlyclobber $RTp" in {
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// Atomic pseudo instructions expanded post-ra.
383-
def ATOMIC_SWAP_I128 : AtomicRMW128<"#ATOMIC_SWAP_I128">;
383+
def ATOMIC_SWAP_I128 : AtomicRMW128<"#ATOMIC_SWAP_I128">;
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def ATOMIC_LOAD_ADD_I128 : AtomicRMW128<"#ATOMIC_LOAD_ADD_I128">;
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def ATOMIC_LOAD_SUB_I128 : AtomicRMW128<"#ATOMIC_LOAD_SUB_I128">;
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def ATOMIC_LOAD_AND_I128 : AtomicRMW128<"#ATOMIC_LOAD_AND_I128">;
@@ -395,48 +395,21 @@ def ATOMIC_CMP_SWAP_I128 : PPCPostRAExpPseudo<
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"#ATOMIC_CMP_SWAP_I128", []>;
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}
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398-
def : Pat<(int_ppc_atomicrmw_add_i128 ForceXForm:$ptr,
399-
i64:$incr_lo,
400-
i64:$incr_hi),
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(SPLIT_QUADWORD (ATOMIC_LOAD_ADD_I128 memrr:$ptr,
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g8rc:$incr_lo,
403-
g8rc:$incr_hi))>;
404-
def : Pat<(int_ppc_atomicrmw_sub_i128 ForceXForm:$ptr,
405-
i64:$incr_lo,
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i64:$incr_hi),
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(SPLIT_QUADWORD (ATOMIC_LOAD_SUB_I128 memrr:$ptr,
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g8rc:$incr_lo,
409-
g8rc:$incr_hi))>;
410-
def : Pat<(int_ppc_atomicrmw_xor_i128 ForceXForm:$ptr,
411-
i64:$incr_lo,
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i64:$incr_hi),
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(SPLIT_QUADWORD (ATOMIC_LOAD_XOR_I128 memrr:$ptr,
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g8rc:$incr_lo,
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g8rc:$incr_hi))>;
416-
def : Pat<(int_ppc_atomicrmw_and_i128 ForceXForm:$ptr,
417-
i64:$incr_lo,
418-
i64:$incr_hi),
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(SPLIT_QUADWORD (ATOMIC_LOAD_AND_I128 memrr:$ptr,
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g8rc:$incr_lo,
421-
g8rc:$incr_hi))>;
422-
def : Pat<(int_ppc_atomicrmw_nand_i128 ForceXForm:$ptr,
423-
i64:$incr_lo,
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i64:$incr_hi),
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(SPLIT_QUADWORD (ATOMIC_LOAD_NAND_I128 memrr:$ptr,
426-
g8rc:$incr_lo,
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g8rc:$incr_hi))>;
428-
def : Pat<(int_ppc_atomicrmw_or_i128 ForceXForm:$ptr,
429-
i64:$incr_lo,
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i64:$incr_hi),
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(SPLIT_QUADWORD (ATOMIC_LOAD_OR_I128 memrr:$ptr,
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g8rc:$incr_lo,
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g8rc:$incr_hi))>;
434-
def : Pat<(int_ppc_atomicrmw_xchg_i128 ForceXForm:$ptr,
435-
i64:$incr_lo,
436-
i64:$incr_hi),
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(SPLIT_QUADWORD (ATOMIC_SWAP_I128 memrr:$ptr,
438-
g8rc:$incr_lo,
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g8rc:$incr_hi))>;
398+
class PatAtomicRMWI128<SDPatternOperator OpNode, AtomicRMW128 Inst> :
399+
Pat<(OpNode ForceXForm:$ptr,
400+
i64:$incr_lo,
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i64:$incr_hi),
402+
(SPLIT_QUADWORD (Inst memrr:$ptr,
403+
g8rc:$incr_lo,
404+
g8rc:$incr_hi))>;
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406+
def : PatAtomicRMWI128<int_ppc_atomicrmw_add_i128, ATOMIC_LOAD_ADD_I128>;
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def : PatAtomicRMWI128<int_ppc_atomicrmw_sub_i128, ATOMIC_LOAD_SUB_I128>;
408+
def : PatAtomicRMWI128<int_ppc_atomicrmw_xor_i128, ATOMIC_LOAD_XOR_I128>;
409+
def : PatAtomicRMWI128<int_ppc_atomicrmw_and_i128, ATOMIC_LOAD_AND_I128>;
410+
def : PatAtomicRMWI128<int_ppc_atomicrmw_nand_i128, ATOMIC_LOAD_NAND_I128>;
411+
def : PatAtomicRMWI128<int_ppc_atomicrmw_or_i128, ATOMIC_LOAD_OR_I128>;
412+
def : PatAtomicRMWI128<int_ppc_atomicrmw_xchg_i128, ATOMIC_SWAP_I128>;
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def : Pat<(int_ppc_cmpxchg_i128 ForceXForm:$ptr,
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i64:$cmp_lo,
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i64:$cmp_hi,

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