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Fixups and verifier. Update all tests.
1 parent b5666f3 commit dd8991a

19 files changed

+489
-440
lines changed

llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@
1717
#include "llvm/CodeGen/MachineBasicBlock.h"
1818
#include "llvm/CodeGen/MachineInstrBuilder.h"
1919
#include "llvm/CodeGen/MachineRegisterInfo.h"
20+
#include "llvm/CodeGen/TargetLowering.h"
2021
#include "llvm/CodeGen/TargetOpcodes.h"
2122
#include "llvm/IR/DebugLoc.h"
2223
#include "llvm/IR/Module.h"
@@ -1300,8 +1301,10 @@ class MachineIRBuilder {
13001301
MachineInstrBuilder buildExtractVectorElementConstant(const DstOp &Res,
13011302
const SrcOp &Val,
13021303
const int Idx) {
1303-
return buildExtractVectorElement(Res, Val,
1304-
buildConstant(LLT::scalar(64), Idx));
1304+
auto TLI = getMF().getSubtarget().getTargetLowering();
1305+
unsigned VecIdxWidth = TLI->getVectorIdxTy(getDataLayout()).getSizeInBits();
1306+
return buildExtractVectorElement(
1307+
Res, Val, buildConstant(LLT::scalar(VecIdxWidth), Idx));
13051308
}
13061309

13071310
/// Build and insert \p Res = G_EXTRACT_VECTOR_ELT \p Val, \p Idx

llvm/lib/CodeGen/MachineVerifier.cpp

Lines changed: 55 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -55,6 +55,7 @@
5555
#include "llvm/CodeGen/SlotIndexes.h"
5656
#include "llvm/CodeGen/StackMaps.h"
5757
#include "llvm/CodeGen/TargetInstrInfo.h"
58+
#include "llvm/CodeGen/TargetLowering.h"
5859
#include "llvm/CodeGen/TargetOpcodes.h"
5960
#include "llvm/CodeGen/TargetRegisterInfo.h"
6061
#include "llvm/CodeGen/TargetSubtargetInfo.h"
@@ -1788,6 +1789,60 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) {
17881789

17891790
break;
17901791
}
1792+
case TargetOpcode::G_EXTRACT_VECTOR_ELT: {
1793+
LLT DstTy = MRI->getType(MI->getOperand(0).getReg());
1794+
LLT SrcTy = MRI->getType(MI->getOperand(1).getReg());
1795+
LLT IdxTy = MRI->getType(MI->getOperand(2).getReg());
1796+
1797+
if (!DstTy.isScalar() && !DstTy.isPointer()) {
1798+
report("Destination type must be a scalar or pointer", MI);
1799+
break;
1800+
}
1801+
1802+
if (!SrcTy.isVector()) {
1803+
report("First source must be a vector", MI);
1804+
break;
1805+
}
1806+
1807+
auto TLI = MF->getSubtarget().getTargetLowering();
1808+
if (IdxTy.getSizeInBits() !=
1809+
TLI->getVectorIdxTy(MF->getDataLayout()).getFixedSizeInBits()) {
1810+
report("Index type must match VectorIdxTy", MI);
1811+
break;
1812+
}
1813+
1814+
break;
1815+
}
1816+
case TargetOpcode::G_INSERT_VECTOR_ELT: {
1817+
LLT DstTy = MRI->getType(MI->getOperand(0).getReg());
1818+
LLT VecTy = MRI->getType(MI->getOperand(1).getReg());
1819+
LLT ScaTy = MRI->getType(MI->getOperand(2).getReg());
1820+
LLT IdxTy = MRI->getType(MI->getOperand(3).getReg());
1821+
1822+
if (!DstTy.isVector()) {
1823+
report("Destination type must be a vector", MI);
1824+
break;
1825+
}
1826+
1827+
if (VecTy != DstTy) {
1828+
report("Destination type and vector type must match", MI);
1829+
break;
1830+
}
1831+
1832+
if (!ScaTy.isScalar() && !ScaTy.isPointer()) {
1833+
report("Inserted element must be a scalar or pointer", MI);
1834+
break;
1835+
}
1836+
1837+
auto TLI = MF->getSubtarget().getTargetLowering();
1838+
if (IdxTy.getSizeInBits() !=
1839+
TLI->getVectorIdxTy(MF->getDataLayout()).getFixedSizeInBits()) {
1840+
report("Index type must match VectorIdxTy", MI);
1841+
break;
1842+
}
1843+
1844+
break;
1845+
}
17911846
case TargetOpcode::G_DYN_STACKALLOC: {
17921847
const MachineOperand &DstOp = MI->getOperand(0);
17931848
const MachineOperand &AllocOp = MI->getOperand(1);

llvm/test/CodeGen/AArch64/GlobalISel/combine-build-vector.mir

Lines changed: 22 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -25,11 +25,11 @@ body: |
2525
; CHECK-NEXT: RET_ReallyLR implicit $x0
2626
%arg1:_(s64) = COPY $x0
2727
%arg2:_(s64) = COPY $x1
28-
%zero:_(s32) = G_CONSTANT i32 0
29-
%one:_(s32) = G_CONSTANT i32 1
28+
%zero:_(s64) = G_CONSTANT i64 0
29+
%one:_(s64) = G_CONSTANT i64 1
3030
%bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64)
31-
%extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %zero(s32)
32-
%extract2:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %one(s32)
31+
%extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %zero(s64)
32+
%extract2:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %one(s64)
3333
$x0 = COPY %extract(s64)
3434
$x1 = COPY %extract2(s64)
3535
RET_ReallyLR implicit $x0
@@ -55,22 +55,22 @@ body: |
5555
; CHECK-NEXT: {{ $}}
5656
; CHECK-NEXT: %arg1:_(s64) = COPY $x0
5757
; CHECK-NEXT: %arg2:_(s64) = COPY $x1
58-
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
59-
; CHECK-NEXT: %one:_(s32) = G_CONSTANT i32 1
58+
; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
59+
; CHECK-NEXT: %one:_(s64) = G_CONSTANT i64 1
6060
; CHECK-NEXT: %bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64)
61-
; CHECK-NEXT: %extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %zero(s32)
62-
; CHECK-NEXT: %extract2:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %one(s32)
61+
; CHECK-NEXT: %extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %zero(s64)
62+
; CHECK-NEXT: %extract2:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %one(s64)
6363
; CHECK-NEXT: $x0 = COPY %extract(s64)
6464
; CHECK-NEXT: $x1 = COPY %extract2(s64)
6565
; CHECK-NEXT: $q0 = COPY %bv(<2 x s64>)
6666
; CHECK-NEXT: RET_ReallyLR implicit $x0
6767
%arg1:_(s64) = COPY $x0
6868
%arg2:_(s64) = COPY $x1
69-
%zero:_(s32) = G_CONSTANT i32 0
70-
%one:_(s32) = G_CONSTANT i32 1
69+
%zero:_(s64) = G_CONSTANT i64 0
70+
%one:_(s64) = G_CONSTANT i64 1
7171
%bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64)
72-
%extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %zero(s32)
73-
%extract2:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %one(s32)
72+
%extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %zero(s64)
73+
%extract2:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %one(s64)
7474
$x0 = COPY %extract(s64)
7575
$x1 = COPY %extract2(s64)
7676
$q0 = COPY %bv(<2 x s64>)
@@ -103,12 +103,12 @@ body: |
103103
; CHECK-NEXT: RET_ReallyLR implicit $x0
104104
%arg1:_(s64) = COPY $x0
105105
%arg2:_(s64) = COPY $x1
106-
%zero:_(s32) = G_CONSTANT i32 0
107-
%one:_(s32) = G_CONSTANT i32 1
106+
%zero:_(s64) = G_CONSTANT i64 0
107+
%one:_(s64) = G_CONSTANT i64 1
108108
%bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64)
109-
%extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %zero(s32)
110-
%extract2:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %one(s32)
111-
%extract3:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %one(s32)
109+
%extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %zero(s64)
110+
%extract2:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %one(s64)
111+
%extract3:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %one(s64)
112112
$x0 = COPY %extract(s64)
113113
$x1 = COPY %extract2(s64)
114114
$x2 = COPY %extract3(s64)
@@ -140,12 +140,12 @@ body: |
140140
; CHECK-NEXT: RET_ReallyLR implicit $x0
141141
%arg1:_(s64) = COPY $x0
142142
%arg2:_(s64) = COPY $x1
143-
%zero:_(s32) = G_CONSTANT i32 0
144-
%one:_(s32) = G_CONSTANT i32 1
145-
%two:_(s32) = G_CONSTANT i32 2
143+
%zero:_(s64) = G_CONSTANT i64 0
144+
%one:_(s64) = G_CONSTANT i64 1
145+
%two:_(s64) = G_CONSTANT i64 2
146146
%bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64)
147-
%extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %zero(s32)
148-
%extract2:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %two(s32)
147+
%extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %zero(s64)
148+
%extract2:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %two(s64)
149149
$x0 = COPY %extract(s64)
150150
$x1 = COPY %extract2(s64)
151151
RET_ReallyLR implicit $x0

llvm/test/CodeGen/AArch64/GlobalISel/combine-extract-vec-elt.mir

Lines changed: 21 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -23,9 +23,9 @@ body: |
2323
; CHECK-NEXT: RET_ReallyLR implicit $x0
2424
%arg1:_(s64) = COPY $x0
2525
%arg2:_(s64) = COPY $x1
26-
%zero:_(s32) = G_CONSTANT i32 0
26+
%zero:_(s64) = G_CONSTANT i64 0
2727
%bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64)
28-
%extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %zero(s32)
28+
%extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %zero(s64)
2929
$x0 = COPY %extract(s64)
3030
RET_ReallyLR implicit $x0
3131
@@ -55,10 +55,10 @@ body: |
5555
; CHECK-NEXT: RET_ReallyLR implicit $x0
5656
%arg1:_(s64) = COPY $x0
5757
%arg2:_(s64) = COPY $x1
58-
%zero:_(s32) = G_CONSTANT i32 0
58+
%zero:_(s64) = G_CONSTANT i64 0
5959
%bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64)
6060
%truncbv:_(<2 x s32>) = G_TRUNC %bv
61-
%extract:_(s32) = G_EXTRACT_VECTOR_ELT %truncbv(<2 x s32>), %zero(s32)
61+
%extract:_(s32) = G_EXTRACT_VECTOR_ELT %truncbv(<2 x s32>), %zero(s64)
6262
%zext:_(s64) = G_ZEXT %extract
6363
$x0 = COPY %zext(s64)
6464
RET_ReallyLR implicit $x0
@@ -87,9 +87,9 @@ body: |
8787
; CHECK-NEXT: RET_ReallyLR implicit $x0
8888
%arg1:_(s64) = COPY $x0
8989
%arg2:_(s64) = COPY $x1
90-
%one:_(s32) = G_CONSTANT i32 1
90+
%one:_(s64) = G_CONSTANT i64 1
9191
%bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64)
92-
%extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %one(s32)
92+
%extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %one(s64)
9393
$x0 = COPY %extract(s64)
9494
RET_ReallyLR implicit $x0
9595
@@ -117,9 +117,9 @@ body: |
117117
; CHECK-NEXT: RET_ReallyLR implicit $x0
118118
%arg1:_(s64) = COPY $x0
119119
%arg2:_(s64) = COPY $x1
120-
%idx:_(s32) = G_CONSTANT i32 4
120+
%idx:_(s64) = G_CONSTANT i64 4
121121
%bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64)
122-
%extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %idx(s32)
122+
%extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %idx(s64)
123123
$x0 = COPY %extract(s64)
124124
RET_ReallyLR implicit $x0
125125
@@ -148,9 +148,9 @@ body: |
148148
; CHECK-NEXT: RET_ReallyLR implicit $w0
149149
%arg1:_(s64) = COPY $x0
150150
%arg2:_(s64) = COPY $x1
151-
%zero:_(s32) = G_CONSTANT i32 0
151+
%zero:_(s64) = G_CONSTANT i64 0
152152
%bv:_(<2 x s32>) = G_BUILD_VECTOR_TRUNC %arg1(s64), %arg2(s64)
153-
%extract:_(s32) = G_EXTRACT_VECTOR_ELT %bv(<2 x s32>), %zero(s32)
153+
%extract:_(s32) = G_EXTRACT_VECTOR_ELT %bv(<2 x s32>), %zero(s64)
154154
$w0 = COPY %extract(s32)
155155
RET_ReallyLR implicit $w0
156156
@@ -175,17 +175,17 @@ body: |
175175
; CHECK-NEXT: {{ $}}
176176
; CHECK-NEXT: %arg1:_(s64) = COPY $x0
177177
; CHECK-NEXT: %arg2:_(s64) = COPY $x1
178-
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
178+
; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
179179
; CHECK-NEXT: %bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64)
180-
; CHECK-NEXT: %extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %zero(s32)
180+
; CHECK-NEXT: %extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %zero(s64)
181181
; CHECK-NEXT: $x0 = COPY %extract(s64)
182182
; CHECK-NEXT: $q0 = COPY %bv(<2 x s64>)
183183
; CHECK-NEXT: RET_ReallyLR implicit $x0
184184
%arg1:_(s64) = COPY $x0
185185
%arg2:_(s64) = COPY $x1
186-
%zero:_(s32) = G_CONSTANT i32 0
186+
%zero:_(s64) = G_CONSTANT i64 0
187187
%bv:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64)
188-
%extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %zero(s32)
188+
%extract:_(s64) = G_EXTRACT_VECTOR_ELT %bv(<2 x s64>), %zero(s64)
189189
$x0 = COPY %extract(s64)
190190
$q0 = COPY %bv(<2 x s64>)
191191
RET_ReallyLR implicit $x0
@@ -214,11 +214,11 @@ body: |
214214
%arg1:_(s64) = COPY $x0
215215
%arg2:_(s64) = COPY $x1
216216
%undef:_(<2 x s64>) = G_IMPLICIT_DEF
217-
%zero:_(s32) = G_CONSTANT i32 0
218-
%one:_(s32) = G_CONSTANT i32 1
219-
%ins1:_(<2 x s64>) = G_INSERT_VECTOR_ELT %undef, %arg1(s64), %zero(s32)
220-
%ins2:_(<2 x s64>) = G_INSERT_VECTOR_ELT %ins1, %arg2(s64), %one(s32)
221-
%extract:_(s64) = G_EXTRACT_VECTOR_ELT %ins2(<2 x s64>), %zero(s32)
217+
%zero:_(s64) = G_CONSTANT i64 0
218+
%one:_(s64) = G_CONSTANT i64 1
219+
%ins1:_(<2 x s64>) = G_INSERT_VECTOR_ELT %undef, %arg1(s64), %zero(s64)
220+
%ins2:_(<2 x s64>) = G_INSERT_VECTOR_ELT %ins1, %arg2(s64), %one(s64)
221+
%extract:_(s64) = G_EXTRACT_VECTOR_ELT %ins2(<2 x s64>), %zero(s64)
222222
$x0 = COPY %extract(s64)
223223
RET_ReallyLR implicit $x0
224224
@@ -241,8 +241,8 @@ body: |
241241
; CHECK-NEXT: $x0 = COPY %extract(s64)
242242
; CHECK-NEXT: RET_ReallyLR implicit $x0
243243
%vec:_(<2 x s64>) = COPY $q0
244-
%idx:_(s32) = G_CONSTANT i32 -2
245-
%extract:_(s64) = G_EXTRACT_VECTOR_ELT %vec(<2 x s64>), %idx(s32)
244+
%idx:_(s64) = G_CONSTANT i64 -2
245+
%extract:_(s64) = G_EXTRACT_VECTOR_ELT %vec(<2 x s64>), %idx(s64)
246246
$x0 = COPY %extract(s64)
247247
RET_ReallyLR implicit $x0
248248

llvm/test/CodeGen/AArch64/GlobalISel/combine-icmp-to-lhs-known-bits.mir

Lines changed: 15 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -129,25 +129,28 @@ body: |
129129
130130
; CHECK-LABEL: name: dont_apply_vector
131131
; CHECK: liveins: $x0
132-
; CHECK: %x:_(<2 x s32>) = COPY $x0
133-
; CHECK: %one:_(s32) = G_CONSTANT i32 1
134-
; CHECK: %one_vec:_(<2 x s32>) = G_BUILD_VECTOR %one(s32), %one(s32)
135-
; CHECK: %vec_and:_(<2 x s32>) = G_AND %x, %one_vec
136-
; CHECK: %zero:_(s32) = G_CONSTANT i32 0
137-
; CHECK: %zero_vec:_(<2 x s32>) = G_BUILD_VECTOR %zero(s32), %zero(s32)
138-
; CHECK: %cmp:_(<2 x s1>) = G_ICMP intpred(ne), %vec_and(<2 x s32>), %zero_vec
139-
; CHECK: %elt:_(s1) = G_EXTRACT_VECTOR_ELT %cmp(<2 x s1>), %zero(s32)
140-
; CHECK: %ext:_(s32) = G_ZEXT %elt(s1)
141-
; CHECK: $w0 = COPY %ext(s32)
142-
; CHECK: RET_ReallyLR implicit $w0
132+
; CHECK-NEXT: {{ $}}
133+
; CHECK-NEXT: %x:_(<2 x s32>) = COPY $x0
134+
; CHECK-NEXT: %one:_(s32) = G_CONSTANT i32 1
135+
; CHECK-NEXT: %one_vec:_(<2 x s32>) = G_BUILD_VECTOR %one(s32), %one(s32)
136+
; CHECK-NEXT: %vec_and:_(<2 x s32>) = G_AND %x, %one_vec
137+
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
138+
; CHECK-NEXT: %zero64:_(s64) = G_CONSTANT i64 0
139+
; CHECK-NEXT: %zero_vec:_(<2 x s32>) = G_BUILD_VECTOR %zero(s32), %zero(s32)
140+
; CHECK-NEXT: %cmp:_(<2 x s1>) = G_ICMP intpred(ne), %vec_and(<2 x s32>), %zero_vec
141+
; CHECK-NEXT: %elt:_(s1) = G_EXTRACT_VECTOR_ELT %cmp(<2 x s1>), %zero64(s64)
142+
; CHECK-NEXT: %ext:_(s32) = G_ZEXT %elt(s1)
143+
; CHECK-NEXT: $w0 = COPY %ext(s32)
144+
; CHECK-NEXT: RET_ReallyLR implicit $w0
143145
%x:_(<2 x s32>) = COPY $x0
144146
%one:_(s32) = G_CONSTANT i32 1
145147
%one_vec:_(<2 x s32>) = G_BUILD_VECTOR %one, %one
146148
%vec_and:_(<2 x s32>) = G_AND %x, %one_vec
147149
%zero:_(s32) = G_CONSTANT i32 0
150+
%zero64:_(s64) = G_CONSTANT i64 0
148151
%zero_vec:_(<2 x s32>) = G_BUILD_VECTOR %zero, %zero
149152
%cmp:_(<2 x s1>) = G_ICMP intpred(ne), %vec_and(<2 x s32>), %zero_vec
150-
%elt:_(s1) = G_EXTRACT_VECTOR_ELT %cmp, %zero
153+
%elt:_(s1) = G_EXTRACT_VECTOR_ELT %cmp, %zero64
151154
%ext:_(s32) = G_ZEXT %elt(s1)
152155
$w0 = COPY %ext(s32)
153156
RET_ReallyLR implicit $w0

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