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[SLP]Insert vector instruction after landingpad
If the node must be emitted in the landingpad block, need to insert the instructions after the landingpad instruction to avoid a crash. Fixes #135781
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2 files changed

+82
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llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16010,8 +16010,12 @@ void BoUpSLP::setInsertPointAfterBundle(const TreeEntry *E) {
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BasicBlock::iterator LastInstIt = LastInst->getIterator();
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// If the instruction is PHI, set the insert point after all the PHIs.
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bool IsPHI = isa<PHINode>(LastInst);
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if (IsPHI)
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if (IsPHI) {
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LastInstIt = LastInst->getParent()->getFirstNonPHIIt();
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if (LastInstIt != LastInst->getParent()->end() &&
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LastInstIt->getParent()->isLandingPad())
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LastInstIt = std::next(LastInstIt);
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}
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if (IsPHI ||
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(!E->isGather() && E->State != TreeEntry::SplitVectorize &&
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doesNotNeedToSchedule(E->Scalars)) ||
Lines changed: 77 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,77 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -slp-threshold=-9999 < %s | FileCheck %s
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define void @test(i32 %arg) personality ptr null {
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; CHECK-LABEL: define void @test(
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; CHECK-SAME: i32 [[ARG:%.*]]) personality ptr null {
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; CHECK-NEXT: [[BB:.*]]:
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; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr addrspace(3) null, align 4
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; CHECK-NEXT: [[LOAD1:%.*]] = load i32, ptr addrspace(3) null, align 4
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; CHECK-NEXT: [[LOAD2:%.*]] = load i32, ptr addrspace(3) null, align 4
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; CHECK-NEXT: [[LOAD3:%.*]] = load i32, ptr addrspace(3) null, align 4
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; CHECK-NEXT: [[INVOKE:%.*]] = invoke i32 null(ptr addrspace(1) null, i32 0)
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; CHECK-NEXT: to label %[[BB4:.*]] unwind label %[[BB5:.*]]
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; CHECK: [[BB4]]:
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; CHECK-NEXT: ret void
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; CHECK: [[BB5]]:
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; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ 0, %[[BB]] ]
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; CHECK-NEXT: [[PHI6:%.*]] = phi i32 [ 0, %[[BB]] ]
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; CHECK-NEXT: [[PHI7:%.*]] = phi i32 [ 0, %[[BB]] ]
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; CHECK-NEXT: [[PHI8:%.*]] = phi i32 [ 0, %[[BB]] ]
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; CHECK-NEXT: [[LANDINGPAD:%.*]] = landingpad { ptr, i32 }
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; CHECK-NEXT: cleanup
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; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> poison, i32 [[LOAD]], i32 0
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[LOAD1]], i32 1
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; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[LOAD3]], i32 2
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; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[LOAD2]], i32 3
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; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[PHI]], i32 0
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; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> [[TMP4]], i32 [[PHI8]], i32 1
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; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[PHI6]], i32 2
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; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[PHI7]], i32 3
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; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <4 x i32> [[TMP3]], <4 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
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; CHECK-NEXT: [[TMP9:%.*]] = call <8 x i32> @llvm.vector.insert.v8i32.v4i32(<8 x i32> [[TMP8]], <4 x i32> [[TMP7]], i64 4)
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; CHECK-NEXT: br label %[[BB11:.*]]
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; CHECK: [[BB9:.*]]:
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; CHECK-NEXT: [[LANDINGPAD10:%.*]] = landingpad { ptr, i32 }
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; CHECK-NEXT: cleanup
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; CHECK-NEXT: br label %[[BB11]]
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; CHECK: [[BB11]]:
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; CHECK-NEXT: [[TMP10:%.*]] = phi <8 x i32> [ poison, %[[BB9]] ], [ [[TMP9]], %[[BB5]] ]
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; CHECK-NEXT: ret void
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;
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bb:
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%load = load i32, ptr addrspace(3) null, align 4
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%load1 = load i32, ptr addrspace(3) null, align 4
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%load2 = load i32, ptr addrspace(3) null, align 4
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%load3 = load i32, ptr addrspace(3) null, align 4
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%invoke = invoke i32 null(ptr addrspace(1) null, i32 0)
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to label %bb4 unwind label %bb5
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bb4: ; preds = %bb
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ret void
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bb5: ; preds = %bb
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%phi = phi i32 [ 0, %bb ]
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%phi6 = phi i32 [ 0, %bb ]
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%phi7 = phi i32 [ 0, %bb ]
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%phi8 = phi i32 [ 0, %bb ]
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%landingpad = landingpad { ptr, i32 }
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cleanup
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br label %bb11
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bb9: ; No predecessors!
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%landingpad10 = landingpad { ptr, i32 }
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cleanup
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br label %bb11
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bb11: ; preds = %bb9, %bb5
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%phi12 = phi i32 [ 0, %bb9 ], [ %phi, %bb5 ]
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%phi13 = phi i32 [ 0, %bb9 ], [ %phi8, %bb5 ]
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%phi14 = phi i32 [ 0, %bb9 ], [ %phi6, %bb5 ]
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%phi15 = phi i32 [ %arg, %bb9 ], [ %phi7, %bb5 ]
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%phi16 = phi i32 [ 0, %bb9 ], [ %load, %bb5 ]
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%phi17 = phi i32 [ 0, %bb9 ], [ %load1, %bb5 ]
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%phi18 = phi i32 [ %arg, %bb9 ], [ %load2, %bb5 ]
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%phi19 = phi i32 [ 0, %bb9 ], [ %load3, %bb5 ]
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ret void
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}

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