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[InstCombine] Add back comments. NFC.
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llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

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@@ -2637,6 +2637,7 @@ Instruction *InstCombinerImpl::visitAnd(BinaryOperator &I) {
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// This is a generous interpretation for noimplicitfloat, this is not a true
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// floating-point operation.
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//
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// Assumes any IEEE-represented type has the sign bit in the high bit.
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// TODO: Unify with APInt matcher. This version allows undef unlike m_APInt
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Value *CastOp;
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if (match(Op0, m_ElementWiseBitCast(m_Value(CastOp))) &&
@@ -4047,6 +4048,8 @@ Instruction *InstCombinerImpl::visitOr(BinaryOperator &I) {
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// the number of instructions. This is still probably a better canonical form
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// as it enables FP value tracking.
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//
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// Assumes any IEEE-represented type has the sign bit in the high bit.
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//
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// This is generous interpretation of noimplicitfloat, this is not a true
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// floating-point operation.
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Value *CastOp;
@@ -4850,6 +4853,7 @@ Instruction *InstCombinerImpl::visitXor(BinaryOperator &I) {
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// This is generous interpretation of noimplicitfloat, this is not a true
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// floating-point operation.
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//
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// Assumes any IEEE-represented type has the sign bit in the high bit.
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// TODO: Unify with APInt matcher. This version allows undef unlike m_APInt
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Value *CastOp;
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if (match(Op0, m_ElementWiseBitCast(m_Value(CastOp))) &&

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