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[RISCV] Move OrderedExtensionMap typedef to RISCVISAUtils.h. NFC
1 parent 2e5035a commit de375fb

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7 files changed

+47
-56
lines changed

7 files changed

+47
-56
lines changed

‎clang/lib/Driver/ToolChains/Gnu.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1796,9 +1796,7 @@ selectRISCVMultilib(const MultilibSet &RISCVMultilibSet, StringRef Arch,
17961796
}
17971797
auto &MLConfigISAInfo = *MLConfigParseResult;
17981798

1799-
const llvm::RISCVISAInfo::OrderedExtensionMap &MLConfigArchExts =
1800-
MLConfigISAInfo->getExtensions();
1801-
for (auto MLConfigArchExt : MLConfigArchExts) {
1799+
for (auto &MLConfigArchExt : MLConfigISAInfo->getExtensions()) {
18021800
auto ExtName = MLConfigArchExt.first;
18031801
NewMultilib.flag(Twine("-", ExtName).str());
18041802

‎lld/ELF/Arch/RISCV.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1057,7 +1057,7 @@ class RISCVAttributesSection final : public SyntheticSection {
10571057
};
10581058
} // namespace
10591059

1060-
static void mergeArch(RISCVISAInfo::OrderedExtensionMap &mergedExts,
1060+
static void mergeArch(RISCVISAUtils::OrderedExtensionMap &mergedExts,
10611061
unsigned &mergedXlen, const InputSectionBase *sec,
10621062
StringRef s) {
10631063
auto maybeInfo = RISCVISAInfo::parseNormalizedArchString(s);
@@ -1086,7 +1086,7 @@ static void mergeArch(RISCVISAInfo::OrderedExtensionMap &mergedExts,
10861086

10871087
static RISCVAttributesSection *
10881088
mergeAttributesSection(const SmallVector<InputSectionBase *, 0> &sections) {
1089-
RISCVISAInfo::OrderedExtensionMap exts;
1089+
RISCVISAUtils::OrderedExtensionMap exts;
10901090
const InputSectionBase *firstStackAlign = nullptr;
10911091
unsigned firstStackAlignValue = 0, xlen = 0;
10921092
bool hasArch = false;

‎llvm/include/llvm/Support/RISCVISAUtils.h

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@
1414
#define LLVM_SUPPORT_RISCVISAUTILS_H
1515

1616
#include "llvm/ADT/StringRef.h"
17+
#include <map>
1718
#include <string>
1819

1920
namespace llvm {
@@ -35,6 +36,12 @@ struct ExtensionComparator {
3536
return compareExtension(LHS, RHS);
3637
}
3738
};
39+
40+
/// OrderedExtensionMap is std::map, it's specialized to keep entries
41+
/// in canonical order of extension.
42+
typedef std::map<std::string, ExtensionVersion, ExtensionComparator>
43+
OrderedExtensionMap;
44+
3845
} // namespace RISCVISAUtils
3946

4047
} // namespace llvm

‎llvm/include/llvm/TargetParser/RISCVISAInfo.h

Lines changed: 5 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -26,13 +26,7 @@ class RISCVISAInfo {
2626
RISCVISAInfo(const RISCVISAInfo &) = delete;
2727
RISCVISAInfo &operator=(const RISCVISAInfo &) = delete;
2828

29-
/// OrderedExtensionMap is std::map, it's specialized to keep entries
30-
/// in canonical order of extension.
31-
typedef std::map<std::string, RISCVISAUtils::ExtensionVersion,
32-
RISCVISAUtils::ExtensionComparator>
33-
OrderedExtensionMap;
34-
35-
RISCVISAInfo(unsigned XLen, OrderedExtensionMap &Exts)
29+
RISCVISAInfo(unsigned XLen, RISCVISAUtils::OrderedExtensionMap &Exts)
3630
: XLen(XLen), FLen(0), MinVLen(0), MaxELen(0), MaxELenFp(0), Exts(Exts) {}
3731

3832
/// Parse RISC-V ISA info from arch string.
@@ -59,7 +53,9 @@ class RISCVISAInfo {
5953
std::vector<std::string> toFeatures(bool AddAllExtensions = false,
6054
bool IgnoreUnknown = true) const;
6155

62-
const OrderedExtensionMap &getExtensions() const { return Exts; }
56+
const RISCVISAUtils::OrderedExtensionMap &getExtensions() const {
57+
return Exts;
58+
}
6359

6460
unsigned getXLen() const { return XLen; }
6561
unsigned getFLen() const { return FLen; }
@@ -90,7 +86,7 @@ class RISCVISAInfo {
9086
unsigned MinVLen;
9187
unsigned MaxELen, MaxELenFp;
9288

93-
OrderedExtensionMap Exts;
89+
RISCVISAUtils::OrderedExtensionMap Exts;
9490

9591
void addExtension(StringRef ExtName, RISCVISAUtils::ExtensionVersion Version);
9692

‎llvm/lib/TargetParser/RISCVISAInfo.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -112,7 +112,7 @@ void llvm::riscvExtensionsHelp(StringMap<StringRef> DescMap) {
112112
outs() << "All available -march extensions for RISC-V\n\n";
113113
PrintExtension("Name", "Version", (DescMap.empty() ? "" : "Description"));
114114

115-
RISCVISAInfo::OrderedExtensionMap ExtMap;
115+
RISCVISAUtils::OrderedExtensionMap ExtMap;
116116
for (const auto &E : SupportedExtensions)
117117
ExtMap[E.Name] = {E.Version.Major, E.Version.Minor};
118118
for (const auto &E : ExtMap) {

‎llvm/unittests/TargetParser/RISCVISAInfoTest.cpp

Lines changed: 30 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -137,7 +137,7 @@ TEST(ParseArchString, AcceptsSupportedBaseISAsAndSetsXLenAndFLen) {
137137
auto MaybeRV32I = RISCVISAInfo::parseArchString("rv32i", true);
138138
ASSERT_THAT_EXPECTED(MaybeRV32I, Succeeded());
139139
RISCVISAInfo &InfoRV32I = **MaybeRV32I;
140-
RISCVISAInfo::OrderedExtensionMap ExtsRV32I = InfoRV32I.getExtensions();
140+
const auto &ExtsRV32I = InfoRV32I.getExtensions();
141141
EXPECT_EQ(ExtsRV32I.size(), 1UL);
142142
EXPECT_TRUE(ExtsRV32I.at("i") == (RISCVISAUtils::ExtensionVersion{2, 1}));
143143
EXPECT_EQ(InfoRV32I.getXLen(), 32U);
@@ -146,7 +146,7 @@ TEST(ParseArchString, AcceptsSupportedBaseISAsAndSetsXLenAndFLen) {
146146
auto MaybeRV32E = RISCVISAInfo::parseArchString("rv32e", true);
147147
ASSERT_THAT_EXPECTED(MaybeRV32E, Succeeded());
148148
RISCVISAInfo &InfoRV32E = **MaybeRV32E;
149-
RISCVISAInfo::OrderedExtensionMap ExtsRV32E = InfoRV32E.getExtensions();
149+
const auto &ExtsRV32E = InfoRV32E.getExtensions();
150150
EXPECT_EQ(ExtsRV32E.size(), 1UL);
151151
EXPECT_TRUE(ExtsRV32E.at("e") == (RISCVISAUtils::ExtensionVersion{2, 0}));
152152
EXPECT_EQ(InfoRV32E.getXLen(), 32U);
@@ -155,7 +155,7 @@ TEST(ParseArchString, AcceptsSupportedBaseISAsAndSetsXLenAndFLen) {
155155
auto MaybeRV32G = RISCVISAInfo::parseArchString("rv32g", true);
156156
ASSERT_THAT_EXPECTED(MaybeRV32G, Succeeded());
157157
RISCVISAInfo &InfoRV32G = **MaybeRV32G;
158-
RISCVISAInfo::OrderedExtensionMap ExtsRV32G = InfoRV32G.getExtensions();
158+
const auto &ExtsRV32G = InfoRV32G.getExtensions();
159159
EXPECT_EQ(ExtsRV32G.size(), 7UL);
160160
EXPECT_TRUE(ExtsRV32G.at("i") == (RISCVISAUtils::ExtensionVersion{2, 1}));
161161
EXPECT_TRUE(ExtsRV32G.at("m") == (RISCVISAUtils::ExtensionVersion{2, 0}));
@@ -171,7 +171,7 @@ TEST(ParseArchString, AcceptsSupportedBaseISAsAndSetsXLenAndFLen) {
171171
auto MaybeRV64I = RISCVISAInfo::parseArchString("rv64i", true);
172172
ASSERT_THAT_EXPECTED(MaybeRV64I, Succeeded());
173173
RISCVISAInfo &InfoRV64I = **MaybeRV64I;
174-
RISCVISAInfo::OrderedExtensionMap ExtsRV64I = InfoRV64I.getExtensions();
174+
const auto &ExtsRV64I = InfoRV64I.getExtensions();
175175
EXPECT_EQ(ExtsRV64I.size(), 1UL);
176176
EXPECT_TRUE(ExtsRV64I.at("i") == (RISCVISAUtils::ExtensionVersion{2, 1}));
177177
EXPECT_EQ(InfoRV64I.getXLen(), 64U);
@@ -180,7 +180,7 @@ TEST(ParseArchString, AcceptsSupportedBaseISAsAndSetsXLenAndFLen) {
180180
auto MaybeRV64E = RISCVISAInfo::parseArchString("rv64e", true);
181181
ASSERT_THAT_EXPECTED(MaybeRV64E, Succeeded());
182182
RISCVISAInfo &InfoRV64E = **MaybeRV64E;
183-
RISCVISAInfo::OrderedExtensionMap ExtsRV64E = InfoRV64E.getExtensions();
183+
const auto &ExtsRV64E = InfoRV64E.getExtensions();
184184
EXPECT_EQ(ExtsRV64E.size(), 1UL);
185185
EXPECT_TRUE(ExtsRV64E.at("e") == (RISCVISAUtils::ExtensionVersion{2, 0}));
186186
EXPECT_EQ(InfoRV64E.getXLen(), 64U);
@@ -189,7 +189,7 @@ TEST(ParseArchString, AcceptsSupportedBaseISAsAndSetsXLenAndFLen) {
189189
auto MaybeRV64G = RISCVISAInfo::parseArchString("rv64g", true);
190190
ASSERT_THAT_EXPECTED(MaybeRV64G, Succeeded());
191191
RISCVISAInfo &InfoRV64G = **MaybeRV64G;
192-
RISCVISAInfo::OrderedExtensionMap ExtsRV64G = InfoRV64G.getExtensions();
192+
const auto &ExtsRV64G = InfoRV64G.getExtensions();
193193
EXPECT_EQ(ExtsRV64G.size(), 7UL);
194194
EXPECT_TRUE(ExtsRV64G.at("i") == (RISCVISAUtils::ExtensionVersion{2, 1}));
195195
EXPECT_TRUE(ExtsRV64G.at("m") == (RISCVISAUtils::ExtensionVersion{2, 0}));
@@ -241,7 +241,7 @@ TEST(ParseArchString, IgnoresUnrecognizedExtensionNamesWithIgnoreUnknown) {
241241
auto MaybeISAInfo = RISCVISAInfo::parseArchString(Input, true, false, true);
242242
ASSERT_THAT_EXPECTED(MaybeISAInfo, Succeeded());
243243
RISCVISAInfo &Info = **MaybeISAInfo;
244-
RISCVISAInfo::OrderedExtensionMap Exts = Info.getExtensions();
244+
const auto &Exts = Info.getExtensions();
245245
EXPECT_EQ(Exts.size(), 1UL);
246246
EXPECT_TRUE(Exts.at("i") == (RISCVISAUtils::ExtensionVersion{2, 1}));
247247
}
@@ -251,21 +251,21 @@ TEST(ParseArchString, IgnoresUnrecognizedExtensionNamesWithIgnoreUnknown) {
251251
auto MaybeISAInfo =
252252
RISCVISAInfo::parseArchString("rv32i_zbc1p0_xmadeup", true, false, true);
253253
ASSERT_THAT_EXPECTED(MaybeISAInfo, Succeeded());
254-
RISCVISAInfo::OrderedExtensionMap Exts = (*MaybeISAInfo)->getExtensions();
254+
const auto &Exts = (*MaybeISAInfo)->getExtensions();
255255
EXPECT_TRUE(Exts.at("zbc") == (RISCVISAUtils::ExtensionVersion{1, 0}));
256256
}
257257

258258
TEST(ParseArchString, AcceptsVersionInLongOrShortForm) {
259259
for (StringRef Input : {"rv64i2p1"}) {
260260
auto MaybeISAInfo = RISCVISAInfo::parseArchString(Input, true);
261261
ASSERT_THAT_EXPECTED(MaybeISAInfo, Succeeded());
262-
RISCVISAInfo::OrderedExtensionMap Exts = (*MaybeISAInfo)->getExtensions();
262+
const auto &Exts = (*MaybeISAInfo)->getExtensions();
263263
EXPECT_TRUE(Exts.at("i") == (RISCVISAUtils::ExtensionVersion{2, 1}));
264264
}
265265
for (StringRef Input : {"rv32i_zfinx1", "rv32i_zfinx1p0"}) {
266266
auto MaybeISAInfo = RISCVISAInfo::parseArchString(Input, true);
267267
ASSERT_THAT_EXPECTED(MaybeISAInfo, Succeeded());
268-
RISCVISAInfo::OrderedExtensionMap Exts = (*MaybeISAInfo)->getExtensions();
268+
const auto &Exts = (*MaybeISAInfo)->getExtensions();
269269
EXPECT_TRUE(Exts.at("zfinx") == (RISCVISAUtils::ExtensionVersion{1, 0}));
270270
}
271271
}
@@ -293,14 +293,14 @@ TEST(ParseArchString,
293293
for (StringRef Input : {"rv32i0p1", "rv32i99p99", "rv64i0p1", "rv64i99p99"}) {
294294
auto MaybeISAInfo = RISCVISAInfo::parseArchString(Input, true, false, true);
295295
ASSERT_THAT_EXPECTED(MaybeISAInfo, Succeeded());
296-
RISCVISAInfo::OrderedExtensionMap Exts = (*MaybeISAInfo)->getExtensions();
296+
const auto &Exts = (*MaybeISAInfo)->getExtensions();
297297
EXPECT_EQ(Exts.size(), 1UL);
298298
EXPECT_TRUE(Exts.at("i") == (RISCVISAUtils::ExtensionVersion{2, 1}));
299299
}
300300
for (StringRef Input : {"rv32e0p1", "rv32e99p99", "rv64e0p1", "rv64e99p99"}) {
301301
auto MaybeISAInfo = RISCVISAInfo::parseArchString(Input, true, false, true);
302302
ASSERT_THAT_EXPECTED(MaybeISAInfo, Succeeded());
303-
RISCVISAInfo::OrderedExtensionMap Exts = (*MaybeISAInfo)->getExtensions();
303+
const auto &Exts = (*MaybeISAInfo)->getExtensions();
304304
EXPECT_EQ(Exts.size(), 1UL);
305305
EXPECT_TRUE(Exts.at("e") == (RISCVISAUtils::ExtensionVersion{2, 0}));
306306
}
@@ -311,7 +311,7 @@ TEST(ParseArchString,
311311
for (StringRef Input : {"rv32im1p1", "rv64i_svnapot10p9", "rv32i_zicsr0p5"}) {
312312
auto MaybeISAInfo = RISCVISAInfo::parseArchString(Input, true, false, true);
313313
ASSERT_THAT_EXPECTED(MaybeISAInfo, Succeeded());
314-
RISCVISAInfo::OrderedExtensionMap Exts = (*MaybeISAInfo)->getExtensions();
314+
const auto &Exts = (*MaybeISAInfo)->getExtensions();
315315
EXPECT_EQ(Exts.size(), 1UL);
316316
EXPECT_TRUE(Exts.at("i") == (RISCVISAUtils::ExtensionVersion{2, 1}));
317317
}
@@ -321,7 +321,7 @@ TEST(ParseArchString, AcceptsUnderscoreSplittingExtensions) {
321321
for (StringRef Input : {"rv32imafdczifencei", "rv32i_m_a_f_d_c_zifencei"}) {
322322
auto MaybeISAInfo = RISCVISAInfo::parseArchString(Input, true);
323323
ASSERT_THAT_EXPECTED(MaybeISAInfo, Succeeded());
324-
RISCVISAInfo::OrderedExtensionMap Exts = (*MaybeISAInfo)->getExtensions();
324+
const auto &Exts = (*MaybeISAInfo)->getExtensions();
325325
EXPECT_EQ(Exts.size(), 8UL);
326326
EXPECT_EQ(Exts.count("i"), 1U);
327327
EXPECT_EQ(Exts.count("m"), 1U);
@@ -339,7 +339,7 @@ TEST(ParseArchString, AcceptsRelaxSingleLetterExtensions) {
339339
{"rv32imfad", "rv32im_fa_d", "rv32im2p0fad", "rv32i2p1m2p0fad"}) {
340340
auto MaybeISAInfo = RISCVISAInfo::parseArchString(Input, true);
341341
ASSERT_THAT_EXPECTED(MaybeISAInfo, Succeeded());
342-
RISCVISAInfo::OrderedExtensionMap Exts = (*MaybeISAInfo)->getExtensions();
342+
const auto &Exts = (*MaybeISAInfo)->getExtensions();
343343
EXPECT_EQ(Exts.size(), 6UL);
344344
EXPECT_EQ(Exts.count("i"), 1U);
345345
EXPECT_EQ(Exts.count("m"), 1U);
@@ -356,7 +356,7 @@ TEST(ParseArchString, AcceptsRelaxMixedLetterExtensions) {
356356
"rv32i_zihintntl_mafd_svinval"}) {
357357
auto MaybeISAInfo = RISCVISAInfo::parseArchString(Input, true);
358358
ASSERT_THAT_EXPECTED(MaybeISAInfo, Succeeded());
359-
RISCVISAInfo::OrderedExtensionMap Exts = (*MaybeISAInfo)->getExtensions();
359+
const auto &Exts = (*MaybeISAInfo)->getExtensions();
360360
EXPECT_EQ(Exts.size(), 8UL);
361361
EXPECT_EQ(Exts.count("i"), 1U);
362362
EXPECT_EQ(Exts.count("m"), 1U);
@@ -373,7 +373,7 @@ TEST(ParseArchString, AcceptsAmbiguousFromRelaxExtensions) {
373373
for (StringRef Input : {"rv32i_zba_m", "rv32izba_m", "rv32izba1p0_m2p0"}) {
374374
auto MaybeISAInfo = RISCVISAInfo::parseArchString(Input, true);
375375
ASSERT_THAT_EXPECTED(MaybeISAInfo, Succeeded());
376-
RISCVISAInfo::OrderedExtensionMap Exts = (*MaybeISAInfo)->getExtensions();
376+
const auto &Exts = (*MaybeISAInfo)->getExtensions();
377377
EXPECT_EQ(Exts.size(), 3UL);
378378
EXPECT_EQ(Exts.count("i"), 1U);
379379
EXPECT_EQ(Exts.count("zba"), 1U);
@@ -383,7 +383,7 @@ TEST(ParseArchString, AcceptsAmbiguousFromRelaxExtensions) {
383383
{"rv32ia_zba_m", "rv32iazba_m", "rv32ia2p1zba1p0_m2p0"}) {
384384
auto MaybeISAInfo = RISCVISAInfo::parseArchString(Input, true);
385385
ASSERT_THAT_EXPECTED(MaybeISAInfo, Succeeded());
386-
RISCVISAInfo::OrderedExtensionMap Exts = (*MaybeISAInfo)->getExtensions();
386+
const auto &Exts = (*MaybeISAInfo)->getExtensions();
387387
EXPECT_EQ(Exts.size(), 4UL);
388388
EXPECT_EQ(Exts.count("i"), 1U);
389389
EXPECT_EQ(Exts.count("zba"), 1U);
@@ -457,12 +457,12 @@ TEST(ParseArchString,
457457
// hopefully serve as a reminder to update.
458458
auto MaybeISAInfo = RISCVISAInfo::parseArchString("rv64iztso", true, false);
459459
ASSERT_THAT_EXPECTED(MaybeISAInfo, Succeeded());
460-
RISCVISAInfo::OrderedExtensionMap Exts = (*MaybeISAInfo)->getExtensions();
460+
const auto &Exts = (*MaybeISAInfo)->getExtensions();
461461
EXPECT_EQ(Exts.size(), 2UL);
462462
EXPECT_EQ(Exts.count("ztso"), 1U);
463463
auto MaybeISAInfo2 = RISCVISAInfo::parseArchString("rv64iztso0p1", true);
464464
ASSERT_THAT_EXPECTED(MaybeISAInfo2, Succeeded());
465-
RISCVISAInfo::OrderedExtensionMap Exts2 = (*MaybeISAInfo2)->getExtensions();
465+
const auto &Exts2 = (*MaybeISAInfo2)->getExtensions();
466466
EXPECT_EQ(Exts2.size(), 2UL);
467467
EXPECT_EQ(Exts2.count("ztso"), 1U);
468468
}
@@ -479,7 +479,7 @@ TEST(ParseArchString,
479479
auto MaybeISAInfo =
480480
RISCVISAInfo::parseArchString("rv64iztso9p9", true, false);
481481
ASSERT_THAT_EXPECTED(MaybeISAInfo, Succeeded());
482-
RISCVISAInfo::OrderedExtensionMap Exts = (*MaybeISAInfo)->getExtensions();
482+
const auto &Exts = (*MaybeISAInfo)->getExtensions();
483483
EXPECT_EQ(Exts.size(), 2UL);
484484
EXPECT_TRUE(Exts.at("ztso") == (RISCVISAUtils::ExtensionVersion{9, 9}));
485485
}
@@ -502,8 +502,7 @@ TEST(ParseArchString, AddsImpliedExtensions) {
502502
// Does not attempt to exhaustively test all implications.
503503
auto MaybeRV64ID = RISCVISAInfo::parseArchString("rv64id", true);
504504
ASSERT_THAT_EXPECTED(MaybeRV64ID, Succeeded());
505-
RISCVISAInfo::OrderedExtensionMap ExtsRV64ID =
506-
(*MaybeRV64ID)->getExtensions();
505+
const auto &ExtsRV64ID = (*MaybeRV64ID)->getExtensions();
507506
EXPECT_EQ(ExtsRV64ID.size(), 4UL);
508507
EXPECT_EQ(ExtsRV64ID.count("i"), 1U);
509508
EXPECT_EQ(ExtsRV64ID.count("f"), 1U);
@@ -512,8 +511,7 @@ TEST(ParseArchString, AddsImpliedExtensions) {
512511

513512
auto MaybeRV32IZKN = RISCVISAInfo::parseArchString("rv64izkn", true);
514513
ASSERT_THAT_EXPECTED(MaybeRV32IZKN, Succeeded());
515-
RISCVISAInfo::OrderedExtensionMap ExtsRV32IZKN =
516-
(*MaybeRV32IZKN)->getExtensions();
514+
const auto &ExtsRV32IZKN = (*MaybeRV32IZKN)->getExtensions();
517515
EXPECT_EQ(ExtsRV32IZKN.size(), 8UL);
518516
EXPECT_EQ(ExtsRV32IZKN.count("i"), 1U);
519517
EXPECT_EQ(ExtsRV32IZKN.count("zbkb"), 1U);
@@ -603,7 +601,7 @@ TEST(ToFeatures, AddAllExtensionsAddsNegativeExtensions) {
603601
}
604602

605603
TEST(OrderedExtensionMap, ExtensionsAreCorrectlyOrdered) {
606-
RISCVISAInfo::OrderedExtensionMap Exts;
604+
RISCVISAUtils::OrderedExtensionMap Exts;
607605
for (auto ExtName : {"y", "l", "m", "c", "i", "xfoo", "xbar", "sfoo", "sbar",
608606
"zmfoo", "zzfoo", "zfinx", "zicsr"})
609607
Exts[ExtName] = {1, 0};
@@ -621,8 +619,7 @@ TEST(OrderedExtensionMap, ExtensionsAreCorrectlyOrdered) {
621619
TEST(ParseArchString, ZceImplication) {
622620
auto MaybeRV32IZce = RISCVISAInfo::parseArchString("rv32izce", true);
623621
ASSERT_THAT_EXPECTED(MaybeRV32IZce, Succeeded());
624-
RISCVISAInfo::OrderedExtensionMap ExtsRV32IZce =
625-
(*MaybeRV32IZce)->getExtensions();
622+
const auto &ExtsRV32IZce = (*MaybeRV32IZce)->getExtensions();
626623
EXPECT_EQ(ExtsRV32IZce.size(), 7UL);
627624
EXPECT_EQ(ExtsRV32IZce.count("i"), 1U);
628625
EXPECT_EQ(ExtsRV32IZce.count("zicsr"), 1U);
@@ -634,8 +631,7 @@ TEST(ParseArchString, ZceImplication) {
634631

635632
auto MaybeRV32IFZce = RISCVISAInfo::parseArchString("rv32ifzce", true);
636633
ASSERT_THAT_EXPECTED(MaybeRV32IFZce, Succeeded());
637-
RISCVISAInfo::OrderedExtensionMap ExtsRV32IFZce =
638-
(*MaybeRV32IFZce)->getExtensions();
634+
const auto &ExtsRV32IFZce = (*MaybeRV32IFZce)->getExtensions();
639635
EXPECT_EQ(ExtsRV32IFZce.size(), 9UL);
640636
EXPECT_EQ(ExtsRV32IFZce.count("i"), 1U);
641637
EXPECT_EQ(ExtsRV32IFZce.count("zicsr"), 1U);
@@ -649,8 +645,7 @@ TEST(ParseArchString, ZceImplication) {
649645

650646
auto MaybeRV32IDZce = RISCVISAInfo::parseArchString("rv32idzce", true);
651647
ASSERT_THAT_EXPECTED(MaybeRV32IDZce, Succeeded());
652-
RISCVISAInfo::OrderedExtensionMap ExtsRV32IDZce =
653-
(*MaybeRV32IDZce)->getExtensions();
648+
const auto &ExtsRV32IDZce = (*MaybeRV32IDZce)->getExtensions();
654649
EXPECT_EQ(ExtsRV32IDZce.size(), 10UL);
655650
EXPECT_EQ(ExtsRV32IDZce.count("i"), 1U);
656651
EXPECT_EQ(ExtsRV32IDZce.count("zicsr"), 1U);
@@ -665,8 +660,7 @@ TEST(ParseArchString, ZceImplication) {
665660

666661
auto MaybeRV64IZce = RISCVISAInfo::parseArchString("rv64izce", true);
667662
ASSERT_THAT_EXPECTED(MaybeRV64IZce, Succeeded());
668-
RISCVISAInfo::OrderedExtensionMap ExtsRV64IZce =
669-
(*MaybeRV64IZce)->getExtensions();
663+
const auto &ExtsRV64IZce = (*MaybeRV64IZce)->getExtensions();
670664
EXPECT_EQ(ExtsRV64IZce.size(), 7UL);
671665
EXPECT_EQ(ExtsRV64IZce.count("i"), 1U);
672666
EXPECT_EQ(ExtsRV64IZce.count("zicsr"), 1U);
@@ -678,8 +672,7 @@ TEST(ParseArchString, ZceImplication) {
678672

679673
auto MaybeRV64IFZce = RISCVISAInfo::parseArchString("rv64ifzce", true);
680674
ASSERT_THAT_EXPECTED(MaybeRV64IFZce, Succeeded());
681-
RISCVISAInfo::OrderedExtensionMap ExtsRV64IFZce =
682-
(*MaybeRV64IFZce)->getExtensions();
675+
const auto &ExtsRV64IFZce = (*MaybeRV64IFZce)->getExtensions();
683676
EXPECT_EQ(ExtsRV64IFZce.size(), 8UL);
684677
EXPECT_EQ(ExtsRV64IFZce.count("i"), 1U);
685678
EXPECT_EQ(ExtsRV64IFZce.count("zicsr"), 1U);
@@ -698,8 +691,7 @@ TEST(ParseArchString, ZceImplication) {
698691

699692
auto MaybeRV64IDZce = RISCVISAInfo::parseArchString("rv64idzce", true);
700693
ASSERT_THAT_EXPECTED(MaybeRV64IDZce, Succeeded());
701-
RISCVISAInfo::OrderedExtensionMap ExtsRV64IDZce =
702-
(*MaybeRV64IDZce)->getExtensions();
694+
const auto &ExtsRV64IDZce = (*MaybeRV64IDZce)->getExtensions();
703695
EXPECT_EQ(ExtsRV64IDZce.size(), 9UL);
704696
EXPECT_EQ(ExtsRV64IDZce.count("i"), 1U);
705697
EXPECT_EQ(ExtsRV64IDZce.count("zicsr"), 1U);

‎llvm/utils/TableGen/RISCVTargetDefEmitter.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -90,9 +90,7 @@ static void emitRISCVExtensions(RecordKeeper &Records, raw_ostream &OS) {
9090
// This is almost the same as RISCVFeatures::parseFeatureBits, except that we
9191
// get feature name from feature records instead of feature bits.
9292
static void printMArch(raw_ostream &OS, const Record &Rec) {
93-
std::map<std::string, RISCVISAUtils::ExtensionVersion,
94-
RISCVISAUtils::ExtensionComparator>
95-
Extensions;
93+
RISCVISAUtils::OrderedExtensionMap Extensions;
9694
unsigned XLen = 0;
9795

9896
// Convert features to FeatureVector.

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