implemented feedback

Author: ro-i

llvm/lib/Transforms/Scalar/JumpThreading.cpp

@@ -1534,16 +1534,16 @@ Constant *JumpThreadingPass::evaluateOnPredecessorEdge(
   // instructions in unreachable code and check before going into recursion.
   if (CmpInst *CondCmp = dyn_cast<CmpInst>(V)) {
     if (CondCmp->getParent() == BB) {
-      Constant *Op0 =
-          Visited.contains(CondCmp->getOperand(0))
-              ? nullptr
-              : evaluateOnPredecessorEdge(BB, PredPredBB,
-                                          CondCmp->getOperand(0), DL, Visited);
-      Constant *Op1 =
-          Visited.contains(CondCmp->getOperand(1))
-              ? nullptr
-              : evaluateOnPredecessorEdge(BB, PredPredBB,
-                                          CondCmp->getOperand(1), DL, Visited);
+      Constant *Op0 = nullptr;
+      Constant *Op1 = nullptr;
+      if (Value *V0 = CondCmp->getOperand(0); !Visited.contains(V0)) {
+        Op0 = evaluateOnPredecessorEdge(BB, PredPredBB, V0, DL, Visited);
+        Visited.erase(V0);
+      }
+      if (Value *V1 = CondCmp->getOperand(1); !Visited.contains(V1)) {
+        Op1 = evaluateOnPredecessorEdge(BB, PredPredBB, V1, DL, Visited);
+        Visited.erase(V1);
+      }
       if (Op0 && Op1) {
         return ConstantFoldCompareInstOperands(CondCmp->getPredicate(), Op0,
                                                Op1, DL);

llvm/test/Transforms/JumpThreading/unreachable-loops.ll

@@ -239,4 +239,62 @@ F7:                                               ; No predecessors!
   br label %BB5
 }
 
+; Same as above, but with multiple icmps referencing the same PHI node.
+
+define i32 @recursive_icmp_mult(ptr %ptr) {
+; CHECK-LABEL: @recursive_icmp_mult(
+; CHECK-NEXT:    [[A9:%.*]] = alloca i1, align 1
+; CHECK-NEXT:    br label [[F6:%.*]]
+; CHECK:       T3:
+; CHECK-NEXT:    br label [[BB5:%.*]]
+; CHECK:       BB5:
+; CHECK-NEXT:    [[L10:%.*]] = load i1, ptr [[A9]], align 1
+; CHECK-NEXT:    br i1 [[L10]], label [[BB6:%.*]], label [[F6]]
+; CHECK:       BB6:
+; CHECK-NEXT:    [[LGV3:%.*]] = load i1, ptr [[PTR:%.*]], align 1
+; CHECK-NEXT:    [[C4:%.*]] = icmp sle i1 [[C6:%.*]], true
+; CHECK-NEXT:    [[C5:%.*]] = icmp sle i1 [[C6]], false
+; CHECK-NEXT:    [[C6]] = icmp sle i1 [[C4]], [[C5]]
+; CHECK-NEXT:    store i1 [[C6]], ptr [[PTR]], align 1
+; CHECK-NEXT:    br i1 [[C6]], label [[F6]], label [[T3:%.*]]
+; CHECK:       F6:
+; CHECK-NEXT:    ret i32 0
+; CHECK:       F7:
+; CHECK-NEXT:    br label [[BB5]]
+;
+  %A9 = alloca i1, align 1
+  br i1 false, label %BB4, label %F6
+
+BB4:                                              ; preds = %0
+  br i1 false, label %F6, label %F1
+
+F1:                                               ; preds = %BB4
+  br i1 false, label %T4, label %T3
+
+T3:                                               ; preds = %T4, %BB6, %F1
+  %L6 = load i1, ptr %ptr, align 1
+  br label %BB5
+
+BB5:                                              ; preds = %F7, %T3
+  %L10 = load i1, ptr %A9, align 1
+  br i1 %L10, label %BB6, label %F6
+
+BB6:                                              ; preds = %BB5
+  %LGV3 = load i1, ptr %ptr, align 1
+  %C4 = icmp sle i1 %L6, true
+  %C5 = icmp sle i1 %L6, false
+  %C6 = icmp sle i1 %C4, %C5
+  store i1 %C6, ptr %ptr, align 1
+  br i1 %L6, label %F6, label %T3
+
+T4:                                               ; preds = %F1
+  br label %T3
+
+F6:                                               ; preds = %BB6, %BB5, %BB4, %0
+  ret i32 0
+
+F7:                                               ; No predecessors!
+  br label %BB5
+}
+
 !0 = !{!"branch_weights", i32 2146410443, i32 1073205}