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[WIP][AMDGPU][Attributor] Make AAAMDWavesPerEU honor existing attribute
1 parent 43322a4 commit de91e17

9 files changed

+138
-116
lines changed

‎llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp

Lines changed: 48 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -206,6 +206,19 @@ class AMDGPUInformationCache : public InformationCache {
206206
return ST.getWavesPerEU(F, FlatWorkGroupSize);
207207
}
208208

209+
std::optional<std::pair<unsigned, unsigned>>
210+
getWavesPerEUAttr(const Function &F) {
211+
auto Val = AMDGPU::getIntegerPairAttribute(F, "amdgpu-waves-per-eu",
212+
/*OnlyFirstRequired=*/true);
213+
if (!Val)
214+
return std::nullopt;
215+
if (!Val->second) {
216+
const GCNSubtarget &ST = TM.getSubtarget<GCNSubtarget>(F);
217+
Val->second = ST.getMaxWavesPerEU();
218+
}
219+
return std::make_pair(Val->first, *(Val->second));
220+
}
221+
209222
std::pair<unsigned, unsigned>
210223
getEffectiveWavesPerEU(const Function &F,
211224
std::pair<unsigned, unsigned> WavesPerEU,
@@ -776,22 +789,6 @@ struct AAAMDSizeRangeAttribute
776789
/*ForceReplace=*/true);
777790
}
778791

779-
ChangeStatus emitAttributeIfNotDefault(Attributor &A, unsigned Min,
780-
unsigned Max) {
781-
// Don't add the attribute if it's the implied default.
782-
if (getAssumed().getLower() == Min && getAssumed().getUpper() - 1 == Max)
783-
return ChangeStatus::UNCHANGED;
784-
785-
Function *F = getAssociatedFunction();
786-
LLVMContext &Ctx = F->getContext();
787-
SmallString<10> Buffer;
788-
raw_svector_ostream OS(Buffer);
789-
OS << getAssumed().getLower() << ',' << getAssumed().getUpper() - 1;
790-
return A.manifestAttrs(getIRPosition(),
791-
{Attribute::get(Ctx, AttrName, OS.str())},
792-
/*ForceReplace=*/true);
793-
}
794-
795792
const std::string getAsStr(Attributor *) const override {
796793
std::string Str;
797794
raw_string_ostream OS(Str);
@@ -1027,29 +1024,47 @@ struct AAAMDWavesPerEU : public AAAMDSizeRangeAttribute {
10271024
AAAMDWavesPerEU(const IRPosition &IRP, Attributor &A)
10281025
: AAAMDSizeRangeAttribute(IRP, A, "amdgpu-waves-per-eu") {}
10291026

1030-
bool isValidState() const override {
1031-
return !Assumed.isEmptySet() && IntegerRangeState::isValidState();
1032-
}
1033-
10341027
void initialize(Attributor &A) override {
10351028
Function *F = getAssociatedFunction();
10361029
auto &InfoCache = static_cast<AMDGPUInformationCache &>(A.getInfoCache());
10371030

1038-
if (const auto *AssumedGroupSize = A.getAAFor<AAAMDFlatWorkGroupSize>(
1039-
*this, IRPosition::function(*F), DepClassTy::REQUIRED);
1040-
AssumedGroupSize->isValidState()) {
1031+
auto TakeRange = [&](std::pair<unsigned, unsigned> R) {
1032+
auto [Min, Max] = R;
1033+
ConstantRange Range(APInt(32, Min), APInt(32, Max + 1));
1034+
IntegerRangeState RangeState(Range);
1035+
clampStateAndIndicateChange(this->getState(), RangeState);
1036+
indicateOptimisticFixpoint();
1037+
};
10411038

1042-
unsigned Min, Max;
1043-
std::tie(Min, Max) = InfoCache.getWavesPerEU(
1044-
*F, {AssumedGroupSize->getAssumed().getLower().getZExtValue(),
1045-
AssumedGroupSize->getAssumed().getUpper().getZExtValue() - 1});
1039+
std::pair<unsigned, unsigned> MaxWavesPerEURange{
1040+
1U, InfoCache.getMaxWavesPerEU(*F)};
10461041

1047-
ConstantRange Range(APInt(32, Min), APInt(32, Max + 1));
1048-
intersectKnown(Range);
1042+
// If the attribute exists, we will honor it if it is not the default.
1043+
if (auto Attr = InfoCache.getWavesPerEUAttr(*F)) {
1044+
if (*Attr != MaxWavesPerEURange) {
1045+
TakeRange(*Attr);
1046+
return;
1047+
}
10491048
}
10501049

1051-
if (AMDGPU::isEntryFunctionCC(F->getCallingConv()))
1052-
indicatePessimisticFixpoint();
1050+
// Unlike AAAMDFlatWorkGroupSize, it's getting trickier here. Since the
1051+
// calculation of waves per EU involves flat work group size, we can't
1052+
// simply use an assumed flat work group size as a start point, because the
1053+
// update of flat work group size is in an inverse direction of waves per
1054+
// EU. However, we can still do something if it is an entry function. Since
1055+
// an entry function is a terminal node, and flat work group size either
1056+
// from attribute or default will be used anyway, we can take that value and
1057+
// calculate the waves per EU based on it. This result can't be updated by
1058+
// no means, but that could still allow us to propagate it.
1059+
if (AMDGPU::isEntryFunctionCC(F->getCallingConv())) {
1060+
std::pair<unsigned, unsigned> FlatWorkGroupSize;
1061+
if (auto Attr = InfoCache.getFlatWorkGroupSizeAttr(*F))
1062+
FlatWorkGroupSize = *Attr;
1063+
else
1064+
FlatWorkGroupSize = InfoCache.getDefaultFlatWorkGroupSize(*F);
1065+
TakeRange(InfoCache.getEffectiveWavesPerEU(*F, MaxWavesPerEURange,
1066+
FlatWorkGroupSize));
1067+
}
10531068
}
10541069

10551070
ChangeStatus updateImpl(Attributor &A) override {
@@ -1098,8 +1113,8 @@ struct AAAMDWavesPerEU : public AAAMDSizeRangeAttribute {
10981113
ChangeStatus manifest(Attributor &A) override {
10991114
Function *F = getAssociatedFunction();
11001115
auto &InfoCache = static_cast<AMDGPUInformationCache &>(A.getInfoCache());
1101-
unsigned Max = InfoCache.getMaxWavesPerEU(*F);
1102-
return emitAttributeIfNotDefault(A, 1, Max);
1116+
return emitAttributeIfNotDefaultAfterClamp(
1117+
A, {1U, InfoCache.getMaxWavesPerEU(*F)});
11031118
}
11041119

11051120
/// See AbstractAttribute::getName()

‎llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll

Lines changed: 24 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -688,7 +688,7 @@ define void @func_call_asm() #3 {
688688
;
689689
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@func_call_asm
690690
; ATTRIBUTOR_HSA-SAME: () #[[ATTR16]] {
691-
; ATTRIBUTOR_HSA-NEXT: call void asm sideeffect "", ""() #[[ATTR24:[0-9]+]]
691+
; ATTRIBUTOR_HSA-NEXT: call void asm sideeffect "", ""() #[[ATTR26:[0-9]+]]
692692
; ATTRIBUTOR_HSA-NEXT: ret void
693693
;
694694
call void asm sideeffect "", ""() #3
@@ -717,7 +717,7 @@ define amdgpu_kernel void @func_kern_defined() #3 {
717717
; AKF_HSA-NEXT: ret void
718718
;
719719
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@func_kern_defined
720-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR16]] {
720+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR17:[0-9]+]] {
721721
; ATTRIBUTOR_HSA-NEXT: call void @defined.func()
722722
; ATTRIBUTOR_HSA-NEXT: ret void
723723
;
@@ -845,7 +845,7 @@ define amdgpu_kernel void @kern_sanitize_address() #4 {
845845
; AKF_HSA-NEXT: ret void
846846
;
847847
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@kern_sanitize_address
848-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR17:[0-9]+]] {
848+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR18:[0-9]+]] {
849849
; ATTRIBUTOR_HSA-NEXT: store volatile i32 0, ptr addrspace(1) null, align 4
850850
; ATTRIBUTOR_HSA-NEXT: ret void
851851
;
@@ -861,7 +861,7 @@ define void @func_sanitize_address() #4 {
861861
; AKF_HSA-NEXT: ret void
862862
;
863863
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@func_sanitize_address
864-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR17]] {
864+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR18]] {
865865
; ATTRIBUTOR_HSA-NEXT: store volatile i32 0, ptr addrspace(1) null, align 4
866866
; ATTRIBUTOR_HSA-NEXT: ret void
867867
;
@@ -877,7 +877,7 @@ define void @func_indirect_sanitize_address() #3 {
877877
; AKF_HSA-NEXT: ret void
878878
;
879879
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@func_indirect_sanitize_address
880-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR18:[0-9]+]] {
880+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR19:[0-9]+]] {
881881
; ATTRIBUTOR_HSA-NEXT: call void @func_sanitize_address()
882882
; ATTRIBUTOR_HSA-NEXT: ret void
883883
;
@@ -893,7 +893,7 @@ define amdgpu_kernel void @kern_indirect_sanitize_address() #3 {
893893
; AKF_HSA-NEXT: ret void
894894
;
895895
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@kern_indirect_sanitize_address
896-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR18]] {
896+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR19]] {
897897
; ATTRIBUTOR_HSA-NEXT: call void @func_sanitize_address()
898898
; ATTRIBUTOR_HSA-NEXT: ret void
899899
;
@@ -928,7 +928,7 @@ define internal void @enqueue_block_def() #6 {
928928
; AKF_HSA-NEXT: ret void
929929
;
930930
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@enqueue_block_def
931-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR21:[0-9]+]] {
931+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR22:[0-9]+]] {
932932
; ATTRIBUTOR_HSA-NEXT: ret void
933933
;
934934
ret void
@@ -941,7 +941,7 @@ define amdgpu_kernel void @kern_call_enqueued_block_decl() {
941941
; AKF_HSA-NEXT: ret void
942942
;
943943
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@kern_call_enqueued_block_decl
944-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR22:[0-9]+]] {
944+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR23:[0-9]+]] {
945945
; ATTRIBUTOR_HSA-NEXT: call void @enqueue_block_decl()
946946
; ATTRIBUTOR_HSA-NEXT: ret void
947947
;
@@ -956,7 +956,7 @@ define amdgpu_kernel void @kern_call_enqueued_block_def() {
956956
; AKF_HSA-NEXT: ret void
957957
;
958958
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@kern_call_enqueued_block_def
959-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR23:[0-9]+]] {
959+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR24:[0-9]+]] {
960960
; ATTRIBUTOR_HSA-NEXT: call void @enqueue_block_def()
961961
; ATTRIBUTOR_HSA-NEXT: ret void
962962
;
@@ -969,7 +969,7 @@ define void @unused_enqueue_block() {
969969
; AKF_HSA-NEXT: ret void
970970
;
971971
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@unused_enqueue_block
972-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR23]] {
972+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR25:[0-9]+]] {
973973
; ATTRIBUTOR_HSA-NEXT: ret void
974974
;
975975
ret void
@@ -980,7 +980,7 @@ define internal void @known_func() {
980980
; AKF_HSA-NEXT: ret void
981981
;
982982
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@known_func
983-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR23]] {
983+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR25]] {
984984
; ATTRIBUTOR_HSA-NEXT: ret void
985985
;
986986
ret void
@@ -994,8 +994,8 @@ define amdgpu_kernel void @kern_callsite_enqueue_block() {
994994
; AKF_HSA-NEXT: ret void
995995
;
996996
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@kern_callsite_enqueue_block
997-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR23]] {
998-
; ATTRIBUTOR_HSA-NEXT: call void @known_func() #[[ATTR25:[0-9]+]]
997+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR24]] {
998+
; ATTRIBUTOR_HSA-NEXT: call void @known_func() #[[ATTR27:[0-9]+]]
999999
; ATTRIBUTOR_HSA-NEXT: ret void
10001000
;
10011001
call void @known_func() #6
@@ -1041,15 +1041,17 @@ attributes #6 = { "enqueued-block" }
10411041
; ATTRIBUTOR_HSA: attributes #[[ATTR14]] = { nounwind "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "target-cpu"="gfx900" "uniform-work-group-size"="false" }
10421042
; ATTRIBUTOR_HSA: attributes #[[ATTR15]] = { nounwind "uniform-work-group-size"="false" }
10431043
; ATTRIBUTOR_HSA: attributes #[[ATTR16]] = { nounwind "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
1044-
; ATTRIBUTOR_HSA: attributes #[[ATTR17]] = { nounwind sanitize_address "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
1045-
; ATTRIBUTOR_HSA: attributes #[[ATTR18]] = { nounwind "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
1046-
; ATTRIBUTOR_HSA: attributes #[[ATTR19:[0-9]+]] = { nounwind sanitize_address "amdgpu-no-implicitarg-ptr" "uniform-work-group-size"="false" }
1047-
; ATTRIBUTOR_HSA: attributes #[[ATTR20:[0-9]+]] = { "enqueued-block" "uniform-work-group-size"="false" }
1048-
; ATTRIBUTOR_HSA: attributes #[[ATTR21]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "enqueued-block" "uniform-work-group-size"="false" }
1049-
; ATTRIBUTOR_HSA: attributes #[[ATTR22]] = { "uniform-work-group-size"="false" }
1050-
; ATTRIBUTOR_HSA: attributes #[[ATTR23]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
1051-
; ATTRIBUTOR_HSA: attributes #[[ATTR24]] = { nounwind }
1052-
; ATTRIBUTOR_HSA: attributes #[[ATTR25]] = { "enqueued-block" }
1044+
; ATTRIBUTOR_HSA: attributes #[[ATTR17]] = { nounwind "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
1045+
; ATTRIBUTOR_HSA: attributes #[[ATTR18]] = { nounwind sanitize_address "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
1046+
; ATTRIBUTOR_HSA: attributes #[[ATTR19]] = { nounwind "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
1047+
; ATTRIBUTOR_HSA: attributes #[[ATTR20:[0-9]+]] = { nounwind sanitize_address "amdgpu-no-implicitarg-ptr" "uniform-work-group-size"="false" }
1048+
; ATTRIBUTOR_HSA: attributes #[[ATTR21:[0-9]+]] = { "enqueued-block" "uniform-work-group-size"="false" }
1049+
; ATTRIBUTOR_HSA: attributes #[[ATTR22]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "enqueued-block" "uniform-work-group-size"="false" }
1050+
; ATTRIBUTOR_HSA: attributes #[[ATTR23]] = { "uniform-work-group-size"="false" }
1051+
; ATTRIBUTOR_HSA: attributes #[[ATTR24]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
1052+
; ATTRIBUTOR_HSA: attributes #[[ATTR25]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
1053+
; ATTRIBUTOR_HSA: attributes #[[ATTR26]] = { nounwind }
1054+
; ATTRIBUTOR_HSA: attributes #[[ATTR27]] = { "enqueued-block" }
10531055
;.
10541056
; AKF_HSA: [[META0:![0-9]+]] = !{i32 1, !"amdhsa_code_object_version", i32 500}
10551057
;.

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