@@ -1328,14 +1328,17 @@ TLI_DEFINE_VECFUNC("llvm.log2.f64", "amd_vrd2_log2", FIXED(2), NOMASK, "_ZGV_LLV
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TLI_DEFINE_VECFUNC(" llvm.log2.f64" , " amd_vrd4_log2" , FIXED(4 ), NOMASK, "_ZGV_LLVM_N4v")
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TLI_DEFINE_VECFUNC(" llvm.log2.f64" , " amd_vrd8_log2" , FIXED(8 ), NOMASK, "_ZGV_LLVM_N8v")
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+ TLI_DEFINE_VECFUNC(" log10" , " amd_vrd2_log10" , FIXED(2 ), NOMASK, "_ZGV_LLVM_N2v")
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TLI_DEFINE_VECFUNC(" log10f" , " amd_vrs16_log10f" , FIXED(16 ), NOMASK, "_ZGV_LLVM_N16v")
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TLI_DEFINE_VECFUNC(" log10f" , " amd_vrs8_log10f" , FIXED(8 ), NOMASK, "_ZGV_LLVM_N8v")
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TLI_DEFINE_VECFUNC(" log10f" , " amd_vrs4_log10f" , FIXED(4 ), NOMASK, "_ZGV_LLVM_N4v")
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+ TLI_DEFINE_VECFUNC(" __log10_finite" , " amd_vrd2_log10" , FIXED(2 ), NOMASK, "_ZGV_LLVM_N2v")
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TLI_DEFINE_VECFUNC(" __log10f_finite" , " amd_vrs16_log10f" , FIXED(16 ), NOMASK, "_ZGV_LLVM_N16v")
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TLI_DEFINE_VECFUNC(" __log10f_finite" , " amd_vrs8_log10f" , FIXED(8 ), NOMASK, "_ZGV_LLVM_N8v")
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TLI_DEFINE_VECFUNC(" __log10f_finite" , " amd_vrs4_log10f" , FIXED(4 ), NOMASK, "_ZGV_LLVM_N4v")
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+ TLI_DEFINE_VECFUNC(" llvm.log10.f64" , " amd_vrd2_log10" , FIXED(2 ), NOMASK, "_ZGV_LLVM_N2v")
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TLI_DEFINE_VECFUNC(" llvm.log10.f32" , " amd_vrs16_log10f" , FIXED(16 ), NOMASK, "_ZGV_LLVM_N16v")
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TLI_DEFINE_VECFUNC(" llvm.log10.f32" , " amd_vrs8_log10f" , FIXED(8 ), NOMASK, "_ZGV_LLVM_N8v")
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TLI_DEFINE_VECFUNC(" llvm.log10.f32" , " amd_vrs4_log10f" , FIXED(4 ), NOMASK, "_ZGV_LLVM_N4v")
@@ -1350,6 +1353,12 @@ TLI_DEFINE_VECFUNC("erf", "amd_vrd8_erf", FIXED(8), NOMASK, "_ZGV_LLVM_N8v")
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TLI_DEFINE_VECFUNC(" exp10" , " amd_vrd2_exp10" , FIXED(2 ), NOMASK, "_ZGV_LLVM_N2v")
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TLI_DEFINE_VECFUNC(" exp10f" , " amd_vrs4_exp10f" , FIXED(4 ), NOMASK, "_ZGV_LLVM_N4v")
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+ TLI_DEFINE_VECFUNC(" __exp10_finite" , " amd_vrd2_exp10" , FIXED(2 ), NOMASK, "_ZGV_LLVM_N2v")
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+ TLI_DEFINE_VECFUNC(" __exp10f_finite" , " amd_vrs4_exp10f" , FIXED(4 ), NOMASK, "_ZGV_LLVM_N4v")
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+
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+ TLI_DEFINE_VECFUNC(" llvm.exp10.f64" , " amd_vrd2_exp10" , FIXED(2 ), NOMASK, "_ZGV_LLVM_N2v")
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+ TLI_DEFINE_VECFUNC(" llvm.exp10.f32" , " amd_vrs4_exp10f" , FIXED(4 ), NOMASK, "_ZGV_LLVM_N4v")
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+
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TLI_DEFINE_VECFUNC(" expm1" , " amd_vrd2_expm1" , FIXED(2 ), NOMASK, "_ZGV_LLVM_N2v")
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TLI_DEFINE_VECFUNC(" expm1f" , " amd_vrs4_expm1f" , FIXED(4 ), NOMASK, "_ZGV_LLVM_N4v")
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@@ -1380,10 +1389,19 @@ TLI_DEFINE_VECFUNC("llvm.asin.f32", "amd_vrs4_asinf", FIXED(4), NOMASK, "_ZGV_LL
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TLI_DEFINE_VECFUNC(" llvm.asin.f32" , " amd_vrs8_asinf" , FIXED(8 ), NOMASK, "_ZGV_LLVM_N8v")
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TLI_DEFINE_VECFUNC(" llvm.asin.f32" , " amd_vrs16_asinf" , FIXED(16 ), NOMASK, "_ZGV_LLVM_N16v")
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+ TLI_DEFINE_VECFUNC(" __asin_finite" , " amd_vrd8_asin" , FIXED(8 ), NOMASK, "_ZGV_LLVM_N8v")
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+ TLI_DEFINE_VECFUNC(" __asinf_finite" , " amd_vrs4_asinf" , FIXED(4 ), NOMASK, "_ZGV_LLVM_N4v")
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+ TLI_DEFINE_VECFUNC(" __asinf_finite" , " amd_vrs8_asinf" , FIXED(8 ), NOMASK, "_ZGV_LLVM_N8v")
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+ TLI_DEFINE_VECFUNC(" __asinf_finite" , " amd_vrs16_asinf" , FIXED(16 ), NOMASK, "_ZGV_LLVM_N16v")
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+
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TLI_DEFINE_VECFUNC(" acosf" , " amd_vrs4_acosf" , FIXED(4 ), NOMASK, "_ZGV_LLVM_N4v")
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TLI_DEFINE_VECFUNC(" acosf" , " amd_vrs8_acosf" , FIXED(8 ), NOMASK, "_ZGV_LLVM_N8v")
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TLI_DEFINE_VECFUNC(" acosf" , " amd_vrs16_acosf" , FIXED(16 ), NOMASK, "_ZGV_LLVM_N16v")
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+ TLI_DEFINE_VECFUNC(" __acosf_finite" , " amd_vrs4_acosf" , FIXED(4 ), NOMASK, "_ZGV_LLVM_N4v")
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+ TLI_DEFINE_VECFUNC(" __acosf_finite" , " amd_vrs8_acosf" , FIXED(8 ), NOMASK, "_ZGV_LLVM_N8v")
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+ TLI_DEFINE_VECFUNC(" __acosf_finite" , " amd_vrs16_acosf" , FIXED(16 ), NOMASK, "_ZGV_LLVM_N16v")
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+
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TLI_DEFINE_VECFUNC(" llvm.acos.f32" , " amd_vrs16_acosf" , FIXED(16 ), NOMASK, "_ZGV_LLVM_N16v")
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TLI_DEFINE_VECFUNC(" llvm.acos.f32" , " amd_vrs8_acosf" , FIXED(8 ), NOMASK, "_ZGV_LLVM_N8v")
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TLI_DEFINE_VECFUNC(" llvm.acos.f32" , " amd_vrs4_acosf" , FIXED(4 ), NOMASK, "_ZGV_LLVM_N4v")
@@ -1421,6 +1439,12 @@ TLI_DEFINE_VECFUNC("llvm.tanh.f32", "amd_vrs16_tanhf", FIXED(16), NOMASK, "_ZGV_
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TLI_DEFINE_VECFUNC(" cbrt" , " amd_vrd2_cbrt" , FIXED(2 ), NOMASK, "_ZGV_LLVM_N2v")
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TLI_DEFINE_VECFUNC(" cbrtf" , " amd_vrs4_cbrtf" , FIXED(4 ), NOMASK, "_ZGV_LLVM_N4v")
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+ TLI_DEFINE_VECFUNC(" sincos" , " amd_vrd4_sincos" , FIXED(4 ), NOMASK, "_ZGV_LLVM_N4vl8l8")
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+ TLI_DEFINE_VECFUNC(" sincos" , " amd_vrd8_sincos" , FIXED(8 ), NOMASK, "_ZGV_LLVM_N8vl8l8")
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+
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+ TLI_DEFINE_VECFUNC(" sincosf" , " amd_vrs4_sincosf" , FIXED(4 ), NOMASK, "_ZGV_LLVM_N4vl4l4")
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+ TLI_DEFINE_VECFUNC(" sincosf" , " amd_vrs8_sincosf" , FIXED(8 ), NOMASK, "_ZGV_LLVM_N8vl4l4")
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+ TLI_DEFINE_VECFUNC(" sincosf" , " amd_vrs16_sincosf" , FIXED(16 ), NOMASK, "_ZGV_LLVM_N16vl4l4")
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#else
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#error "Must choose which vector library functions are to be defined."
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#endif
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