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Also drop non-constant support for simple comparison
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2 files changed

+3
-18
lines changed

2 files changed

+3
-18
lines changed

llvm/lib/Analysis/ValueTracking.cpp

Lines changed: 2 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -630,16 +630,6 @@ static void computeKnownBitsFromCmp(const Value *V, const ICmpInst *Cmp,
630630
KnownBits &Known, unsigned Depth,
631631
const SimplifyQuery &Q) {
632632
unsigned BitWidth = Known.getBitWidth();
633-
// We are attempting to compute known bits for the operands of an assume.
634-
// Do not try to use other assumptions for those recursive calls because
635-
// that can lead to mutual recursion and a compile-time explosion.
636-
// An example of the mutual recursion: computeKnownBits can call
637-
// isKnownNonZero which calls computeKnownBitsFromAssume (this function)
638-
// and so on.
639-
SimplifyQuery QueryNoAC = Q;
640-
QueryNoAC.AC = nullptr;
641-
642-
// Note that ptrtoint may change the bitwidth.
643633
auto m_V =
644634
m_CombineOr(m_Specific(V), m_PtrToIntSameSize(Q.DL, m_Specific(V)));
645635

@@ -696,15 +686,10 @@ static void computeKnownBitsFromCmp(const Value *V, const ICmpInst *Cmp,
696686
break;
697687
}
698688
default:
699-
Value *A;
700689
const APInt *Offset = nullptr;
701690
if (match(Cmp, m_ICmp(Pred, m_CombineOr(m_V, m_Add(m_V, m_APInt(Offset))),
702-
m_Value(A)))) {
703-
KnownBits RHSKnown = computeKnownBits(A, Depth + 1, QueryNoAC);
704-
ConstantRange RHSRange =
705-
ConstantRange::fromKnownBits(RHSKnown, Cmp->isSigned());
706-
ConstantRange LHSRange =
707-
ConstantRange::makeAllowedICmpRegion(Pred, RHSRange);
691+
m_APInt(C)))) {
692+
ConstantRange LHSRange = ConstantRange::makeAllowedICmpRegion(Pred, *C);
708693
if (Offset)
709694
LHSRange = LHSRange.sub(*Offset);
710695
Known = Known.unionWith(LHSRange.toKnownBits());

llvm/test/Transforms/InstCombine/zext-or-icmp.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -243,7 +243,7 @@ define i1 @PR51762(ptr %i, i32 %t0, i16 %t1, ptr %p, ptr %d, ptr %f, i32 %p2, i1
243243
; CHECK-NEXT: store i32 [[ADD]], ptr [[F]], align 4
244244
; CHECK-NEXT: [[REM18:%.*]] = srem i32 [[LOR_EXT]], [[ADD]]
245245
; CHECK-NEXT: [[CONV19:%.*]] = zext nneg i32 [[REM18]] to i64
246-
; CHECK-NEXT: store i32 0, ptr [[D]], align 8
246+
; CHECK-NEXT: store i32 [[SROA38]], ptr [[D]], align 8
247247
; CHECK-NEXT: [[R:%.*]] = icmp ult i64 [[INSERT_INSERT41]], [[CONV19]]
248248
; CHECK-NEXT: call void @llvm.assume(i1 [[R]])
249249
; CHECK-NEXT: ret i1 [[R]]

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