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Thorsten Schütt
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[GlobalISel] Import llvm.stepvector (#115721)
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3 files changed

+53
-2
lines changed

3 files changed

+53
-2
lines changed

llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

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@@ -2597,6 +2597,10 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
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return translateExtractVector(CI, MIRBuilder);
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case Intrinsic::vector_insert:
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return translateInsertVector(CI, MIRBuilder);
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case Intrinsic::stepvector: {
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MIRBuilder.buildStepVector(getOrCreateVReg(CI), 1);
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return true;
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}
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case Intrinsic::prefetch: {
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Value *Addr = CI.getOperand(0);
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unsigned RW = cast<ConstantInt>(CI.getOperand(1))->getZExtValue();

llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp

Lines changed: 3 additions & 2 deletions
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@@ -811,8 +811,9 @@ MachineInstrBuilder MachineIRBuilder::buildInsert(const DstOp &Res,
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MachineInstrBuilder MachineIRBuilder::buildStepVector(const DstOp &Res,
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unsigned Step) {
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ConstantInt *CI =
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ConstantInt::get(getMF().getFunction().getContext(), APInt(64, Step));
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unsigned Bitwidth = Res.getLLTTy(*getMRI()).getElementType().getSizeInBits();
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ConstantInt *CI = ConstantInt::get(getMF().getFunction().getContext(),
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APInt(Bitwidth, Step));
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auto StepVector = buildInstr(TargetOpcode::G_STEP_VECTOR);
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StepVector->setDebugLoc(DebugLoc());
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Res.addDefToMIB(*getMRI(), StepVector);
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@@ -0,0 +1,46 @@
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; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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; RUN: llc -O0 -mtriple=aarch64-linux-gnu -mattr=+sve -global-isel -aarch64-enable-gisel-sve=1 -stop-after=irtranslator %s -o - | FileCheck %s
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define <vscale x 2 x i64> @call_step_vector_i64() {
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; CHECK-LABEL: name: call_step_vector_i64
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; CHECK: bb.1.entry:
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; CHECK-NEXT: [[STEP_VECTOR:%[0-9]+]]:_(<vscale x 2 x s64>) = G_STEP_VECTOR i64 1
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; CHECK-NEXT: $z0 = COPY [[STEP_VECTOR]](<vscale x 2 x s64>)
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; CHECK-NEXT: RET_ReallyLR implicit $z0
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entry:
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%steps = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()
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ret <vscale x 2 x i64> %steps
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}
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define <vscale x 4 x i32> @call_step_vector_i32() {
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; CHECK-LABEL: name: call_step_vector_i32
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; CHECK: bb.1.entry:
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; CHECK-NEXT: [[STEP_VECTOR:%[0-9]+]]:_(<vscale x 4 x s32>) = G_STEP_VECTOR i32 1
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; CHECK-NEXT: $z0 = COPY [[STEP_VECTOR]](<vscale x 4 x s32>)
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; CHECK-NEXT: RET_ReallyLR implicit $z0
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entry:
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%steps = call <vscale x 4 x i32> @llvm.stepvector.nxv4i32()
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ret <vscale x 4 x i32> %steps
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}
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define <vscale x 8 x i16> @call_step_vector_i16() {
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; CHECK-LABEL: name: call_step_vector_i16
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; CHECK: bb.1.entry:
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; CHECK-NEXT: [[STEP_VECTOR:%[0-9]+]]:_(<vscale x 8 x s16>) = G_STEP_VECTOR i16 1
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; CHECK-NEXT: $z0 = COPY [[STEP_VECTOR]](<vscale x 8 x s16>)
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; CHECK-NEXT: RET_ReallyLR implicit $z0
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entry:
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%steps = call <vscale x 8 x i16> @llvm.stepvector.nxv8i16()
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ret <vscale x 8 x i16> %steps
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}
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define <vscale x 16 x i8> @call_step_vector_i8() {
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; CHECK-LABEL: name: call_step_vector_i8
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; CHECK: bb.1.entry:
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; CHECK-NEXT: [[STEP_VECTOR:%[0-9]+]]:_(<vscale x 16 x s8>) = G_STEP_VECTOR i8 1
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; CHECK-NEXT: $z0 = COPY [[STEP_VECTOR]](<vscale x 16 x s8>)
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; CHECK-NEXT: RET_ReallyLR implicit $z0
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entry:
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%steps = call <vscale x 16 x i8> @llvm.stepvector.nxv16i8()
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ret <vscale x 16 x i8> %steps
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}

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