Update comments that reference removed operations

Author: MacDue

mlir/include/mlir/Dialect/ArmSME/Transforms/Passes.h

@@ -29,7 +29,7 @@ std::unique_ptr<Pass> createEnableArmStreamingPass(
     const ArmStreamingMode = ArmStreamingMode::Streaming,
     const ArmZaMode = ArmZaMode::Disabled);
 
-/// Pass that replaces 'arm_sme.get_tile_id' ops with actual tiles.
+/// Pass that allocates tile IDs to ArmSME operations.
 std::unique_ptr<Pass> createTileAllocationPass();
 
 //===----------------------------------------------------------------------===//

mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp

@@ -56,20 +56,17 @@ struct GetTileConversion : public ConvertOpToLLVMPattern<arm_sme::GetTileOp> {
 ///
 ///  BEFORE:
 ///  ```mlir
-///     %v = arm_sme.zero : vector<[4]x[4]xi32>
+///     %v = arm_sme.zero {tile_id = 0 : i32} : vector<[4]x[4]xi32>
 ///  ```
 ///
 ///  AFTER:
 ///  ```mlir
-///     %tile_id = arm_sme.get_tile_id : i32
-///     %zero_mask = arith.shli %c17_i32, %tile_id : i32
-///     "arm_sme.intr.zero"(%zero_mask) : (i32) -> ()
-///     %v = arm_sme.cast_tile_to_vector %tile_id : i32 to vector<[4]x[4]xi32>
+///     "arm_sme.intr.zero"() <{tile_mask = 17 : i32}> : () -> ()
+///     %v = arm_sme.materialize_ssa_tile : vector<[4]x[4]xi32>
 ///  ```
 ///
-///  The 'arm_sme.cast_tile_to_vector' (which models the return) and the
-///  'arith.shli' (which generates the mask) will be folded away after tile
-///  allocation and canonization.
+///  The 'arm_sme.materialize_ssa_tile' (which models the return) will fold away
+///  once all ArmSME ops have been converted to LLVM intrinsics.
 struct ZeroOpConversion : public ConvertOpToLLVMPattern<arm_sme::ZeroOp> {
   using ConvertOpToLLVMPattern<arm_sme::ZeroOp>::ConvertOpToLLVMPattern;
 
@@ -443,8 +440,8 @@ struct MoveTileSliceToVectorConversion
 ///
 /// is converted to:
 ///
-///   "arm_sme.intr.mopa"(%tile_id, %ptrue_s, %ptrue_s, %lhs, %rhs)
-///     : (i32, vector<[4]xi1>, vector<[4]xi1>, vector<[4]xf32>,
+///   "arm_sme.intr.mopa"(%ptrue_s, %ptrue_s, %lhs, %rhs) <{tile_id = 0 : i32}>
+///     : (vector<[4]xi1>, vector<[4]xi1>, vector<[4]xf32>,
 ///        vector<[4]xf32>) -> ()
 ///
 /// Currently only supports FMOPA and BFMOPA (non-widening).

mlir/lib/Conversion/ArmSMEToSCF/ArmSMEToSCF.cpp

@@ -61,8 +61,7 @@ void getMemrefIndices(ValueRange indices, unsigned rank, Value tileSliceIndex,
 ///  AFTER:
 ///  ```mlir
 ///  %ptrue_s = arith.constant dense<true> : vector<[4]xi1>
-///  %tile_id = arm_sme.get_tile_id : i32
-///  %tile = arm_sme.cast_tile_to_vector %tile_id : i32 to vector<[4]x[4]xi32>
+///  %tile = arm_sme.get_tile : vector<[4]x[4]xi32>
 ///  %vscale = vector.vscale
 ///  %c0 = arith.constant 0 : index
 ///  %c1 = arith.constant 1 : index

mlir/lib/Dialect/ArmSME/Transforms/TileAllocation.cpp

@@ -6,10 +6,9 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This pass allocates SME tiles at the 'func.func' op level for
-// 'arm_sme.get_tile_id' ops. It does this using a 16-bit tile mask that has a
-// bit for each 128-bit element tile (ZA0.Q-ZA15.Q), the smallest ZA tile
-// granule.
+// This pass allocates SME tiles at the 'func.func' op level for ArmSME
+// operations. It does this using a 16-bit tile mask that has a bit for each
+// 128-bit element tile (ZA0.Q-ZA15.Q), the smallest ZA tile granule.
 //
 // The 128-bit tiles overlap with other element tiles as follows (see section
 // B2.3.2 of SME spec [1]):
@@ -34,8 +33,8 @@
 //   ZA7.D   ZA7.Q, ZA15.Q
 //
 // The tiles in use are tracked via a function attribute 'arm_sme.tiles_in_use'
-// that is initalized during the first 'arm_sme.get_tile_id' rewrite and
-// updated on each subsequent rewrite.
+// that is initalized during the first tile allocation within a function and
+// updated on each subsequent allocation.
 //
 // [1] https://developer.arm.com/documentation/ddi0616/aa
 //