@@ -1255,6 +1255,9 @@ void PPCRegisterInfo::lowerOctWordSpilling(MachineBasicBlock::iterator II,
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bool IsLittleEndian = Subtarget.isLittleEndian ();
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bool IsKilled = MI.getOperand (0 ).isKill ();
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+ assert (!SrcReg.isVirtual () &&
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+ " Spilling register pairs does not support virtual registers." );
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+
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addFrameReference (
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BuildMI (MBB, II, DL, TII.get (PPC::STXV))
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.addReg (TargetRegisterInfo::getSubReg (SrcReg, PPC::sub_vsx0),
@@ -1299,8 +1302,6 @@ void PPCRegisterInfo::lowerACCSpilling(MachineBasicBlock::iterator II,
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bool IsKilled = MI.getOperand (0 ).isKill ();
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bool IsPrimed = PPC::ACCRCRegClass.contains (SrcReg);
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- Register Reg =
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- PPC::VSRp0 + (SrcReg - (IsPrimed ? PPC::ACC0 : PPC::UACC0)) * 2 ;
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bool IsLittleEndian = Subtarget.isLittleEndian ();
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emitAccSpillRestoreInfo (MBB, IsPrimed, false );
@@ -1329,12 +1330,16 @@ void PPCRegisterInfo::lowerACCSpilling(MachineBasicBlock::iterator II,
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spillPair (TargetRegisterInfo::getSubReg (SrcReg, PPC::sub_pair1),
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IsLittleEndian ? 16 : 32 );
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} else {
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- addFrameReference (BuildMI (MBB, II, DL, TII.get (PPC::STXVP))
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- .addReg (Reg, getKillRegState (IsKilled)),
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- FrameIndex, IsLittleEndian ? 32 : 0 );
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- addFrameReference (BuildMI (MBB, II, DL, TII.get (PPC::STXVP))
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- .addReg (Reg + 1 , getKillRegState (IsKilled)),
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- FrameIndex, IsLittleEndian ? 0 : 32 );
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+ addFrameReference (
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+ BuildMI (MBB, II, DL, TII.get (PPC::STXVP))
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+ .addReg (TargetRegisterInfo::getSubReg (SrcReg, PPC::sub_pair0),
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+ getKillRegState (IsKilled)),
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+ FrameIndex, IsLittleEndian ? 32 : 0 );
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+ addFrameReference (
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+ BuildMI (MBB, II, DL, TII.get (PPC::STXVP))
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+ .addReg (TargetRegisterInfo::getSubReg (SrcReg, PPC::sub_pair1),
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+ getKillRegState (IsKilled)),
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+ FrameIndex, IsLittleEndian ? 0 : 32 );
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}
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if (IsPrimed && !IsKilled)
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BuildMI (MBB, II, DL, TII.get (PPC::XXMTACC), SrcReg).addReg (SrcReg);
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