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[HLSL] Lower Length to SPIR-V backend (#102243)
This PR finishes #99134 by lowering the length function to the SPIR-V backend. A test was added to verify that the generated SPIR-V is correct. Fixes #99134
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llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp

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@@ -175,6 +175,9 @@ class SPIRVInstructionSelector : public InstructionSelector {
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bool selectFmix(Register ResVReg, const SPIRVType *ResType,
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MachineInstr &I) const;
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bool selectLength(Register ResVReg, const SPIRVType *ResType,
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MachineInstr &I) const;
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bool selectFrac(Register ResVReg, const SPIRVType *ResType,
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MachineInstr &I) const;
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@@ -1372,6 +1375,23 @@ bool SPIRVInstructionSelector::selectFmix(Register ResVReg,
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.constrainAllUses(TII, TRI, RBI);
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}
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bool SPIRVInstructionSelector::selectLength(Register ResVReg,
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const SPIRVType *ResType,
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MachineInstr &I) const {
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assert(I.getNumOperands() == 3);
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assert(I.getOperand(2).isReg());
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MachineBasicBlock &BB = *I.getParent();
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return BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpExtInst))
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.addDef(ResVReg)
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.addUse(GR.getSPIRVTypeID(ResType))
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.addImm(static_cast<uint32_t>(SPIRV::InstructionSet::GLSL_std_450))
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.addImm(GL::Length)
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.addUse(I.getOperand(2).getReg())
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.constrainAllUses(TII, TRI, RBI);
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}
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bool SPIRVInstructionSelector::selectFrac(Register ResVReg,
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const SPIRVType *ResType,
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MachineInstr &I) const {
@@ -2118,6 +2138,8 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg,
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return selectAny(ResVReg, ResType, I);
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case Intrinsic::spv_lerp:
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return selectFmix(ResVReg, ResType, I);
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case Intrinsic::spv_length:
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return selectLength(ResVReg, ResType, I);
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case Intrinsic::spv_frac:
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return selectFrac(ResVReg, ResType, I);
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case Intrinsic::spv_rsqrt:
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@@ -0,0 +1,29 @@
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; RUN: llc -O0 -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; Make sure SPIRV operation function calls for length are lowered correctly.
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; CHECK-DAG: %[[#op_ext_glsl:]] = OpExtInstImport "GLSL.std.450"
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; CHECK-DAG: %[[#float_32:]] = OpTypeFloat 32
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; CHECK-DAG: %[[#float_16:]] = OpTypeFloat 16
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; CHECK-DAG: %[[#vec4_float_16:]] = OpTypeVector %[[#float_16]] 4
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; CHECK-DAG: %[[#vec4_float_32:]] = OpTypeVector %[[#float_32]] 4
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define noundef half @length_half4(<4 x half> noundef %a) {
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entry:
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; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#]] = OpExtInst %[[#float_16]] %[[#op_ext_glsl]] Length %[[#arg0]]
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%hlsl.length = call half @llvm.spv.length.v4f16(<4 x half> %a)
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ret half %hlsl.length
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}
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define noundef float @length_float4(<4 x float> noundef %a) {
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entry:
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; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#]] = OpExtInst %[[#float_32]] %[[#op_ext_glsl]] Length %[[#arg0]]
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%hlsl.length = call float @llvm.spv.length.v4f32(<4 x float> %a)
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ret float %hlsl.length
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}
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declare half @llvm.spv.length.v4f16(<4 x half>)
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declare float @llvm.spv.length.v4f32(<4 x float>)

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