address comments

Author: yubingex007-a11y

llvm/lib/Target/X86/X86ISelLowering.cpp

@@ -32817,8 +32817,7 @@ void X86TargetLowering::ReplaceNodeResults(SDNode *N,
            "Do not know how to legalize this Node");
     bool IsStrict = N->isStrictFPOpcode();
     SDValue Src = N->getOperand(IsStrict ? 1 : 0);
-    if (!Subtarget.hasFP16() || !Subtarget.hasVLX() ||
-        Src.getValueType().getVectorElementType() != MVT::f16)
+    if (Src.getValueType().getVectorElementType() != MVT::f16)
       return;
     SDValue Ext = IsStrict ? DAG.getConstantFP(0.0, dl, MVT::v2f16)
                            : DAG.getUNDEF(MVT::v2f16);

llvm/test/CodeGen/X86/concat-fpext-v2bf16.ll

@@ -1,7 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-- -mattr=avx512bf16,avx512fp16      | FileCheck %s
-define dso_local void @calc_matrix_tdpbf16ps(<2 x ptr> %ptr) local_unnamed_addr #0 {
-; CHECK-LABEL: calc_matrix_tdpbf16ps:
+
+define void @test(<2 x ptr> %ptr) {
+; CHECK-LABEL: test:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xorl %eax, %eax
 ; CHECK-NEXT:    testb %al, %al
@@ -36,6 +37,4 @@ loop.127.preheader:                               ; preds = %then.13
   ret void
 }
 
-; Function Attrs: nocallback nofree nosync nounwind willreturn memory(read)
-declare <2 x bfloat> @llvm.masked.gather.v2bf16.v2p0(<2 x ptr>, i32 immarg, <2 x i1>, <2 x bfloat>) #1
-
+declare <2 x bfloat> @llvm.masked.gather.v2bf16.v2p0(<2 x ptr>, i32 immarg, <2 x i1>, <2 x bfloat>)