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7 files changed

+57
-56
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‎llvm/include/llvm/IR/IntrinsicsNVVM.td

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1889,9 +1889,10 @@ def int_nvvm_ptr_param_to_gen: DefaultAttrsIntrinsic<[llvm_anyptr_ty],
18891889
// This accounts for the fact that the parameter symbols will occupy this
18901890
// space when lowered during ISel.
18911891
//
1892-
def int_nvvm_internal_noop_addrspacecast :
1892+
def int_nvvm_internal_addrspace_wrap :
18931893
DefaultAttrsIntrinsic<[llvm_anyptr_ty], [llvm_anyptr_ty],
1894-
[IntrNoMem, IntrSpeculatable, NoUndef<ArgIndex<0>>, NoUndef<RetIndex>]>;
1894+
[IntrNoMem, IntrSpeculatable, NoUndef<ArgIndex<0>>,
1895+
NoUndef<RetIndex>]>;
18951896

18961897
// Move intrinsics, used in nvvm internally
18971898

‎llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2771,7 +2771,7 @@ static SDValue lowerIntrinsicWOChain(SDValue Op, SelectionDAG &DAG) {
27712771
switch (Op->getConstantOperandVal(0)) {
27722772
default:
27732773
return Op;
2774-
case Intrinsic::nvvm_internal_noop_addrspacecast:
2774+
case Intrinsic::nvvm_internal_addrspace_wrap:
27752775
return Op.getOperand(1);
27762776
}
27772777
}

‎llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -516,7 +516,7 @@ void copyByValParam(Function &F, Argument &Arg) {
516516
Arg.replaceAllUsesWith(AllocA);
517517

518518
Value *ArgInParam =
519-
IRB.CreateIntrinsic(Intrinsic::nvvm_internal_noop_addrspacecast,
519+
IRB.CreateIntrinsic(Intrinsic::nvvm_internal_addrspace_wrap,
520520
{IRB.getPtrTy(ADDRESS_SPACE_PARAM), Arg.getType()},
521521
&Arg, {}, Arg.getName());
522522

@@ -552,7 +552,7 @@ static void handleByValParam(const NVPTXTargetMachine &TM, Argument *Arg) {
552552

553553
IRBuilder<> IRB(&*FirstInst);
554554
Value *ArgInParamAS = IRB.CreateIntrinsic(
555-
Intrinsic::nvvm_internal_noop_addrspacecast,
555+
Intrinsic::nvvm_internal_addrspace_wrap,
556556
{IRB.getPtrTy(ADDRESS_SPACE_PARAM), Arg->getType()}, {Arg});
557557

558558
for (Use *U : UsesToUpdate)
@@ -584,7 +584,7 @@ static void handleByValParam(const NVPTXTargetMachine &TM, Argument *Arg) {
584584
// intrinsic, this had the added benefit of preventing other optimizations
585585
// from folding away this pair of addrspacecasts.
586586
auto *ParamSpaceArg =
587-
IRB.CreateIntrinsic(Intrinsic::nvvm_internal_noop_addrspacecast,
587+
IRB.CreateIntrinsic(Intrinsic::nvvm_internal_addrspace_wrap,
588588
{IRB.getPtrTy(ADDRESS_SPACE_PARAM), Arg->getType()},
589589
Arg, {}, Arg->getName() + ".param");
590590

‎llvm/test/CodeGen/NVPTX/bug21465.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@ define ptx_kernel void @_Z11TakesStruct1SPi(ptr byval(%struct.S) nocapture reado
1212
entry:
1313
; CHECK-LABEL: @_Z11TakesStruct1SPi
1414
; PTX-LABEL: .visible .entry _Z11TakesStruct1SPi(
15-
; CHECK: call ptr addrspace(101) @llvm.nvvm.internal.noop.addrspacecast.p101.p0(ptr %input)
15+
; CHECK: call ptr addrspace(101) @llvm.nvvm.internal.addrspace.wrap.p101.p0(ptr %input)
1616
%b = getelementptr inbounds %struct.S, ptr %input, i64 0, i32 1
1717
%0 = load i32, ptr %b, align 4
1818
; PTX-NOT: ld.param.u32 {{%r[0-9]+}}, [{{%rd[0-9]+}}]

‎llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -72,7 +72,7 @@ define ptx_kernel void @grid_const_int(ptr byval(i32) align 4 %input1, i32 %inpu
7272
; PTX-NEXT: ret;
7373
; OPT-LABEL: define ptx_kernel void @grid_const_int(
7474
; OPT-SAME: ptr byval(i32) align 4 [[INPUT1:%.*]], i32 [[INPUT2:%.*]], ptr [[OUT:%.*]], i32 [[N:%.*]]) #[[ATTR0]] {
75-
; OPT-NEXT: [[INPUT11:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.noop.addrspacecast.p101.p0(ptr [[INPUT1]])
75+
; OPT-NEXT: [[INPUT11:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.addrspace.wrap.p101.p0(ptr [[INPUT1]])
7676
; OPT-NEXT: [[TMP:%.*]] = load i32, ptr addrspace(101) [[INPUT11]], align 4
7777
; OPT-NEXT: [[ADD:%.*]] = add i32 [[TMP]], [[INPUT2]]
7878
; OPT-NEXT: store i32 [[ADD]], ptr [[OUT]], align 4
@@ -101,7 +101,7 @@ define ptx_kernel void @grid_const_struct(ptr byval(%struct.s) align 4 %input, p
101101
; PTX-NEXT: ret;
102102
; OPT-LABEL: define ptx_kernel void @grid_const_struct(
103103
; OPT-SAME: ptr byval([[STRUCT_S:%.*]]) align 4 [[INPUT:%.*]], ptr [[OUT:%.*]]) #[[ATTR0]] {
104-
; OPT-NEXT: [[INPUT1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.noop.addrspacecast.p101.p0(ptr [[INPUT]])
104+
; OPT-NEXT: [[INPUT1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.addrspace.wrap.p101.p0(ptr [[INPUT]])
105105
; OPT-NEXT: [[GEP13:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr addrspace(101) [[INPUT1]], i32 0, i32 0
106106
; OPT-NEXT: [[GEP22:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr addrspace(101) [[INPUT1]], i32 0, i32 1
107107
; OPT-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(101) [[GEP13]], align 4
@@ -144,7 +144,7 @@ define ptx_kernel void @grid_const_escape(ptr byval(%struct.s) align 4 %input) {
144144
; PTX-NEXT: ret;
145145
; OPT-LABEL: define ptx_kernel void @grid_const_escape(
146146
; OPT-SAME: ptr byval([[STRUCT_S:%.*]]) align 4 [[INPUT:%.*]]) #[[ATTR0]] {
147-
; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.noop.addrspacecast.p101.p0(ptr [[INPUT]])
147+
; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.addrspace.wrap.p101.p0(ptr [[INPUT]])
148148
; OPT-NEXT: [[INPUT_PARAM_GEN:%.*]] = addrspacecast ptr addrspace(101) [[TMP1]] to ptr
149149
; OPT-NEXT: [[CALL:%.*]] = call i32 @escape(ptr [[INPUT_PARAM_GEN]])
150150
; OPT-NEXT: ret void
@@ -195,9 +195,9 @@ define ptx_kernel void @multiple_grid_const_escape(ptr byval(%struct.s) align 4
195195
; PTX-NEXT: ret;
196196
; OPT-LABEL: define ptx_kernel void @multiple_grid_const_escape(
197197
; OPT-SAME: ptr byval([[STRUCT_S:%.*]]) align 4 [[INPUT:%.*]], i32 [[A:%.*]], ptr byval(i32) align 4 [[B:%.*]]) #[[ATTR0]] {
198-
; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.noop.addrspacecast.p101.p0(ptr [[B]])
198+
; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.addrspace.wrap.p101.p0(ptr [[B]])
199199
; OPT-NEXT: [[B_PARAM_GEN:%.*]] = addrspacecast ptr addrspace(101) [[TMP1]] to ptr
200-
; OPT-NEXT: [[TMP2:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.noop.addrspacecast.p101.p0(ptr [[INPUT]])
200+
; OPT-NEXT: [[TMP2:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.addrspace.wrap.p101.p0(ptr [[INPUT]])
201201
; OPT-NEXT: [[INPUT_PARAM_GEN:%.*]] = addrspacecast ptr addrspace(101) [[TMP2]] to ptr
202202
; OPT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
203203
; OPT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
@@ -223,7 +223,7 @@ define ptx_kernel void @grid_const_memory_escape(ptr byval(%struct.s) align 4 %i
223223
; PTX-NEXT: ret;
224224
; OPT-LABEL: define ptx_kernel void @grid_const_memory_escape(
225225
; OPT-SAME: ptr byval([[STRUCT_S:%.*]]) align 4 [[INPUT:%.*]], ptr [[ADDR:%.*]]) #[[ATTR0]] {
226-
; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.noop.addrspacecast.p101.p0(ptr [[INPUT]])
226+
; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.addrspace.wrap.p101.p0(ptr [[INPUT]])
227227
; OPT-NEXT: [[INPUT1:%.*]] = addrspacecast ptr addrspace(101) [[TMP1]] to ptr
228228
; OPT-NEXT: store ptr [[INPUT1]], ptr [[ADDR]], align 8
229229
; OPT-NEXT: ret void
@@ -250,7 +250,7 @@ define ptx_kernel void @grid_const_inlineasm_escape(ptr byval(%struct.s) align 4
250250
; PTX-NOT .local
251251
; OPT-LABEL: define ptx_kernel void @grid_const_inlineasm_escape(
252252
; OPT-SAME: ptr byval([[STRUCT_S:%.*]]) align 4 [[INPUT:%.*]], ptr [[RESULT:%.*]]) #[[ATTR0]] {
253-
; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.noop.addrspacecast.p101.p0(ptr [[INPUT]])
253+
; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.addrspace.wrap.p101.p0(ptr [[INPUT]])
254254
; OPT-NEXT: [[INPUT1:%.*]] = addrspacecast ptr addrspace(101) [[TMP1]] to ptr
255255
; OPT-NEXT: [[TMPPTR1:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[INPUT1]], i32 0, i32 0
256256
; OPT-NEXT: [[TMPPTR2:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[INPUT1]], i32 0, i32 1
@@ -295,7 +295,7 @@ define ptx_kernel void @grid_const_partial_escape(ptr byval(i32) %input, ptr %ou
295295
; PTX-NEXT: ret;
296296
; OPT-LABEL: define ptx_kernel void @grid_const_partial_escape(
297297
; OPT-SAME: ptr byval(i32) [[INPUT:%.*]], ptr [[OUTPUT:%.*]]) #[[ATTR0]] {
298-
; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.noop.addrspacecast.p101.p0(ptr [[INPUT]])
298+
; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.addrspace.wrap.p101.p0(ptr [[INPUT]])
299299
; OPT-NEXT: [[INPUT1_GEN:%.*]] = addrspacecast ptr addrspace(101) [[TMP1]] to ptr
300300
; OPT-NEXT: [[VAL1:%.*]] = load i32, ptr [[INPUT1_GEN]], align 4
301301
; OPT-NEXT: [[TWICE:%.*]] = add i32 [[VAL1]], [[VAL1]]
@@ -342,7 +342,7 @@ define ptx_kernel i32 @grid_const_partial_escapemem(ptr byval(%struct.s) %input,
342342
; PTX-NEXT: ret;
343343
; OPT-LABEL: define ptx_kernel i32 @grid_const_partial_escapemem(
344344
; OPT-SAME: ptr byval([[STRUCT_S:%.*]]) [[INPUT:%.*]], ptr [[OUTPUT:%.*]]) #[[ATTR0]] {
345-
; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.noop.addrspacecast.p101.p0(ptr [[INPUT]])
345+
; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.addrspace.wrap.p101.p0(ptr [[INPUT]])
346346
; OPT-NEXT: [[INPUT1:%.*]] = addrspacecast ptr addrspace(101) [[TMP1]] to ptr
347347
; OPT-NEXT: [[PTR1:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[INPUT1]], i32 0, i32 0
348348
; OPT-NEXT: [[VAL1:%.*]] = load i32, ptr [[PTR1]], align 4
@@ -384,7 +384,7 @@ define ptx_kernel void @grid_const_phi(ptr byval(%struct.s) align 4 %input1, ptr
384384
; PTX-NEXT: ret;
385385
; OPT-LABEL: define ptx_kernel void @grid_const_phi(
386386
; OPT-SAME: ptr byval([[STRUCT_S:%.*]]) align 4 [[INPUT1:%.*]], ptr [[INOUT:%.*]]) #[[ATTR0]] {
387-
; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.noop.addrspacecast.p101.p0(ptr [[INPUT1]])
387+
; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.addrspace.wrap.p101.p0(ptr [[INPUT1]])
388388
; OPT-NEXT: [[INPUT1_PARAM_GEN:%.*]] = addrspacecast ptr addrspace(101) [[TMP1]] to ptr
389389
; OPT-NEXT: [[VAL:%.*]] = load i32, ptr [[INOUT]], align 4
390390
; OPT-NEXT: [[LESS:%.*]] = icmp slt i32 [[VAL]], 0
@@ -441,9 +441,9 @@ define ptx_kernel void @grid_const_phi_ngc(ptr byval(%struct.s) align 4 %input1,
441441
; PTX-NEXT: ret;
442442
; OPT-LABEL: define ptx_kernel void @grid_const_phi_ngc(
443443
; OPT-SAME: ptr byval([[STRUCT_S:%.*]]) align 4 [[INPUT1:%.*]], ptr byval([[STRUCT_S]]) [[INPUT2:%.*]], ptr [[INOUT:%.*]]) #[[ATTR0]] {
444-
; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.noop.addrspacecast.p101.p0(ptr [[INPUT2]])
444+
; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.addrspace.wrap.p101.p0(ptr [[INPUT2]])
445445
; OPT-NEXT: [[INPUT2_PARAM_GEN:%.*]] = addrspacecast ptr addrspace(101) [[TMP1]] to ptr
446-
; OPT-NEXT: [[TMP2:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.noop.addrspacecast.p101.p0(ptr [[INPUT1]])
446+
; OPT-NEXT: [[TMP2:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.addrspace.wrap.p101.p0(ptr [[INPUT1]])
447447
; OPT-NEXT: [[INPUT1_PARAM_GEN:%.*]] = addrspacecast ptr addrspace(101) [[TMP2]] to ptr
448448
; OPT-NEXT: [[VAL:%.*]] = load i32, ptr [[INOUT]], align 4
449449
; OPT-NEXT: [[LESS:%.*]] = icmp slt i32 [[VAL]], 0
@@ -496,9 +496,9 @@ define ptx_kernel void @grid_const_select(ptr byval(i32) align 4 %input1, ptr by
496496
; PTX-NEXT: ret;
497497
; OPT-LABEL: define ptx_kernel void @grid_const_select(
498498
; OPT-SAME: ptr byval(i32) align 4 [[INPUT1:%.*]], ptr byval(i32) [[INPUT2:%.*]], ptr [[INOUT:%.*]]) #[[ATTR0]] {
499-
; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.noop.addrspacecast.p101.p0(ptr [[INPUT2]])
499+
; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.addrspace.wrap.p101.p0(ptr [[INPUT2]])
500500
; OPT-NEXT: [[INPUT2_PARAM_GEN:%.*]] = addrspacecast ptr addrspace(101) [[TMP1]] to ptr
501-
; OPT-NEXT: [[TMP2:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.noop.addrspacecast.p101.p0(ptr [[INPUT1]])
501+
; OPT-NEXT: [[TMP2:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.addrspace.wrap.p101.p0(ptr [[INPUT1]])
502502
; OPT-NEXT: [[INPUT1_PARAM_GEN:%.*]] = addrspacecast ptr addrspace(101) [[TMP2]] to ptr
503503
; OPT-NEXT: [[VAL:%.*]] = load i32, ptr [[INOUT]], align 4
504504
; OPT-NEXT: [[LESS:%.*]] = icmp slt i32 [[VAL]], 0
@@ -530,7 +530,7 @@ define ptx_kernel i32 @grid_const_ptrtoint(ptr byval(i32) %input) {
530530
; PTX-NEXT: ret;
531531
; OPT-LABEL: define ptx_kernel i32 @grid_const_ptrtoint(
532532
; OPT-SAME: ptr byval(i32) align 4 [[INPUT:%.*]]) #[[ATTR0]] {
533-
; OPT-NEXT: [[INPUT2:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.noop.addrspacecast.p101.p0(ptr [[INPUT]])
533+
; OPT-NEXT: [[INPUT2:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.addrspace.wrap.p101.p0(ptr [[INPUT]])
534534
; OPT-NEXT: [[INPUT3:%.*]] = load i32, ptr addrspace(101) [[INPUT2]], align 4
535535
; OPT-NEXT: [[INPUT1:%.*]] = addrspacecast ptr addrspace(101) [[INPUT2]] to ptr
536536
; OPT-NEXT: [[PTRVAL:%.*]] = ptrtoint ptr [[INPUT1]] to i32
@@ -547,7 +547,7 @@ declare void @device_func(ptr byval(i32) align 4)
547547
define ptx_kernel void @test_forward_byval_arg(ptr byval(i32) align 4 %input) {
548548
; OPT-LABEL: define ptx_kernel void @test_forward_byval_arg(
549549
; OPT-SAME: ptr byval(i32) align 4 [[INPUT:%.*]]) #[[ATTR0]] {
550-
; OPT-NEXT: [[INPUT_PARAM:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.noop.addrspacecast.p101.p0(ptr [[INPUT]])
550+
; OPT-NEXT: [[INPUT_PARAM:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.addrspace.wrap.p101.p0(ptr [[INPUT]])
551551
; OPT-NEXT: [[INPUT_PARAM_GEN:%.*]] = addrspacecast ptr addrspace(101) [[INPUT_PARAM]] to ptr
552552
; OPT-NEXT: call void @device_func(ptr byval(i32) align 4 [[INPUT_PARAM_GEN]])
553553
; OPT-NEXT: ret void

‎llvm/test/CodeGen/NVPTX/lower-args.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -210,7 +210,7 @@ define ptx_kernel void @ptr_as_int(i64 noundef %i, i32 noundef %v) {
210210
define ptx_kernel void @ptr_as_int_aggr(ptr nocapture noundef readonly byval(%struct.S) align 8 %s, i32 noundef %v) {
211211
; IRC-LABEL: define ptx_kernel void @ptr_as_int_aggr(
212212
; IRC-SAME: ptr noundef readonly byval([[STRUCT_S:%.*]]) align 8 captures(none) [[S:%.*]], i32 noundef [[V:%.*]]) {
213-
; IRC-NEXT: [[S3:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.noop.addrspacecast.p101.p0(ptr [[S]])
213+
; IRC-NEXT: [[S3:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.addrspace.wrap.p101.p0(ptr [[S]])
214214
; IRC-NEXT: [[I:%.*]] = load i64, ptr addrspace(101) [[S3]], align 8
215215
; IRC-NEXT: [[P:%.*]] = inttoptr i64 [[I]] to ptr
216216
; IRC-NEXT: [[P1:%.*]] = addrspacecast ptr [[P]] to ptr addrspace(1)
@@ -220,7 +220,7 @@ define ptx_kernel void @ptr_as_int_aggr(ptr nocapture noundef readonly byval(%st
220220
;
221221
; IRO-LABEL: define ptx_kernel void @ptr_as_int_aggr(
222222
; IRO-SAME: ptr noundef readonly byval([[STRUCT_S:%.*]]) align 8 captures(none) [[S:%.*]], i32 noundef [[V:%.*]]) {
223-
; IRO-NEXT: [[S1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.noop.addrspacecast.p101.p0(ptr [[S]])
223+
; IRO-NEXT: [[S1:%.*]] = call ptr addrspace(101) @llvm.nvvm.internal.addrspace.wrap.p101.p0(ptr [[S]])
224224
; IRO-NEXT: [[I:%.*]] = load i64, ptr addrspace(101) [[S1]], align 8
225225
; IRO-NEXT: [[P:%.*]] = inttoptr i64 [[I]] to ptr
226226
; IRO-NEXT: store i32 [[V]], ptr [[P]], align 4

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