@@ -227,3 +227,52 @@ define <32 x i16> @elts_pmulhu_512(<32 x i16> %a0, <32 x i16> %a1) {
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%4 = shufflevector <32 x i16 > %3 , <32 x i16 > poison, <32 x i32 > zeroinitializer
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ret <32 x i16 > %4
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}
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+
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+ ;
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+ ; Known Bits
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+ ;
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+
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+ define <8 x i16 > @known_pmulhu_128 (<8 x i16 > %a0 , <8 x i16 > %a1 , <8 x i16 > %a2 ) {
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+ ; CHECK-LABEL: @known_pmulhu_128(
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+ ; CHECK-NEXT: [[X0:%.*]] = lshr <8 x i16> [[A0:%.*]], <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>
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+ ; CHECK-NEXT: [[X1:%.*]] = and <8 x i16> [[A1:%.*]], <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
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+ ; CHECK-NEXT: [[M:%.*]] = tail call <8 x i16> @llvm.x86.sse2.pmulhu.w(<8 x i16> [[X0]], <8 x i16> [[X1]])
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+ ; CHECK-NEXT: [[R:%.*]] = add <8 x i16> [[M]], [[A2:%.*]]
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+ ; CHECK-NEXT: ret <8 x i16> [[R]]
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+ ;
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+ %x0 = lshr <8 x i16 > %a0 , <i16 8 , i16 9 , i16 10 , i16 11 , i16 12 , i16 13 , i16 14 , i16 15 >
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+ %x1 = and <8 x i16 > %a1 , <i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 >
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+ %m = tail call <8 x i16 > @llvm.x86.sse2.pmulhu.w (<8 x i16 > %x0 , <8 x i16 > %x1 )
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+ %r = add <8 x i16 > %m , %a2
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+ ret <8 x i16 > %r
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+ }
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+
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+ define <16 x i16 > @known_pmulhu_256 (<16 x i16 > %a0 , <16 x i16 > %a1 , <16 x i16 > %a2 ) {
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+ ; CHECK-LABEL: @known_pmulhu_256(
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+ ; CHECK-NEXT: [[X0:%.*]] = lshr <16 x i16> [[A0:%.*]], <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>
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+ ; CHECK-NEXT: [[X1:%.*]] = and <16 x i16> [[A1:%.*]], <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
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+ ; CHECK-NEXT: [[M:%.*]] = tail call <16 x i16> @llvm.x86.avx2.pmulhu.w(<16 x i16> [[X0]], <16 x i16> [[X1]])
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+ ; CHECK-NEXT: [[R:%.*]] = add <16 x i16> [[M]], [[A2:%.*]]
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+ ; CHECK-NEXT: ret <16 x i16> [[R]]
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+ ;
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+ %x0 = lshr <16 x i16 > %a0 , <i16 8 , i16 9 , i16 10 , i16 11 , i16 12 , i16 13 , i16 14 , i16 15 , i16 8 , i16 9 , i16 10 , i16 11 , i16 12 , i16 13 , i16 14 , i16 15 >
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+ %x1 = and <16 x i16 > %a1 , <i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 >
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+ %m = tail call <16 x i16 > @llvm.x86.avx2.pmulhu.w (<16 x i16 > %x0 , <16 x i16 > %x1 )
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+ %r = add <16 x i16 > %m , %a2
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+ ret <16 x i16 > %r
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+ }
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+
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+ define <32 x i16 > @known_pmulhu_512 (<32 x i16 > %a0 , <32 x i16 > %a1 , <32 x i16 > %a2 ) {
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+ ; CHECK-LABEL: @known_pmulhu_512(
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+ ; CHECK-NEXT: [[X0:%.*]] = lshr <32 x i16> [[A0:%.*]], <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>
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+ ; CHECK-NEXT: [[X1:%.*]] = and <32 x i16> [[A1:%.*]], <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
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+ ; CHECK-NEXT: [[M:%.*]] = tail call <32 x i16> @llvm.x86.avx512.pmulhu.w.512(<32 x i16> [[X0]], <32 x i16> [[X1]])
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+ ; CHECK-NEXT: [[R:%.*]] = add <32 x i16> [[M]], [[A2:%.*]]
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+ ; CHECK-NEXT: ret <32 x i16> [[R]]
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+ ;
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+ %x0 = lshr <32 x i16 > %a0 , <i16 8 , i16 9 , i16 10 , i16 11 , i16 12 , i16 13 , i16 14 , i16 15 , i16 8 , i16 9 , i16 10 , i16 11 , i16 12 , i16 13 , i16 14 , i16 15 , i16 8 , i16 9 , i16 10 , i16 11 , i16 12 , i16 13 , i16 14 , i16 15 , i16 8 , i16 9 , i16 10 , i16 11 , i16 12 , i16 13 , i16 14 , i16 15 >
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+ %x1 = and <32 x i16 > %a1 , <i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 >
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+ %m = tail call <32 x i16 > @llvm.x86.avx512.pmulhu.w.512 (<32 x i16 > %x0 , <32 x i16 > %x1 )
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+ %r = add <32 x i16 > %m , %a2
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+ ret <32 x i16 > %r
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+ }
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