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[IndVarsSimplify] sinkUnusedInvariants is skipping instructions while sinking.
While sinking instructions (that are loop invariant) from preheader to the exit block, we are skipping instructions due to decrementing instruction iterator twice.
1 parent f7617f7 commit e751e2e

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9 files changed

+52
-46
lines changed

9 files changed

+52
-46
lines changed

‎llvm/lib/Transforms/Scalar/IndVarSimplify.cpp

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1096,10 +1096,15 @@ bool IndVarSimplify::sinkUnusedInvariants(Loop *L) {
10961096
if (!Preheader) return false;
10971097

10981098
bool MadeAnyChanges = false;
1099+
bool IterMoved = false;
10991100
BasicBlock::iterator InsertPt = ExitBlock->getFirstInsertionPt();
11001101
BasicBlock::iterator I(Preheader->getTerminator());
11011102
while (I != Preheader->begin()) {
1102-
--I;
1103+
if (IterMoved) {
1104+
IterMoved = false;
1105+
} else {
1106+
--I;
1107+
}
11031108
// New instructions were inserted at the end of the preheader.
11041109
if (isa<PHINode>(I))
11051110
break;
@@ -1157,6 +1162,7 @@ bool IndVarSimplify::sinkUnusedInvariants(Loop *L) {
11571162
// Skip debug info intrinsics.
11581163
do {
11591164
--I;
1165+
IterMoved = true;
11601166
} while (I->isDebugOrPseudoInst() && I != Preheader->begin());
11611167

11621168
if (I->isDebugOrPseudoInst() && I == Preheader->begin())

‎llvm/test/Transforms/IndVarSimplify/exit-count-select.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -53,12 +53,12 @@ define i32 @logical_and_3ops(i32 %n, i32 %m, i32 %k) {
5353
; CHECK-LABEL: @logical_and_3ops(
5454
; CHECK-NEXT: entry:
5555
; CHECK-NEXT: [[TMP0:%.*]] = freeze i32 [[K:%.*]]
56-
; CHECK-NEXT: [[TMP1:%.*]] = freeze i32 [[M:%.*]]
57-
; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP0]], i32 [[TMP1]])
5856
; CHECK-NEXT: br label [[LOOP:%.*]]
5957
; CHECK: loop:
6058
; CHECK-NEXT: br i1 false, label [[LOOP]], label [[EXIT:%.*]]
6159
; CHECK: exit:
60+
; CHECK-NEXT: [[TMP1:%.*]] = freeze i32 [[M:%.*]]
61+
; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP0]], i32 [[TMP1]])
6262
; CHECK-NEXT: [[UMIN1:%.*]] = call i32 @llvm.umin.i32(i32 [[UMIN]], i32 [[N:%.*]])
6363
; CHECK-NEXT: ret i32 [[UMIN1]]
6464
;
@@ -81,12 +81,12 @@ define i32 @logical_or_3ops(i32 %n, i32 %m, i32 %k) {
8181
; CHECK-LABEL: @logical_or_3ops(
8282
; CHECK-NEXT: entry:
8383
; CHECK-NEXT: [[TMP0:%.*]] = freeze i32 [[K:%.*]]
84-
; CHECK-NEXT: [[TMP1:%.*]] = freeze i32 [[M:%.*]]
85-
; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP0]], i32 [[TMP1]])
8684
; CHECK-NEXT: br label [[LOOP:%.*]]
8785
; CHECK: loop:
8886
; CHECK-NEXT: br i1 true, label [[EXIT:%.*]], label [[LOOP]]
8987
; CHECK: exit:
88+
; CHECK-NEXT: [[TMP1:%.*]] = freeze i32 [[M:%.*]]
89+
; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP0]], i32 [[TMP1]])
9090
; CHECK-NEXT: [[UMIN1:%.*]] = call i32 @llvm.umin.i32(i32 [[UMIN]], i32 [[N:%.*]])
9191
; CHECK-NEXT: ret i32 [[UMIN1]]
9292
;

‎llvm/test/Transforms/IndVarSimplify/exit_value_test3.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,9 +4,9 @@
44
; is high because the loop can be deleted after the exit value rewrite.
55
;
66
; CHECK-LABEL: @_Z3fooPKcjj(
7-
; CHECK: udiv
87
; CHECK: [[LABEL:^[a-zA-Z0-9_.]+]]:
98
; CHECK-NOT: br {{.*}} [[LABEL]]
9+
; CHECK: udiv
1010

1111
define i32 @_Z3fooPKcjj(ptr nocapture readnone %s, i32 %len, i32 %c) #0 {
1212
entry:

‎llvm/test/Transforms/IndVarSimplify/finite-exit-comparisons.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -933,7 +933,6 @@ define i16 @ult_multiuse_profit(i16 %n.raw, i8 %start) mustprogress {
933933
; CHECK-LABEL: @ult_multiuse_profit(
934934
; CHECK-NEXT: entry:
935935
; CHECK-NEXT: [[TMP0:%.*]] = add i8 [[START:%.*]], 1
936-
; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[TMP0]] to i16
937936
; CHECK-NEXT: [[TMP2:%.*]] = trunc i16 254 to i8
938937
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
939938
; CHECK: for.body:
@@ -942,6 +941,7 @@ define i16 @ult_multiuse_profit(i16 %n.raw, i8 %start) mustprogress {
942941
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[IV_NEXT]], [[TMP2]]
943942
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
944943
; CHECK: for.end:
944+
; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[TMP0]] to i16
945945
; CHECK-NEXT: [[UMAX:%.*]] = call i16 @llvm.umax.i16(i16 [[TMP1]], i16 254)
946946
; CHECK-NEXT: ret i16 [[UMAX]]
947947
;

‎llvm/test/Transforms/IndVarSimplify/pr116483.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -5,14 +5,14 @@ define i32 @test() {
55
; CHECK-LABEL: define i32 @test() {
66
; CHECK-NEXT: [[ENTRY:.*:]]
77
; CHECK-NEXT: [[XOR:%.*]] = xor i32 0, 3
8-
; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[XOR]], 329
9-
; CHECK-NEXT: [[CONV:%.*]] = trunc i32 [[MUL]] to i16
10-
; CHECK-NEXT: [[SEXT:%.*]] = shl i16 [[CONV]], 8
11-
; CHECK-NEXT: [[CONV1:%.*]] = ashr i16 [[SEXT]], 8
128
; CHECK-NEXT: br label %[[LOOP_BODY:.*]]
139
; CHECK: [[LOOP_BODY]]:
1410
; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[LOOP_BODY]]
1511
; CHECK: [[EXIT]]:
12+
; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[XOR]], 329
13+
; CHECK-NEXT: [[CONV:%.*]] = trunc i32 [[MUL]] to i16
14+
; CHECK-NEXT: [[SEXT:%.*]] = shl i16 [[CONV]], 8
15+
; CHECK-NEXT: [[CONV1:%.*]] = ashr i16 [[SEXT]], 8
1616
; CHECK-NEXT: [[CONV3:%.*]] = zext i16 [[CONV1]] to i32
1717
; CHECK-NEXT: ret i32 [[CONV3]]
1818
;

‎llvm/test/Transforms/IndVarSimplify/pr63763.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -16,12 +16,12 @@ define i32 @test(i1 %c) {
1616
; CHECK-NEXT: [[CONV2:%.*]] = ashr exact i32 [[SEXT]], 24
1717
; CHECK-NEXT: [[INVARIANT_OP:%.*]] = sub nsw i32 7, [[CONV2]]
1818
; CHECK-NEXT: call void @use(i32 [[INVARIANT_OP]])
19-
; CHECK-NEXT: [[SEXT_US:%.*]] = shl i32 [[SEL]], 24
20-
; CHECK-NEXT: [[CONV2_US:%.*]] = ashr exact i32 [[SEXT_US]], 24
2119
; CHECK-NEXT: br label [[LOOP:%.*]]
2220
; CHECK: loop:
2321
; CHECK-NEXT: br i1 true, label [[EXIT:%.*]], label [[LOOP]]
2422
; CHECK: exit:
23+
; CHECK-NEXT: [[SEXT_US:%.*]] = shl i32 [[SEL]], 24
24+
; CHECK-NEXT: [[CONV2_US:%.*]] = ashr exact i32 [[SEXT_US]], 24
2525
; CHECK-NEXT: [[INVARIANT_OP_US:%.*]] = sub nsw i32 7, [[CONV2_US]]
2626
; CHECK-NEXT: ret i32 [[INVARIANT_OP_US]]
2727
;

‎llvm/test/Transforms/IndVarSimplify/replace-loop-exit-folds.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -7,17 +7,17 @@ define i32 @remove_loop(i32 %size) {
77
; CHECK-LABEL: @remove_loop(
88
; CHECK-NEXT: entry:
99
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[SIZE:%.*]], 31
10-
; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[SIZE]], i32 31)
11-
; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], [[UMIN]]
12-
; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP1]], 5
13-
; CHECK-NEXT: [[TMP3:%.*]] = shl nuw i32 [[TMP2]], 5
1410
; CHECK-NEXT: br label [[WHILE_COND:%.*]]
1511
; CHECK: while.cond:
1612
; CHECK-NEXT: [[SIZE_ADDR_0:%.*]] = phi i32 [ [[SIZE]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[WHILE_COND]] ]
1713
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[SIZE_ADDR_0]], 31
1814
; CHECK-NEXT: [[SUB]] = add i32 [[SIZE_ADDR_0]], -32
1915
; CHECK-NEXT: br i1 [[CMP]], label [[WHILE_COND]], label [[WHILE_END:%.*]]
2016
; CHECK: while.end:
17+
; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[SIZE]], i32 31)
18+
; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], [[UMIN]]
19+
; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP1]], 5
20+
; CHECK-NEXT: [[TMP3:%.*]] = shl nuw i32 [[TMP2]], 5
2121
; CHECK-NEXT: [[TMP4:%.*]] = sub i32 [[SIZE]], [[TMP3]]
2222
; CHECK-NEXT: ret i32 [[TMP4]]
2323
;

‎llvm/test/Transforms/IndVarSimplify/sentinel.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -9,19 +9,19 @@ define void @test(i1 %arg) personality ptr @snork {
99
; CHECK-NEXT: bb:
1010
; CHECK-NEXT: br label [[BB4:%.*]]
1111
; CHECK: bb1:
12-
; CHECK-NEXT: [[INDVARS_IV_NEXT:%.*]] = add i32 [[INDVARS_IV:%.*]], 1
13-
; CHECK-NEXT: [[TMP0:%.*]] = sub i32 [[TMP1:%.*]], [[SMAX:%.*]]
12+
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[TMP6:%.*]], [[INDVARS_IV:%.*]]
13+
; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], [[SMAX:%.*]]
1414
; CHECK-NEXT: br i1 [[ARG:%.*]], label [[BB2:%.*]], label [[BB4]]
1515
; CHECK: bb2:
16-
; CHECK-NEXT: [[TMP3:%.*]] = phi i32 [ [[TMP0]], [[BB1:%.*]] ]
16+
; CHECK-NEXT: [[TMP3:%.*]] = phi i32 [ [[TMP1]], [[BB1:%.*]] ]
1717
; CHECK-NEXT: ret void
1818
; CHECK: bb4:
19-
; CHECK-NEXT: [[INDVARS_IV]] = phi i32 [ [[INDVARS_IV_NEXT]], [[BB1]] ], [ undef, [[BB:%.*]] ]
19+
; CHECK-NEXT: [[INDVARS_IV]] = phi i32 [ [[INDVARS_IV_NEXT:%.*]], [[BB1]] ], [ undef, [[BB:%.*]] ]
2020
; CHECK-NEXT: [[SMAX]] = call i32 @llvm.smax.i32(i32 [[INDVARS_IV]], i32 36)
21-
; CHECK-NEXT: [[TMP6:%.*]] = invoke i32 @quux() [ "deopt"(i32 0, i32 0, i32 0, i32 180, i32 0, i32 25, i32 0, i32 7, ptr null, i32 7, ptr null, i32 7, ptr null, i32 3, i32 [[INDVARS_IV]], i32 3, i32 undef, i32 7, ptr null, i32 3, i32 undef, i32 3, i32 undef, i32 3, i32 undef, i32 3, i32 undef, i32 4, double undef, i32 7, ptr null, i32 4, i64 undef, i32 7, ptr null, i32 0, ptr addrspace(1) undef, i32 3, i32 undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 7, ptr null) ]
21+
; CHECK-NEXT: [[TMP6]] = invoke i32 @quux() [ "deopt"(i32 0, i32 0, i32 0, i32 180, i32 0, i32 25, i32 0, i32 7, ptr null, i32 7, ptr null, i32 7, ptr null, i32 3, i32 [[INDVARS_IV]], i32 3, i32 undef, i32 7, ptr null, i32 3, i32 undef, i32 3, i32 undef, i32 3, i32 undef, i32 3, i32 undef, i32 4, double undef, i32 7, ptr null, i32 4, i64 undef, i32 7, ptr null, i32 0, ptr addrspace(1) undef, i32 3, i32 undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 7, ptr null) ]
2222
; CHECK-NEXT: to label [[BB7:%.*]] unwind label [[BB15:%.*]]
2323
; CHECK: bb7:
24-
; CHECK-NEXT: [[TMP1]] = add i32 [[TMP6]], [[INDVARS_IV]]
24+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i32 [[INDVARS_IV]], 1
2525
; CHECK-NEXT: br label [[BB9:%.*]]
2626
; CHECK: bb9:
2727
; CHECK-NEXT: br i1 true, label [[BB1]], label [[BB9]]

‎llvm/test/Transforms/LoopUnroll/unroll-cleanup.ll

Lines changed: 23 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -23,38 +23,38 @@ define void @_Z3fn1v(ptr %r, ptr %a) #0 {
2323
; CHECK-LABEL: define void @_Z3fn1v(
2424
; CHECK-SAME: ptr writeonly captures(none) [[R:%.*]], ptr readonly captures(none) [[A:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
2525
; CHECK-NEXT: [[ENTRY:.*]]:
26-
; CHECK-NEXT: [[TMP:%.*]] = load i32, ptr @b, align 4
27-
; CHECK-NEXT: [[TOBOOL20:%.*]] = icmp eq i32 [[TMP]], 0
26+
; CHECK-NEXT: [[T:%.*]] = load i32, ptr @b, align 4
27+
; CHECK-NEXT: [[TOBOOL20:%.*]] = icmp eq i32 [[T]], 0
2828
; CHECK-NEXT: br i1 [[TOBOOL20]], label %[[FOR_END6:.*]], label %[[FOR_BODY:.*]]
2929
; CHECK: [[FOR_COND_LOOPEXIT_LOOPEXIT:.*]]:
3030
; CHECK-NEXT: [[ADD_PTR_LCSSA:%.*]] = phi ptr [ [[ADD_PTR_LCSSA_UNR:%.*]], %[[FOR_BODY3_PROL_LOOPEXIT:.*]] ], [ [[ADD_PTR_1:%.*]], %[[FOR_INC_1:.*]] ]
31-
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A_021:%.*]], i64 1
32-
; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[SCEVGEP]], i64 [[TMP1:%.*]]
33-
; CHECK-NEXT: [[TMP1_PRE:%.*]] = load i32, ptr @b, align 4
31+
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[T2:%.*]], -1
32+
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
33+
; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[SCEVGEP:%.*]], i64 [[TMP1]]
34+
; CHECK-NEXT: [[T1_PRE:%.*]] = load i32, ptr @b, align 4
3435
; CHECK-NEXT: br label %[[FOR_COND_LOOPEXIT:.*]]
3536
; CHECK: [[FOR_COND_LOOPEXIT]]:
36-
; CHECK-NEXT: [[T1:%.*]] = phi i32 [ [[T12:%.*]], %[[FOR_BODY]] ], [ [[TMP1_PRE]], %[[FOR_COND_LOOPEXIT_LOOPEXIT]] ]
37+
; CHECK-NEXT: [[T1:%.*]] = phi i32 [ [[T12:%.*]], %[[FOR_BODY]] ], [ [[T1_PRE]], %[[FOR_COND_LOOPEXIT_LOOPEXIT]] ]
3738
; CHECK-NEXT: [[R_1_LCSSA:%.*]] = phi ptr [ [[R_022:%.*]], %[[FOR_BODY]] ], [ [[ADD_PTR_LCSSA]], %[[FOR_COND_LOOPEXIT_LOOPEXIT]] ]
38-
; CHECK-NEXT: [[A_1_LCSSA:%.*]] = phi ptr [ [[A_021]], %[[FOR_BODY]] ], [ [[SCEVGEP1]], %[[FOR_COND_LOOPEXIT_LOOPEXIT]] ]
39+
; CHECK-NEXT: [[A_1_LCSSA:%.*]] = phi ptr [ [[A_021:%.*]], %[[FOR_BODY]] ], [ [[SCEVGEP1]], %[[FOR_COND_LOOPEXIT_LOOPEXIT]] ]
3940
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[T1]], 0
4041
; CHECK-NEXT: br i1 [[TOBOOL]], label %[[FOR_END6]], label %[[FOR_BODY]]
4142
; CHECK: [[FOR_BODY]]:
42-
; CHECK-NEXT: [[T12]] = phi i32 [ [[T1]], %[[FOR_COND_LOOPEXIT]] ], [ [[TMP]], %[[ENTRY]] ]
43+
; CHECK-NEXT: [[T12]] = phi i32 [ [[T1]], %[[FOR_COND_LOOPEXIT]] ], [ [[T]], %[[ENTRY]] ]
4344
; CHECK-NEXT: [[R_022]] = phi ptr [ [[R_1_LCSSA]], %[[FOR_COND_LOOPEXIT]] ], [ [[R]], %[[ENTRY]] ]
4445
; CHECK-NEXT: [[A_021]] = phi ptr [ [[A_1_LCSSA]], %[[FOR_COND_LOOPEXIT]] ], [ [[A]], %[[ENTRY]] ]
45-
; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr @c, align 4
46-
; CHECK-NEXT: [[TOBOOL215:%.*]] = icmp eq i32 [[TMP2]], 0
46+
; CHECK-NEXT: [[T2]] = load i32, ptr @c, align 4
47+
; CHECK-NEXT: [[TOBOOL215:%.*]] = icmp eq i32 [[T2]], 0
4748
; CHECK-NEXT: br i1 [[TOBOOL215]], label %[[FOR_COND_LOOPEXIT]], label %[[FOR_BODY3_PREHEADER:.*]]
4849
; CHECK: [[FOR_BODY3_PREHEADER]]:
49-
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[TMP2]], -1
50-
; CHECK-NEXT: [[TMP1]] = zext i32 [[TMP0]] to i64
51-
; CHECK-NEXT: [[XTRAITER:%.*]] = and i32 [[TMP2]], 1
50+
; CHECK-NEXT: [[SCEVGEP]] = getelementptr i8, ptr [[A_021]], i64 1
51+
; CHECK-NEXT: [[XTRAITER:%.*]] = and i32 [[T2]], 1
5252
; CHECK-NEXT: [[LCMP_MOD_NOT:%.*]] = icmp eq i32 [[XTRAITER]], 0
5353
; CHECK-NEXT: br i1 [[LCMP_MOD_NOT]], label %[[FOR_BODY3_PROL_LOOPEXIT]], label %[[FOR_BODY3_PROL:.*]]
5454
; CHECK: [[FOR_BODY3_PROL]]:
55-
; CHECK-NEXT: [[DEC18_PROL:%.*]] = add nsw i32 [[TMP2]], -1
56-
; CHECK-NEXT: [[TMP3_PROL:%.*]] = load i8, ptr [[A_021]], align 1
57-
; CHECK-NEXT: [[CMP_PROL:%.*]] = icmp eq i8 [[TMP3_PROL]], 0
55+
; CHECK-NEXT: [[DEC18_PROL:%.*]] = add nsw i32 [[T2]], -1
56+
; CHECK-NEXT: [[T3_PROL:%.*]] = load i8, ptr [[A_021]], align 1
57+
; CHECK-NEXT: [[CMP_PROL:%.*]] = icmp eq i8 [[T3_PROL]], 0
5858
; CHECK-NEXT: br i1 [[CMP_PROL]], label %[[IF_THEN_PROL:.*]], label %[[FOR_INC_PROL:.*]]
5959
; CHECK: [[IF_THEN_PROL]]:
6060
; CHECK-NEXT: [[ARRAYIDX_PROL:%.*]] = getelementptr inbounds nuw i8, ptr [[R_022]], i64 2
@@ -69,17 +69,17 @@ define void @_Z3fn1v(ptr %r, ptr %a) #0 {
6969
; CHECK-NEXT: br label %[[FOR_BODY3_PROL_LOOPEXIT]]
7070
; CHECK: [[FOR_BODY3_PROL_LOOPEXIT]]:
7171
; CHECK-NEXT: [[ADD_PTR_LCSSA_UNR]] = phi ptr [ poison, %[[FOR_BODY3_PREHEADER]] ], [ [[ADD_PTR_PROL]], %[[FOR_INC_PROL]] ]
72-
; CHECK-NEXT: [[DEC18_IN_UNR:%.*]] = phi i32 [ [[TMP2]], %[[FOR_BODY3_PREHEADER]] ], [ [[DEC18_PROL]], %[[FOR_INC_PROL]] ]
72+
; CHECK-NEXT: [[DEC18_IN_UNR:%.*]] = phi i32 [ [[T2]], %[[FOR_BODY3_PREHEADER]] ], [ [[DEC18_PROL]], %[[FOR_INC_PROL]] ]
7373
; CHECK-NEXT: [[R_117_UNR:%.*]] = phi ptr [ [[R_022]], %[[FOR_BODY3_PREHEADER]] ], [ [[ADD_PTR_PROL]], %[[FOR_INC_PROL]] ]
7474
; CHECK-NEXT: [[A_116_UNR:%.*]] = phi ptr [ [[A_021]], %[[FOR_BODY3_PREHEADER]] ], [ [[INCDEC_PTR_PROL]], %[[FOR_INC_PROL]] ]
75-
; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP0]], 0
76-
; CHECK-NEXT: br i1 [[TMP4]], label %[[FOR_COND_LOOPEXIT_LOOPEXIT]], label %[[FOR_BODY3:.*]]
75+
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[T2]], 1
76+
; CHECK-NEXT: br i1 [[TMP2]], label %[[FOR_COND_LOOPEXIT_LOOPEXIT]], label %[[FOR_BODY3:.*]]
7777
; CHECK: [[FOR_BODY3]]:
7878
; CHECK-NEXT: [[DEC18_IN:%.*]] = phi i32 [ [[DEC18_1:%.*]], %[[FOR_INC_1]] ], [ [[DEC18_IN_UNR]], %[[FOR_BODY3_PROL_LOOPEXIT]] ]
7979
; CHECK-NEXT: [[R_117:%.*]] = phi ptr [ [[ADD_PTR_1]], %[[FOR_INC_1]] ], [ [[R_117_UNR]], %[[FOR_BODY3_PROL_LOOPEXIT]] ]
8080
; CHECK-NEXT: [[A_116:%.*]] = phi ptr [ [[INCDEC_PTR_1:%.*]], %[[FOR_INC_1]] ], [ [[A_116_UNR]], %[[FOR_BODY3_PROL_LOOPEXIT]] ]
81-
; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr [[A_116]], align 1
82-
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[TMP3]], 0
81+
; CHECK-NEXT: [[T3:%.*]] = load i8, ptr [[A_116]], align 1
82+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[T3]], 0
8383
; CHECK-NEXT: br i1 [[CMP]], label %[[IF_THEN:.*]], label %[[FOR_INC:.*]]
8484
; CHECK: [[IF_THEN]]:
8585
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i8, ptr [[R_117]], i64 2
@@ -91,8 +91,8 @@ define void @_Z3fn1v(ptr %r, ptr %a) #0 {
9191
; CHECK: [[FOR_INC]]:
9292
; CHECK-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds nuw i8, ptr [[A_116]], i64 1
9393
; CHECK-NEXT: [[DEC18_1]] = add nsw i32 [[DEC18_IN]], -2
94-
; CHECK-NEXT: [[TMP3_1:%.*]] = load i8, ptr [[INCDEC_PTR]], align 1
95-
; CHECK-NEXT: [[CMP_1:%.*]] = icmp eq i8 [[TMP3_1]], 0
94+
; CHECK-NEXT: [[T3_1:%.*]] = load i8, ptr [[INCDEC_PTR]], align 1
95+
; CHECK-NEXT: [[CMP_1:%.*]] = icmp eq i8 [[T3_1]], 0
9696
; CHECK-NEXT: br i1 [[CMP_1]], label %[[IF_THEN_1:.*]], label %[[FOR_INC_1]]
9797
; CHECK: [[IF_THEN_1]]:
9898
; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds nuw i8, ptr [[R_117]], i64 6

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