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Commit e75521b

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author
Thorsten Schütt
committed
address review comments
1 parent 62d9a34 commit e75521b

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2 files changed

+6
-6
lines changed

2 files changed

+6
-6
lines changed

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -7056,9 +7056,9 @@ bool CombinerHelper::matchAddOverflow(MachineInstr &MI, BuildFnTy &MatchInfo) {
70567056
// We try to combine uaddo to non-overflowing add.
70577057
if (!IsSigned) {
70587058
ConstantRange CRLHS =
7059-
ConstantRange::fromKnownBits(KB->getKnownBits(LHS), false /*IsSigned*/);
7059+
ConstantRange::fromKnownBits(KB->getKnownBits(LHS), /*IsSigned=*/false);
70607060
ConstantRange CRRHS =
7061-
ConstantRange::fromKnownBits(KB->getKnownBits(RHS), false /*IsSigned*/);
7061+
ConstantRange::fromKnownBits(KB->getKnownBits(RHS), /*IsSigned=*/false);
70627062

70637063
switch (CRLHS.unsignedAddMayOverflow(CRRHS)) {
70647064
case ConstantRange::OverflowResult::MayOverflow:
@@ -7086,7 +7086,7 @@ bool CombinerHelper::matchAddOverflow(MachineInstr &MI, BuildFnTy &MatchInfo) {
70867086

70877087
// If LHS and RHS each have at least two sign bits, then there is no signed
70887088
// overflow.
7089-
if (KB->computeNumSignBits(LHS) > 1 && KB->computeNumSignBits(RHS) > 1) {
7089+
if (KB->computeNumSignBits(RHS) > 1 && KB->computeNumSignBits(LHS) > 1) {
70907090
MatchInfo = [=](MachineIRBuilder &B) {
70917091
B.buildAdd(Dst, LHS, RHS, MachineInstr::MIFlag::NoSWrap);
70927092
B.buildConstant(Carry, 0);
@@ -7095,9 +7095,9 @@ bool CombinerHelper::matchAddOverflow(MachineInstr &MI, BuildFnTy &MatchInfo) {
70957095
}
70967096

70977097
ConstantRange CRLHS =
7098-
ConstantRange::fromKnownBits(KB->getKnownBits(LHS), true /*IsSigned*/);
7098+
ConstantRange::fromKnownBits(KB->getKnownBits(LHS), /*IsSigned=*/true);
70997099
ConstantRange CRRHS =
7100-
ConstantRange::fromKnownBits(KB->getKnownBits(RHS), true /*IsSigned*/);
7100+
ConstantRange::fromKnownBits(KB->getKnownBits(RHS), /*IsSigned=*/true);
71017101

71027102
switch (CRLHS.signedAddMayOverflow(CRRHS)) {
71037103
case ConstantRange::OverflowResult::MayOverflow:

llvm/test/CodeGen/AArch64/GlobalISel/combine-overflow.mir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2-
# RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s
2+
# RUN: llc -run-pass=aarch64-prelegalizer-combiner -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s
33

44
---
55
name: add_unused

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