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[AMDGPU] Add parseStringOrIntWithPrefix helper in asm parser (#102213)
When we have a modifier with a value (like dst_sel:DWORD for example) we only accept symbolic values. SP3 allows to use numberic constants as well. Adding a helper function to allow both. Besides the compatibility it is easier to use.
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4 files changed

+108
-72
lines changed

4 files changed

+108
-72
lines changed

‎llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

Lines changed: 61 additions & 66 deletions
Original file line numberDiff line numberDiff line change
@@ -1618,6 +1618,14 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
16181618
ParseStatus parseTH(OperandVector &Operands, int64_t &TH);
16191619
ParseStatus parseStringWithPrefix(StringRef Prefix, StringRef &Value,
16201620
SMLoc &StringLoc);
1621+
ParseStatus parseStringOrIntWithPrefix(OperandVector &Operands,
1622+
StringRef Name,
1623+
ArrayRef<const char *> Ids,
1624+
int64_t &IntVal);
1625+
ParseStatus parseStringOrIntWithPrefix(OperandVector &Operands,
1626+
StringRef Name,
1627+
ArrayRef<const char *> Ids,
1628+
AMDGPUOperand::ImmTy Type);
16211629

16221630
bool isModifier();
16231631
bool isOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const;
@@ -6633,27 +6641,17 @@ ParseStatus AMDGPUAsmParser::parseCPol(OperandVector &Operands) {
66336641

66346642
ParseStatus AMDGPUAsmParser::parseScope(OperandVector &Operands,
66356643
int64_t &Scope) {
6636-
Scope = AMDGPU::CPol::SCOPE_CU; // default;
6644+
static const unsigned Scopes[] = {CPol::SCOPE_CU, CPol::SCOPE_SE,
6645+
CPol::SCOPE_DEV, CPol::SCOPE_SYS};
66376646

6638-
StringRef Value;
6639-
SMLoc StringLoc;
6640-
ParseStatus Res;
6641-
6642-
Res = parseStringWithPrefix("scope", Value, StringLoc);
6643-
if (!Res.isSuccess())
6644-
return Res;
6645-
6646-
Scope = StringSwitch<int64_t>(Value)
6647-
.Case("SCOPE_CU", AMDGPU::CPol::SCOPE_CU)
6648-
.Case("SCOPE_SE", AMDGPU::CPol::SCOPE_SE)
6649-
.Case("SCOPE_DEV", AMDGPU::CPol::SCOPE_DEV)
6650-
.Case("SCOPE_SYS", AMDGPU::CPol::SCOPE_SYS)
6651-
.Default(0xffffffff);
6647+
ParseStatus Res = parseStringOrIntWithPrefix(
6648+
Operands, "scope", {"SCOPE_CU", "SCOPE_SE", "SCOPE_DEV", "SCOPE_SYS"},
6649+
Scope);
66526650

6653-
if (Scope == 0xffffffff)
6654-
return Error(StringLoc, "invalid scope value");
6651+
if (Res.isSuccess())
6652+
Scope = Scopes[Scope];
66556653

6656-
return ParseStatus::Success;
6654+
return Res;
66576655
}
66586656

66596657
ParseStatus AMDGPUAsmParser::parseTH(OperandVector &Operands, int64_t &TH) {
@@ -6742,6 +6740,44 @@ ParseStatus AMDGPUAsmParser::parseStringWithPrefix(StringRef Prefix,
67426740
: ParseStatus::Failure;
67436741
}
67446742

6743+
ParseStatus AMDGPUAsmParser::parseStringOrIntWithPrefix(
6744+
OperandVector &Operands, StringRef Name, ArrayRef<const char *> Ids,
6745+
int64_t &IntVal) {
6746+
if (!trySkipId(Name, AsmToken::Colon))
6747+
return ParseStatus::NoMatch;
6748+
6749+
SMLoc StringLoc = getLoc();
6750+
6751+
StringRef Value;
6752+
if (isToken(AsmToken::Identifier)) {
6753+
Value = getTokenStr();
6754+
lex();
6755+
6756+
for (IntVal = 0; IntVal < (int64_t)Ids.size(); ++IntVal)
6757+
if (Value == Ids[IntVal])
6758+
break;
6759+
} else if (!parseExpr(IntVal))
6760+
return ParseStatus::Failure;
6761+
6762+
if (IntVal < 0 || IntVal >= (int64_t)Ids.size())
6763+
return Error(StringLoc, "invalid " + Twine(Name) + " value");
6764+
6765+
return ParseStatus::Success;
6766+
}
6767+
6768+
ParseStatus AMDGPUAsmParser::parseStringOrIntWithPrefix(
6769+
OperandVector &Operands, StringRef Name, ArrayRef<const char *> Ids,
6770+
AMDGPUOperand::ImmTy Type) {
6771+
SMLoc S = getLoc();
6772+
int64_t IntVal;
6773+
6774+
ParseStatus Res = parseStringOrIntWithPrefix(Operands, Name, Ids, IntVal);
6775+
if (Res.isSuccess())
6776+
Operands.push_back(AMDGPUOperand::CreateImm(this, IntVal, S, Type));
6777+
6778+
return Res;
6779+
}
6780+
67456781
//===----------------------------------------------------------------------===//
67466782
// MTBUF format
67476783
//===----------------------------------------------------------------------===//
@@ -9396,57 +9432,16 @@ void AMDGPUAsmParser::cvtDPP(MCInst &Inst, const OperandVector &Operands, bool I
93969432
ParseStatus AMDGPUAsmParser::parseSDWASel(OperandVector &Operands,
93979433
StringRef Prefix,
93989434
AMDGPUOperand::ImmTy Type) {
9399-
using namespace llvm::AMDGPU::SDWA;
9400-
9401-
SMLoc S = getLoc();
9402-
StringRef Value;
9403-
9404-
SMLoc StringLoc;
9405-
ParseStatus Res = parseStringWithPrefix(Prefix, Value, StringLoc);
9406-
if (!Res.isSuccess())
9407-
return Res;
9408-
9409-
int64_t Int;
9410-
Int = StringSwitch<int64_t>(Value)
9411-
.Case("BYTE_0", SdwaSel::BYTE_0)
9412-
.Case("BYTE_1", SdwaSel::BYTE_1)
9413-
.Case("BYTE_2", SdwaSel::BYTE_2)
9414-
.Case("BYTE_3", SdwaSel::BYTE_3)
9415-
.Case("WORD_0", SdwaSel::WORD_0)
9416-
.Case("WORD_1", SdwaSel::WORD_1)
9417-
.Case("DWORD", SdwaSel::DWORD)
9418-
.Default(0xffffffff);
9419-
9420-
if (Int == 0xffffffff)
9421-
return Error(StringLoc, "invalid " + Twine(Prefix) + " value");
9422-
9423-
Operands.push_back(AMDGPUOperand::CreateImm(this, Int, S, Type));
9424-
return ParseStatus::Success;
9435+
return parseStringOrIntWithPrefix(
9436+
Operands, Prefix,
9437+
{"BYTE_0", "BYTE_1", "BYTE_2", "BYTE_3", "WORD_0", "WORD_1", "DWORD"},
9438+
Type);
94259439
}
94269440

94279441
ParseStatus AMDGPUAsmParser::parseSDWADstUnused(OperandVector &Operands) {
9428-
using namespace llvm::AMDGPU::SDWA;
9429-
9430-
SMLoc S = getLoc();
9431-
StringRef Value;
9432-
9433-
SMLoc StringLoc;
9434-
ParseStatus Res = parseStringWithPrefix("dst_unused", Value, StringLoc);
9435-
if (!Res.isSuccess())
9436-
return Res;
9437-
9438-
int64_t Int;
9439-
Int = StringSwitch<int64_t>(Value)
9440-
.Case("UNUSED_PAD", DstUnused::UNUSED_PAD)
9441-
.Case("UNUSED_SEXT", DstUnused::UNUSED_SEXT)
9442-
.Case("UNUSED_PRESERVE", DstUnused::UNUSED_PRESERVE)
9443-
.Default(0xffffffff);
9444-
9445-
if (Int == 0xffffffff)
9446-
return Error(StringLoc, "invalid dst_unused value");
9447-
9448-
Operands.push_back(AMDGPUOperand::CreateImm(this, Int, S, AMDGPUOperand::ImmTySDWADstUnused));
9449-
return ParseStatus::Success;
9442+
return parseStringOrIntWithPrefix(
9443+
Operands, "dst_unused", {"UNUSED_PAD", "UNUSED_SEXT", "UNUSED_PRESERVE"},
9444+
AMDGPUOperand::ImmTySDWADstUnused);
94509445
}
94519446

94529447
void AMDGPUAsmParser::cvtSdwaVOP1(MCInst &Inst, const OperandVector &Operands) {

‎llvm/test/MC/AMDGPU/gfx10_asm_vop1.s

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -163,6 +163,15 @@ v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
163163
v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
164164
// GFX10: encoding: [0xf9,0x02,0x0a,0x7e,0x01,0x16,0x06,0x00]
165165

166+
v_mov_b32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:0 src0_sel:06
167+
// GFX10: encoding: [0xf9,0x02,0x0a,0x7e,0x01,0x05,0x06,0x00]
168+
169+
v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:1 src0_sel:0x6
170+
// GFX10: encoding: [0xf9,0x02,0x0a,0x7e,0x01,0x0e,0x06,0x00]
171+
172+
v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:2 src0_sel:6
173+
// GFX10: encoding: [0xf9,0x02,0x0a,0x7e,0x01,0x16,0x06,0x00]
174+
166175
v_mov_b32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
167176
// GFX10: encoding: [0xf9,0x02,0x0a,0x7e,0x01,0x16,0x06,0x00]
168177

‎llvm/test/MC/AMDGPU/gfx10_err_pos.s

Lines changed: 26 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -484,23 +484,43 @@ v_mov_b32_sdwa v1, sext(u)
484484
// CHECK-NEXT:{{^}} ^
485485

486486
//==============================================================================
487-
// expected an identifier
487+
// expected a valid identifier or number in a valid range
488488

489489
v_mov_b32_sdwa v5, v1 dst_sel:
490-
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: expected an identifier
490+
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: unknown token in expression
491491
// CHECK-NEXT:{{^}}v_mov_b32_sdwa v5, v1 dst_sel:
492492
// CHECK-NEXT:{{^}} ^
493493

494-
v_mov_b32_sdwa v5, v1 dst_sel:0
495-
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: expected an identifier
496-
// CHECK-NEXT:{{^}}v_mov_b32_sdwa v5, v1 dst_sel:0
494+
v_mov_b32_sdwa v5, v1 dst_sel:0a
495+
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
496+
// CHECK-NEXT:{{^}}v_mov_b32_sdwa v5, v1 dst_sel:0a
497+
// CHECK-NEXT:{{^}} ^
498+
499+
v_mov_b32_sdwa v5, v1 dst_sel:BYTE_1x
500+
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid dst_sel value
501+
// CHECK-NEXT:{{^}}v_mov_b32_sdwa v5, v1 dst_sel:BYTE_1
497502
// CHECK-NEXT:{{^}} ^
498503

499504
v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:[UNUSED_PAD]
500-
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: expected an identifier
505+
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: expected absolute expression
501506
// CHECK-NEXT:{{^}}v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:[UNUSED_PAD]
502507
// CHECK-NEXT:{{^}} ^
503508

509+
v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:XXX
510+
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid dst_unused value
511+
// CHECK-NEXT:{{^}}v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:XXX
512+
// CHECK-NEXT:{{^}} ^
513+
514+
v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:3
515+
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid dst_unused value
516+
// CHECK-NEXT:{{^}}v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:3
517+
// CHECK-NEXT:{{^}} ^
518+
519+
v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:-1
520+
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid dst_unused value
521+
// CHECK-NEXT:{{^}}v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:-1
522+
// CHECK-NEXT:{{^}} ^
523+
504524
//==============================================================================
505525
// expected an opening square bracket
506526

‎llvm/test/MC/AMDGPU/gfx12_asm_smem.s

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -772,6 +772,18 @@ s_load_b32 s5, s[4:5], s0 offset:0x0 scope:SCOPE_DEV
772772
s_load_b32 s5, s[4:5], s0 offset:0x0 scope:SCOPE_SYS
773773
// GFX12: s_load_b32 s5, s[4:5], s0 offset:0x0 scope:SCOPE_SYS ; encoding: [0x42,0x01,0x60,0xf4,0x00,0x00,0x00,0x00]
774774

775+
s_load_b32 s5, s[4:5], s0 offset:0x0 scope:0
776+
// GFX12: s_load_b32 s5, s[4:5], s0 offset:0x0 ; encoding: [0x42,0x01,0x00,0xf4,0x00,0x00,0x00,0x00]
777+
778+
s_load_b32 s5, s[4:5], s0 offset:0x0 scope:1
779+
// GFX12: s_load_b32 s5, s[4:5], s0 offset:0x0 scope:SCOPE_SE ; encoding: [0x42,0x01,0x20,0xf4,0x00,0x00,0x00,0x00]
780+
781+
s_load_b32 s5, s[4:5], s0 offset:0x0 scope:0x2
782+
// GFX12: s_load_b32 s5, s[4:5], s0 offset:0x0 scope:SCOPE_DEV ; encoding: [0x42,0x01,0x40,0xf4,0x00,0x00,0x00,0x00]
783+
784+
s_load_b32 s5, s[4:5], s0 offset:0x0 scope:03
785+
// GFX12: s_load_b32 s5, s[4:5], s0 offset:0x0 scope:SCOPE_SYS ; encoding: [0x42,0x01,0x60,0xf4,0x00,0x00,0x00,0x00]
786+
775787
s_load_b32 s5, s[4:5], s0 offset:0x0 th:TH_LOAD_HT scope:SCOPE_SE
776788
// GFX12: s_load_b32 s5, s[4:5], s0 offset:0x0 th:TH_LOAD_HT scope:SCOPE_SE ; encoding: [0x42,0x01,0x20,0xf5,0x00,0x00,0x00,0x00]
777789

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