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[RISCV][VLOPT] Fix test case as a result of changes in #119602
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llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir

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@@ -392,13 +392,12 @@ body: |
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%x:vr = PseudoVADD_VV_MF4 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0
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%y:vr = PseudoVZEXT_VF8_M1 $noreg, %x, 1, 6 /* e64 */, 0
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...
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# TODO: VNSRL_WV isn't yet a supported instruction for VL reduction
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---
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name: vnop_wv_vd
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body: |
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bb.0:
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; CHECK-LABEL: name: vnop_wv_vd
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; CHECK: early-clobber %x:vr = PseudoVNSRL_WV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 /* tu, mu */
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; CHECK: early-clobber %x:vr = PseudoVNSRL_WV_M1 $noreg, $noreg, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */
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; CHECK-NEXT: %y:vr = PseudoVADD_VV_M1 $noreg, %x, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */
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%x:vr = PseudoVNSRL_WV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0
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%y:vr = PseudoVADD_VV_M1 $noreg, %x, $noreg, 1, 3 /* e8 */, 0

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