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nikicnikic
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Remove some of the complexity-based canonicalization
The idea behind is that the canonicalization allows us to handle less pattern, because we know that some will be canonicalized away. This is indeed very useful to e.g. know that constants are always on the right. However, the fact that arguments are also canonicalized to the right seems like it may be doing more damage than good: This means that writing tests to cover both commuted forms requires special care ("thwart complexity-based canonicalization"). I think we should consider dropping this canonicalization to make testing simpler.
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268 files changed

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‎llvm/include/llvm/Transforms/InstCombine/InstCombiner.h

Lines changed: 11 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -132,21 +132,18 @@ class LLVM_LIBRARY_VISIBILITY InstCombiner {
132132
/// This routine maps IR values to various complexity ranks:
133133
/// 0 -> undef
134134
/// 1 -> Constants
135-
/// 2 -> Other non-instructions
136-
/// 3 -> Arguments
137-
/// 4 -> Cast and (f)neg/not instructions
138-
/// 5 -> Other instructions
135+
/// 2 -> Cast and (f)neg/not instructions
136+
/// 3 -> Other instructions and arguments
139137
static unsigned getComplexity(Value *V) {
140-
if (isa<Instruction>(V)) {
141-
if (isa<CastInst>(V) || match(V, m_Neg(PatternMatch::m_Value())) ||
142-
match(V, m_Not(PatternMatch::m_Value())) ||
143-
match(V, m_FNeg(PatternMatch::m_Value())))
144-
return 4;
145-
return 5;
146-
}
147-
if (isa<Argument>(V))
148-
return 3;
149-
return isa<Constant>(V) ? (isa<UndefValue>(V) ? 0 : 1) : 2;
138+
if (isa<Constant>(V))
139+
return isa<UndefValue>(V) ? 0 : 1;
140+
141+
if (isa<CastInst>(V) || match(V, m_Neg(PatternMatch::m_Value())) ||
142+
match(V, m_Not(PatternMatch::m_Value())) ||
143+
match(V, m_FNeg(PatternMatch::m_Value())))
144+
return 2;
145+
146+
return 3;
150147
}
151148

152149
/// Predicate canonicalization reduces the number of patterns that need to be

‎llvm/test/Analysis/ValueTracking/known-power-of-two-urem.ll

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ define i64 @known_power_of_two_urem_phi(i64 %size, i1 %cmp, i1 %cmp1) {
1919
; CHECK-NEXT: br label [[COND_END]]
2020
; CHECK: cond.end:
2121
; CHECK-NEXT: [[PHI1:%.*]] = phi i64 [ 4095, [[ENTRY:%.*]] ], [ [[PHI]], [[COND_TRUE_END]] ]
22-
; CHECK-NEXT: [[UREM:%.*]] = and i64 [[PHI1]], [[SIZE:%.*]]
22+
; CHECK-NEXT: [[UREM:%.*]] = and i64 [[SIZE:%.*]], [[PHI1]]
2323
; CHECK-NEXT: ret i64 [[UREM]]
2424
;
2525
entry:
@@ -57,7 +57,7 @@ define i64 @known_power_of_two_urem_nested_expr(i64 %size, i1 %cmp, i1 %cmp1, i6
5757
; CHECK: cond.end:
5858
; CHECK-NEXT: [[PHI:%.*]] = phi i64 [ [[SELECT]], [[COND_FALSE]] ], [ [[TMP1]], [[COND_TRUE]] ], [ [[PHI]], [[COND_END]] ]
5959
; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[PHI]], -1
60-
; CHECK-NEXT: [[UREM:%.*]] = and i64 [[TMP2]], [[SIZE:%.*]]
60+
; CHECK-NEXT: [[UREM:%.*]] = and i64 [[SIZE:%.*]], [[TMP2]]
6161
; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i64 [[UREM]], 10
6262
; CHECK-NEXT: br i1 [[CMP2]], label [[COND_END]], label [[END:%.*]]
6363
; CHECK: end:
@@ -119,7 +119,7 @@ define i64 @known_power_of_two_urem_loop_mul(i64 %size, i64 %a) {
119119
; CHECK-NEXT: [[PHI:%.*]] = phi i64 [ [[START]], [[ENTRY:%.*]] ], [ [[I:%.*]], [[FOR_BODY]] ]
120120
; CHECK-NEXT: [[SUM:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[ADD:%.*]], [[FOR_BODY]] ]
121121
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[PHI]], -1
122-
; CHECK-NEXT: [[UREM:%.*]] = and i64 [[TMP0]], [[SIZE:%.*]]
122+
; CHECK-NEXT: [[UREM:%.*]] = and i64 [[SIZE:%.*]], [[TMP0]]
123123
; CHECK-NEXT: [[ADD]] = add nuw i64 [[SUM]], [[UREM]]
124124
; CHECK-NEXT: [[I]] = shl nuw i64 [[PHI]], 2
125125
; CHECK-NEXT: [[ICMP:%.*]] = icmp ult i64 [[PHI]], 25000000
@@ -190,7 +190,7 @@ define i64 @known_power_of_two_urem_loop_shl(i64 %size, i64 %a) {
190190
; CHECK-NEXT: [[PHI:%.*]] = phi i64 [ [[START]], [[ENTRY:%.*]] ], [ [[I:%.*]], [[FOR_BODY]] ]
191191
; CHECK-NEXT: [[SUM:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[ADD:%.*]], [[FOR_BODY]] ]
192192
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[PHI]], -1
193-
; CHECK-NEXT: [[UREM:%.*]] = and i64 [[TMP0]], [[SIZE:%.*]]
193+
; CHECK-NEXT: [[UREM:%.*]] = and i64 [[SIZE:%.*]], [[TMP0]]
194194
; CHECK-NEXT: [[ADD]] = add nuw i64 [[SUM]], [[UREM]]
195195
; CHECK-NEXT: [[I]] = shl nuw i64 [[PHI]], 1
196196
; CHECK-NEXT: [[ICMP:%.*]] = icmp ult i64 [[PHI]], 50000000
@@ -225,7 +225,7 @@ define i64 @known_power_of_two_urem_loop_lshr(i64 %size, i64 %a) {
225225
; CHECK-NEXT: [[PHI:%.*]] = phi i64 [ [[START]], [[ENTRY:%.*]] ], [ [[I:%.*]], [[FOR_BODY]] ]
226226
; CHECK-NEXT: [[SUM:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[ADD:%.*]], [[FOR_BODY]] ]
227227
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[PHI]], -1
228-
; CHECK-NEXT: [[UREM:%.*]] = and i64 [[TMP0]], [[SIZE:%.*]]
228+
; CHECK-NEXT: [[UREM:%.*]] = and i64 [[SIZE:%.*]], [[TMP0]]
229229
; CHECK-NEXT: [[ADD]] = add nuw i64 [[SUM]], [[UREM]]
230230
; CHECK-NEXT: [[I]] = lshr i64 [[PHI]], 1
231231
; CHECK-NEXT: [[ICMP_NOT:%.*]] = icmp ult i64 [[PHI]], 2
@@ -260,7 +260,7 @@ define i64 @known_power_of_two_urem_loop_ashr(i64 %size, i64 %a) {
260260
; CHECK-NEXT: [[PHI:%.*]] = phi i64 [ 4096, [[ENTRY:%.*]] ], [ [[I:%.*]], [[FOR_BODY]] ]
261261
; CHECK-NEXT: [[SUM:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[ADD:%.*]], [[FOR_BODY]] ]
262262
; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[PHI]], -1
263-
; CHECK-NEXT: [[UREM:%.*]] = and i64 [[TMP0]], [[SIZE:%.*]]
263+
; CHECK-NEXT: [[UREM:%.*]] = and i64 [[SIZE:%.*]], [[TMP0]]
264264
; CHECK-NEXT: [[ADD]] = add nsw i64 [[SUM]], [[UREM]]
265265
; CHECK-NEXT: [[I]] = lshr i64 [[PHI]], [[A:%.*]]
266266
; CHECK-NEXT: [[ICMP_NOT:%.*]] = icmp eq i64 [[I]], 0
@@ -396,7 +396,7 @@ define i8 @known_power_of_two_rust_next_power_of_two(i8 %x, i8 %y) {
396396
; CHECK-NEXT: [[TMP3:%.*]] = lshr i8 -1, [[TMP2]]
397397
; CHECK-NEXT: [[TMP4:%.*]] = icmp ugt i8 [[X]], 1
398398
; CHECK-NEXT: [[TMP5:%.*]] = select i1 [[TMP4]], i8 [[TMP3]], i8 0
399-
; CHECK-NEXT: [[R:%.*]] = and i8 [[TMP5]], [[Y:%.*]]
399+
; CHECK-NEXT: [[R:%.*]] = and i8 [[Y:%.*]], [[TMP5]]
400400
; CHECK-NEXT: ret i8 [[R]]
401401
;
402402
%2 = add i8 %x, -1
@@ -414,7 +414,7 @@ define i8 @known_power_of_two_rust_next_power_of_two(i8 %x, i8 %y) {
414414
define i8 @known_power_of_two_lshr_add_one_allow_zero(i8 %x, i8 %y) {
415415
; CHECK-LABEL: @known_power_of_two_lshr_add_one_allow_zero(
416416
; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 -1, [[X:%.*]]
417-
; CHECK-NEXT: [[R:%.*]] = and i8 [[TMP1]], [[Y:%.*]]
417+
; CHECK-NEXT: [[R:%.*]] = and i8 [[Y:%.*]], [[TMP1]]
418418
; CHECK-NEXT: ret i8 [[R]]
419419
;
420420
%4 = lshr i8 -1, %x
@@ -429,7 +429,7 @@ define i1 @known_power_of_two_lshr_add_one_nuw_deny_zero(i8 %x, i8 %y) {
429429
; CHECK-LABEL: @known_power_of_two_lshr_add_one_nuw_deny_zero(
430430
; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 -1, [[X:%.*]]
431431
; CHECK-NEXT: [[TMP2:%.*]] = sub i8 -2, [[TMP1]]
432-
; CHECK-NEXT: [[TMP3:%.*]] = or i8 [[TMP2]], [[Y:%.*]]
432+
; CHECK-NEXT: [[TMP3:%.*]] = or i8 [[Y:%.*]], [[TMP2]]
433433
; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[TMP3]], -1
434434
; CHECK-NEXT: ret i1 [[R]]
435435
;
@@ -446,7 +446,7 @@ define i1 @negative_known_power_of_two_lshr_add_one_deny_zero(i8 %x, i8 %y) {
446446
; CHECK-LABEL: @negative_known_power_of_two_lshr_add_one_deny_zero(
447447
; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 -1, [[X:%.*]]
448448
; CHECK-NEXT: [[TMP2:%.*]] = sub i8 -2, [[TMP1]]
449-
; CHECK-NEXT: [[TMP3:%.*]] = or i8 [[TMP2]], [[Y:%.*]]
449+
; CHECK-NEXT: [[TMP3:%.*]] = or i8 [[Y:%.*]], [[TMP2]]
450450
; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[TMP3]], -1
451451
; CHECK-NEXT: ret i1 [[R]]
452452
;
@@ -463,7 +463,7 @@ define i1 @negative_known_power_of_two_lshr_add_one_nsw_deny_zero(i8 %x, i8 %y)
463463
; CHECK-LABEL: @negative_known_power_of_two_lshr_add_one_nsw_deny_zero(
464464
; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 -1, [[X:%.*]]
465465
; CHECK-NEXT: [[TMP2:%.*]] = sub i8 -2, [[TMP1]]
466-
; CHECK-NEXT: [[TMP3:%.*]] = or i8 [[TMP2]], [[Y:%.*]]
466+
; CHECK-NEXT: [[TMP3:%.*]] = or i8 [[Y:%.*]], [[TMP2]]
467467
; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[TMP3]], -1
468468
; CHECK-NEXT: ret i1 [[R]]
469469
;

‎llvm/test/Analysis/ValueTracking/known-power-of-two.ll

Lines changed: 30 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -16,8 +16,8 @@ declare i16 @llvm.umax.i16(i16, i16)
1616
define i32 @pr25900(i32 %d) {
1717
; CHECK-LABEL: define i32 @pr25900
1818
; CHECK-SAME: (i32 [[D:%.*]]) {
19-
; CHECK-NEXT: [[AND:%.*]] = ashr i32 [[D]], 31
20-
; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 4, [[AND]]
19+
; CHECK-NEXT: [[ASHR:%.*]] = ashr i32 [[D]], 31
20+
; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 4, [[ASHR]]
2121
; CHECK-NEXT: ret i32 [[DIV]]
2222
;
2323
%and = and i32 %d, -2147483648
@@ -37,7 +37,7 @@ define i8 @trunc_is_pow2_or_zero(i16 %x, i8 %y) {
3737
; CHECK-NEXT: [[XP2:%.*]] = shl i16 4, [[X]]
3838
; CHECK-NEXT: [[XX:%.*]] = trunc i16 [[XP2]] to i8
3939
; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[XX]], -1
40-
; CHECK-NEXT: [[R:%.*]] = and i8 [[TMP1]], [[Y]]
40+
; CHECK-NEXT: [[R:%.*]] = and i8 [[Y]], [[TMP1]]
4141
; CHECK-NEXT: ret i8 [[R]]
4242
;
4343
%xp2 = shl i16 4, %x
@@ -67,7 +67,7 @@ define i1 @trunc_is_pow2_fail(i16 %x, i8 %y) {
6767
; CHECK-SAME: (i16 [[X:%.*]], i8 [[Y:%.*]]) {
6868
; CHECK-NEXT: [[XP2:%.*]] = shl i16 4, [[X]]
6969
; CHECK-NEXT: [[XX:%.*]] = trunc i16 [[XP2]] to i8
70-
; CHECK-NEXT: [[AND:%.*]] = and i8 [[XX]], [[Y]]
70+
; CHECK-NEXT: [[AND:%.*]] = and i8 [[Y]], [[XX]]
7171
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[AND]], [[XX]]
7272
; CHECK-NEXT: ret i1 [[R]]
7373
;
@@ -85,7 +85,7 @@ define i16 @bswap_is_pow2_or_zero(i16 %x, i16 %y) {
8585
; CHECK-NEXT: [[XP2:%.*]] = shl i16 4, [[X]]
8686
; CHECK-NEXT: [[XX:%.*]] = call i16 @llvm.bswap.i16(i16 [[XP2]])
8787
; CHECK-NEXT: [[TMP1:%.*]] = add i16 [[XX]], -1
88-
; CHECK-NEXT: [[R:%.*]] = and i16 [[TMP1]], [[Y]]
88+
; CHECK-NEXT: [[R:%.*]] = and i16 [[Y]], [[TMP1]]
8989
; CHECK-NEXT: ret i16 [[R]]
9090
;
9191
%xp2 = shl i16 4, %x
@@ -115,7 +115,7 @@ define i1 @bswap_is_pow2(i16 %x, i16 %y) {
115115
; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]]) {
116116
; CHECK-NEXT: [[XP2:%.*]] = shl nuw i16 1, [[X]]
117117
; CHECK-NEXT: [[XX:%.*]] = call i16 @llvm.bswap.i16(i16 [[XP2]])
118-
; CHECK-NEXT: [[AND:%.*]] = and i16 [[XX]], [[Y]]
118+
; CHECK-NEXT: [[AND:%.*]] = and i16 [[Y]], [[XX]]
119119
; CHECK-NEXT: [[R:%.*]] = icmp ne i16 [[AND]], 0
120120
; CHECK-NEXT: ret i1 [[R]]
121121
;
@@ -132,7 +132,7 @@ define i1 @bswap_is_pow2_fail(i16 %x, i16 %y) {
132132
; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]]) {
133133
; CHECK-NEXT: [[XP2:%.*]] = shl i16 2, [[X]]
134134
; CHECK-NEXT: [[XX:%.*]] = call i16 @llvm.bswap.i16(i16 [[XP2]])
135-
; CHECK-NEXT: [[AND:%.*]] = and i16 [[XX]], [[Y]]
135+
; CHECK-NEXT: [[AND:%.*]] = and i16 [[Y]], [[XX]]
136136
; CHECK-NEXT: [[R:%.*]] = icmp eq i16 [[AND]], [[XX]]
137137
; CHECK-NEXT: ret i1 [[R]]
138138
;
@@ -150,7 +150,7 @@ define i16 @bitreverse_is_pow2_or_zero(i16 %x, i16 %y) {
150150
; CHECK-NEXT: [[XP2:%.*]] = shl i16 4, [[X]]
151151
; CHECK-NEXT: [[XX:%.*]] = call i16 @llvm.bitreverse.i16(i16 [[XP2]])
152152
; CHECK-NEXT: [[TMP1:%.*]] = add nsw i16 [[XX]], -1
153-
; CHECK-NEXT: [[R:%.*]] = and i16 [[TMP1]], [[Y]]
153+
; CHECK-NEXT: [[R:%.*]] = and i16 [[Y]], [[TMP1]]
154154
; CHECK-NEXT: ret i16 [[R]]
155155
;
156156
%xp2 = shl i16 4, %x
@@ -180,7 +180,7 @@ define i1 @bitreverse_is_pow2(i16 %x, i16 %y) {
180180
; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]]) {
181181
; CHECK-NEXT: [[XP2:%.*]] = shl nuw i16 1, [[X]]
182182
; CHECK-NEXT: [[XX:%.*]] = call i16 @llvm.bitreverse.i16(i16 [[XP2]])
183-
; CHECK-NEXT: [[AND:%.*]] = and i16 [[XX]], [[Y]]
183+
; CHECK-NEXT: [[AND:%.*]] = and i16 [[Y]], [[XX]]
184184
; CHECK-NEXT: [[R:%.*]] = icmp ne i16 [[AND]], 0
185185
; CHECK-NEXT: ret i1 [[R]]
186186
;
@@ -197,7 +197,7 @@ define i1 @bitreverse_is_pow2_fail(i16 %x, i16 %y) {
197197
; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]]) {
198198
; CHECK-NEXT: [[XP2:%.*]] = shl i16 2, [[X]]
199199
; CHECK-NEXT: [[XX:%.*]] = call i16 @llvm.bitreverse.i16(i16 [[XP2]])
200-
; CHECK-NEXT: [[AND:%.*]] = and i16 [[XX]], [[Y]]
200+
; CHECK-NEXT: [[AND:%.*]] = and i16 [[Y]], [[XX]]
201201
; CHECK-NEXT: [[R:%.*]] = icmp eq i16 [[AND]], [[XX]]
202202
; CHECK-NEXT: ret i1 [[R]]
203203
;
@@ -215,7 +215,7 @@ define i16 @fshl_is_pow2_or_zero(i16 %x, i16 %y, i16 %z) {
215215
; CHECK-NEXT: [[XP2:%.*]] = shl i16 4, [[X]]
216216
; CHECK-NEXT: [[XX:%.*]] = call i16 @llvm.fshl.i16(i16 [[XP2]], i16 [[XP2]], i16 [[Z]])
217217
; CHECK-NEXT: [[TMP1:%.*]] = add i16 [[XX]], -1
218-
; CHECK-NEXT: [[R:%.*]] = and i16 [[TMP1]], [[Y]]
218+
; CHECK-NEXT: [[R:%.*]] = and i16 [[Y]], [[TMP1]]
219219
; CHECK-NEXT: ret i16 [[R]]
220220
;
221221
%xp2 = shl i16 4, %x
@@ -262,7 +262,7 @@ define i1 @fshl_is_pow2(i16 %x, i16 %y, i16 %z) {
262262
; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]], i16 [[Z:%.*]]) {
263263
; CHECK-NEXT: [[XP2:%.*]] = shl nuw i16 1, [[X]]
264264
; CHECK-NEXT: [[XX:%.*]] = call i16 @llvm.fshl.i16(i16 [[XP2]], i16 [[XP2]], i16 [[Z]])
265-
; CHECK-NEXT: [[AND:%.*]] = and i16 [[XX]], [[Y]]
265+
; CHECK-NEXT: [[AND:%.*]] = and i16 [[Y]], [[XX]]
266266
; CHECK-NEXT: [[R:%.*]] = icmp ne i16 [[AND]], 0
267267
; CHECK-NEXT: ret i1 [[R]]
268268
;
@@ -279,7 +279,7 @@ define i1 @fshl_is_pow2_fail(i16 %x, i16 %y, i16 %z) {
279279
; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]], i16 [[Z:%.*]]) {
280280
; CHECK-NEXT: [[XP2:%.*]] = shl i16 2, [[X]]
281281
; CHECK-NEXT: [[XX:%.*]] = call i16 @llvm.fshl.i16(i16 [[XP2]], i16 [[XP2]], i16 [[Z]])
282-
; CHECK-NEXT: [[AND:%.*]] = and i16 [[XX]], [[Y]]
282+
; CHECK-NEXT: [[AND:%.*]] = and i16 [[Y]], [[XX]]
283283
; CHECK-NEXT: [[R:%.*]] = icmp eq i16 [[AND]], [[XX]]
284284
; CHECK-NEXT: ret i1 [[R]]
285285
;
@@ -297,7 +297,7 @@ define i16 @fshr_is_pow2_or_zero(i16 %x, i16 %y, i16 %z) {
297297
; CHECK-NEXT: [[XP2:%.*]] = shl i16 4, [[X]]
298298
; CHECK-NEXT: [[XX:%.*]] = call i16 @llvm.fshr.i16(i16 [[XP2]], i16 [[XP2]], i16 [[Z]])
299299
; CHECK-NEXT: [[TMP1:%.*]] = add i16 [[XX]], -1
300-
; CHECK-NEXT: [[R:%.*]] = and i16 [[TMP1]], [[Y]]
300+
; CHECK-NEXT: [[R:%.*]] = and i16 [[Y]], [[TMP1]]
301301
; CHECK-NEXT: ret i16 [[R]]
302302
;
303303
%xp2 = shl i16 4, %x
@@ -344,7 +344,7 @@ define i1 @fshr_is_pow2(i16 %x, i16 %y, i16 %z) {
344344
; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]], i16 [[Z:%.*]]) {
345345
; CHECK-NEXT: [[XP2:%.*]] = shl nuw i16 1, [[X]]
346346
; CHECK-NEXT: [[XX:%.*]] = call i16 @llvm.fshr.i16(i16 [[XP2]], i16 [[XP2]], i16 [[Z]])
347-
; CHECK-NEXT: [[AND:%.*]] = and i16 [[XX]], [[Y]]
347+
; CHECK-NEXT: [[AND:%.*]] = and i16 [[Y]], [[XX]]
348348
; CHECK-NEXT: [[R:%.*]] = icmp ne i16 [[AND]], 0
349349
; CHECK-NEXT: ret i1 [[R]]
350350
;
@@ -361,7 +361,7 @@ define i1 @fshr_is_pow2_fail(i16 %x, i16 %y, i16 %z) {
361361
; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]], i16 [[Z:%.*]]) {
362362
; CHECK-NEXT: [[XP2:%.*]] = shl i16 2, [[X]]
363363
; CHECK-NEXT: [[XX:%.*]] = call i16 @llvm.fshr.i16(i16 [[XP2]], i16 [[XP2]], i16 [[Z]])
364-
; CHECK-NEXT: [[AND:%.*]] = and i16 [[XX]], [[Y]]
364+
; CHECK-NEXT: [[AND:%.*]] = and i16 [[Y]], [[XX]]
365365
; CHECK-NEXT: [[R:%.*]] = icmp eq i16 [[AND]], [[XX]]
366366
; CHECK-NEXT: ret i1 [[R]]
367367
;
@@ -380,7 +380,7 @@ define i16 @mul_is_pow2_or_zero(i16 %x, i16 %y, i16 %z) {
380380
; CHECK-NEXT: [[ZP2:%.*]] = shl i16 2, [[Z]]
381381
; CHECK-NEXT: [[XX:%.*]] = mul i16 [[XP2]], [[ZP2]]
382382
; CHECK-NEXT: [[TMP1:%.*]] = add i16 [[XX]], -1
383-
; CHECK-NEXT: [[R:%.*]] = and i16 [[TMP1]], [[Y]]
383+
; CHECK-NEXT: [[R:%.*]] = and i16 [[Y]], [[TMP1]]
384384
; CHECK-NEXT: ret i16 [[R]]
385385
;
386386
%xp2 = shl i16 4, %x
@@ -416,7 +416,7 @@ define i1 @mul_is_pow2(i16 %x, i16 %y, i16 %z) {
416416
; CHECK-NEXT: [[ZP2:%.*]] = shl nuw nsw i16 2, [[ZSMALL]]
417417
; CHECK-NEXT: [[TMP1:%.*]] = add nuw nsw i16 [[XSMALL]], 2
418418
; CHECK-NEXT: [[XX:%.*]] = shl nuw nsw i16 [[ZP2]], [[TMP1]]
419-
; CHECK-NEXT: [[AND:%.*]] = and i16 [[XX]], [[Y]]
419+
; CHECK-NEXT: [[AND:%.*]] = and i16 [[Y]], [[XX]]
420420
; CHECK-NEXT: [[R:%.*]] = icmp ne i16 [[AND]], 0
421421
; CHECK-NEXT: ret i1 [[R]]
422422
;
@@ -439,7 +439,7 @@ define i1 @mul_is_pow2_fail(i16 %x, i16 %y, i16 %z) {
439439
; CHECK-NEXT: [[ZP2:%.*]] = shl nuw nsw i16 2, [[ZSMALL]]
440440
; CHECK-NEXT: [[TMP1:%.*]] = add nuw nsw i16 [[XSMALL]], 2
441441
; CHECK-NEXT: [[XX:%.*]] = shl i16 [[ZP2]], [[TMP1]]
442-
; CHECK-NEXT: [[AND:%.*]] = and i16 [[XX]], [[Y]]
442+
; CHECK-NEXT: [[AND:%.*]] = and i16 [[Y]], [[XX]]
443443
; CHECK-NEXT: [[R:%.*]] = icmp eq i16 [[AND]], [[XX]]
444444
; CHECK-NEXT: ret i1 [[R]]
445445
;
@@ -462,7 +462,7 @@ define i1 @mul_is_pow2_fail2(i16 %x, i16 %y, i16 %z) {
462462
; CHECK-NEXT: [[XP2:%.*]] = shl nuw nsw i16 3, [[XSMALL]]
463463
; CHECK-NEXT: [[TMP1:%.*]] = add nuw nsw i16 [[ZSMALL]], 1
464464
; CHECK-NEXT: [[XX:%.*]] = shl nuw nsw i16 [[XP2]], [[TMP1]]
465-
; CHECK-NEXT: [[AND:%.*]] = and i16 [[XX]], [[Y]]
465+
; CHECK-NEXT: [[AND:%.*]] = and i16 [[Y]], [[XX]]
466466
; CHECK-NEXT: [[R:%.*]] = icmp eq i16 [[AND]], [[XX]]
467467
; CHECK-NEXT: ret i1 [[R]]
468468
;
@@ -482,7 +482,7 @@ define i1 @shl_is_pow2(i16 %x, i16 %y) {
482482
; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]]) {
483483
; CHECK-NEXT: [[XSMALL:%.*]] = and i16 [[X]], 7
484484
; CHECK-NEXT: [[XX:%.*]] = shl nuw nsw i16 4, [[XSMALL]]
485-
; CHECK-NEXT: [[AND:%.*]] = and i16 [[XX]], [[Y]]
485+
; CHECK-NEXT: [[AND:%.*]] = and i16 [[Y]], [[XX]]
486486
; CHECK-NEXT: [[R:%.*]] = icmp ne i16 [[AND]], 0
487487
; CHECK-NEXT: ret i1 [[R]]
488488
;
@@ -499,7 +499,7 @@ define i1 @shl_is_pow2_fail(i16 %x, i16 %y) {
499499
; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]]) {
500500
; CHECK-NEXT: [[XSMALL:%.*]] = and i16 [[X]], 7
501501
; CHECK-NEXT: [[XX:%.*]] = shl i16 512, [[XSMALL]]
502-
; CHECK-NEXT: [[AND:%.*]] = and i16 [[XX]], [[Y]]
502+
; CHECK-NEXT: [[AND:%.*]] = and i16 [[Y]], [[XX]]
503503
; CHECK-NEXT: [[R:%.*]] = icmp eq i16 [[AND]], [[XX]]
504504
; CHECK-NEXT: ret i1 [[R]]
505505
;
@@ -516,7 +516,7 @@ define i1 @shl_is_pow2_fail2(i16 %x, i16 %y) {
516516
; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]]) {
517517
; CHECK-NEXT: [[XSMALL:%.*]] = and i16 [[X]], 7
518518
; CHECK-NEXT: [[XX:%.*]] = shl nuw nsw i16 5, [[XSMALL]]
519-
; CHECK-NEXT: [[AND:%.*]] = and i16 [[XX]], [[Y]]
519+
; CHECK-NEXT: [[AND:%.*]] = and i16 [[Y]], [[XX]]
520520
; CHECK-NEXT: [[R:%.*]] = icmp eq i16 [[AND]], [[XX]]
521521
; CHECK-NEXT: ret i1 [[R]]
522522
;
@@ -533,7 +533,7 @@ define i1 @lshr_is_pow2(i16 %x, i16 %y) {
533533
; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]]) {
534534
; CHECK-NEXT: [[XSMALL:%.*]] = and i16 [[X]], 7
535535
; CHECK-NEXT: [[XX:%.*]] = lshr exact i16 512, [[XSMALL]]
536-
; CHECK-NEXT: [[AND:%.*]] = and i16 [[XX]], [[Y]]
536+
; CHECK-NEXT: [[AND:%.*]] = and i16 [[Y]], [[XX]]
537537
; CHECK-NEXT: [[R:%.*]] = icmp ne i16 [[AND]], 0
538538
; CHECK-NEXT: ret i1 [[R]]
539539
;
@@ -550,7 +550,7 @@ define i1 @lshr_is_pow2_fail(i16 %x, i16 %y) {
550550
; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]]) {
551551
; CHECK-NEXT: [[XSMALL:%.*]] = and i16 [[X]], 7
552552
; CHECK-NEXT: [[XX:%.*]] = lshr i16 4, [[XSMALL]]
553-
; CHECK-NEXT: [[AND:%.*]] = and i16 [[XX]], [[Y]]
553+
; CHECK-NEXT: [[AND:%.*]] = and i16 [[Y]], [[XX]]
554554
; CHECK-NEXT: [[R:%.*]] = icmp eq i16 [[AND]], [[XX]]
555555
; CHECK-NEXT: ret i1 [[R]]
556556
;
@@ -567,7 +567,7 @@ define i1 @lshr_is_pow2_fail2(i16 %x, i16 %y) {
567567
; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]]) {
568568
; CHECK-NEXT: [[XSMALL:%.*]] = and i16 [[X]], 7
569569
; CHECK-NEXT: [[XX:%.*]] = lshr i16 513, [[XSMALL]]
570-
; CHECK-NEXT: [[AND:%.*]] = and i16 [[XX]], [[Y]]
570+
; CHECK-NEXT: [[AND:%.*]] = and i16 [[Y]], [[XX]]
571571
; CHECK-NEXT: [[R:%.*]] = icmp eq i16 [[AND]], [[XX]]
572572
; CHECK-NEXT: ret i1 [[R]]
573573
;
@@ -584,7 +584,7 @@ define i1 @and_is_pow2(i16 %x, i16 %y) {
584584
; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]]) {
585585
; CHECK-NEXT: [[XNZ:%.*]] = or i16 [[X]], 4
586586
; CHECK-NEXT: [[X_NEG:%.*]] = sub nsw i16 0, [[XNZ]]
587-
; CHECK-NEXT: [[TMP1:%.*]] = and i16 [[X_NEG]], [[Y]]
587+
; CHECK-NEXT: [[TMP1:%.*]] = and i16 [[Y]], [[X_NEG]]
588588
; CHECK-NEXT: [[AND:%.*]] = and i16 [[TMP1]], [[XNZ]]
589589
; CHECK-NEXT: [[R:%.*]] = icmp ne i16 [[AND]], 0
590590
; CHECK-NEXT: ret i1 [[R]]
@@ -602,8 +602,8 @@ define i1 @and_is_pow2_fail(i16 %x, i16 %y) {
602602
; CHECK-LABEL: define i1 @and_is_pow2_fail
603603
; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]]) {
604604
; CHECK-NEXT: [[X_NEG:%.*]] = sub i16 0, [[X]]
605-
; CHECK-NEXT: [[XX:%.*]] = and i16 [[X_NEG]], [[X]]
606-
; CHECK-NEXT: [[AND:%.*]] = and i16 [[XX]], [[Y]]
605+
; CHECK-NEXT: [[XX:%.*]] = and i16 [[X]], [[X_NEG]]
606+
; CHECK-NEXT: [[AND:%.*]] = and i16 [[Y]], [[XX]]
607607
; CHECK-NEXT: [[R:%.*]] = icmp eq i16 [[AND]], [[XX]]
608608
; CHECK-NEXT: ret i1 [[R]]
609609
;
@@ -619,7 +619,7 @@ define i16 @i1_is_pow2_or_zero(i1 %x, i16 %y) {
619619
; CHECK-LABEL: define i16 @i1_is_pow2_or_zero
620620
; CHECK-SAME: (i1 [[X:%.*]], i16 [[Y:%.*]]) {
621621
; CHECK-NEXT: [[XX:%.*]] = zext i1 [[X]] to i16
622-
; CHECK-NEXT: [[R:%.*]] = or i16 [[XX]], [[Y]]
622+
; CHECK-NEXT: [[R:%.*]] = or i16 [[Y]], [[XX]]
623623
; CHECK-NEXT: ret i16 [[R]]
624624
;
625625
%xx = zext i1 %x to i16

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